 Ishant
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66bb72d385
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Added Hardware Lib for FMEDA, Sample Fmeda created, created ASIL-C BOM, Commit before the starting with TUV changes,
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2025-10-10 17:53:10 +05:30 |
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Ishant
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526c40f87e
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WIP: FMEDA Started and Created Hardware Library.
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2025-09-24 12:47:27 +05:30 |
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Ishant
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149b3b2958
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ASIL-C BMS Lock & Unlock Functions removed and architecture updated.
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2025-08-25 13:32:39 +05:30 |
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Ishant
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e36905ab29
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ASIL-C Hara 1st level, Vehicle level functions and malfunctions revisit, There were some extra malfunctions.
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2025-08-22 13:27:52 +05:30 |
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Ishant
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c0833e6b84
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19/08/25- Completed Item level FMEA
BLock Function added onto Architecture
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2025-08-19 18:14:01 +05:30 |
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Ishant
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fa6bda0e07
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WIP: Restructuring of Processes started. 11/08/2025
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2025-08-11 18:11:47 +05:30 |
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Ishant
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6885e2478a
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WIP: 25/07/2025
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2025-07-25 18:45:58 +05:30 |
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Ishant
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53ac06ffd8
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WIP: 21/07/2025
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2025-07-21 19:58:04 +05:30 |
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Ishant
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9c406bc260
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WIP: 11/07/2025
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2025-07-11 19:00:54 +05:30 |
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Ishant
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207e1dc597
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WIP: ASIL C Functional Level Complete
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2025-07-04 18:40:13 +05:30 |
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Ishant
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42f949e8ea
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WIP : ASIL_C FTA Started
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2025-06-23 19:19:16 +05:30 |
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Ishant
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194e372fe4
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WIP: Create new ASIL C project
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2025-06-11 15:31:41 +05:30 |
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Ishant
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ea701e0d05
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WIP: Commit before deleting all older architectures and files
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2025-06-09 11:29:41 +05:30 |
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Ishant
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dbf3f8224c
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WIP:04/06/2025
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2025-06-04 17:34:20 +05:30 |
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Ishant
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e09456a3b8
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Initial Commit
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2025-04-02 17:53:38 +05:30 |
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Ishant
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5daa902671
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Initial Commit
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2025-04-02 17:50:16 +05:30 |