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fix: update the CPU clock to 48Mhz 

- Update the systick period enum
- Add bootloader jump and check
- Increased the destination buffer size during rx drain
- Increased uart buffer size from 8 to 64
stable
heezes 2024-11-07 10:32:26 +05:30
parent 9631a6c398
commit 51cb91df6c
10 changed files with 25 additions and 24 deletions
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4
.cproject
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@ -300,7 +300,7 @@
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</option>
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@ -349,7 +349,7 @@
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2
Core/Source/ivec_mcal_mcan.c
View File

@ -20,7 +20,7 @@ volatile DL_MCAN_RxBufElement TempRxMsg;
volatile uint8_t TempRxBuffer[8];
volatile uint32_t TempRxID;
volatile uint32_t id;
DL_MCAN_ProtocolStatus HeaderStat;
volatile DL_MCAN_ProtocolStatus HeaderStat;
volatile uint32_t l_canTransmitTimeout;
volatile uint8_t u8CallBack_buff[8]={0};
volatile IVEC_McalStatus_e l_statusFlag = IVEC_MCAL_STATUS_SUCCESS;

3
Core/Source/ivec_mcal_uart.c
View File

@ -36,8 +36,7 @@ void _prv_vrxcallback(UART_Regs *pxUartInstance, uint32_t event)
{
case DL_UART_MAIN_IIDX_RX:
{
bool status = 0;
uint8_t l_pu8Buffer[8] = {0}; // Adjust size as needed
uint8_t l_pu8Buffer[64] = {0}; // Adjust size as needed
uint32_t bytesRead;
// Drain the RX FIFO and store the data in buffer

2
Generated Codes/ti_msp_dl_config.c
View File

@ -130,7 +130,7 @@ SYSCONFIG_WEAK void SYSCFG_DL_GPIO_init(void)
DL_GPIO_initDigitalInputFeatures(GPIO_GRP_0_PIN_0_IOMUX,
DL_GPIO_INVERSION_DISABLE, DL_GPIO_RESISTOR_NONE,
DL_GPIO_HYSTERESIS_DISABLE, DL_GPIO_WAKEUP_DISABLE);
// DL_GPIO_initDigitalOutput(GPIO_GRP_0_PIN_0_IOMUX);
DL_GPIO_initPeripheralOutputFunction(
GPIO_MCAN0_IOMUX_CAN_TX, GPIO_MCAN0_IOMUX_CAN_TX_FUNC);

9
ivec_ECU/ivec_ecu_uart/src/ivec_ecu_uart.c
View File

@ -5,8 +5,8 @@
//#include "ivec_mcal_uart.h"
#define LOG_STRING "ivec-ecu-UART"
#define CAN_UART_BUFFER_MAX_SIZE 2048
#define DATA_PACKET_TIMEOUT 10
#define CAN_UART_BUFFER_MAX_SIZE 4096
#define DATA_PACKET_TIMEOUT 1
CmplxFifoQueueHandle_s __gprv_MyEcuUARTResponseQueue = { 0 };
@ -157,16 +157,15 @@ IVEC_EcuCommonErr_e xECU_UARTGetData(McalUartHandle_s *prvUartHandle, uint8_t* p
goto exit;
}
int length = 2;
uint8_t ijk = 0;
int l_u32Len = 0;
uint32_t u32CommTimestamp = i32MCAL_getTicks();
while(((i32MCAL_getTicks()-u32CommTimestamp) <= timeout+1) && (ijk < len))
{
if(!u8CMPLX_FifoQueueEmpty(&__gprv_MyEcuUARTResponseQueue)){
if( u8CMPLX_FifoDequeue(&__gprv_MyEcuUARTResponseQueue, &pucBuffer[ijk], &length, 0) == 1 )
if( u8CMPLX_FifoDequeue(&__gprv_MyEcuUARTResponseQueue, &pucBuffer[ijk], &l_u32Len, 0) == 1 )
ijk++;
}
}

14
ivec_RTE/src/ivec_rte.c
View File

@ -136,7 +136,7 @@ void vRTE_InitUARTCANEcho(void)
void vRTE_UARTDataProcess(void)
{
PacketRetCode_t retCode = PACKET_FAIL;
uint32_t ulId = 0xffffffff;
uint32_t ulId = 0x1fffffff;
retCode= xECU_ReadCANDataOverUART(&g_xUartHandle,g_pu8Buf,&ulId);
ulId &= 0x1fffffff;
@ -175,14 +175,20 @@ void vRTE_UARTDataProcess(void)
void vRTE_CANDataProcess(void)
{
can_buff_t xBuff = { 0x00 };
uint8_t l_u8TxBurstMessages = 0;
while( xECU_CANGetData(&xBuff) == commonECU_SUCCESS && (l_u8TxBurstMessages < 32) )
volatile uint8_t l_u8TxBurstMessages = 0;
while( xECU_CANGetData(&xBuff) == commonECU_SUCCESS )
{
l_u8TxBurstMessages++;
if( (xBuff.id == 0x16) && (xBuff.data[0] = 'V') && \
(xBuff.data[1] == 'E') && (xBuff.data[2] == 'C'))
xMCAL_SoftReset();
vECU_InitiateUartToCanTransmit(&g_xUartHandle, (uint32_t)xBuff.id, (uint8_t*)&xBuff.data[0], (uint8_t)xBuff.length);
socTouchDisplay_U.Input[__gprv_u8Idx].ID = xBuff.id;
socTouchDisplay_U.Input[__gprv_u8Idx].Length = xBuff.length;
memcpy(&socTouchDisplay_U.Input[__gprv_u8Idx].Data[0], &xBuff.data[0], 8);
__gprv_u8Idx = (__gprv_u8Idx + 1) % MAX_CAN_MESSAGE_INSTANCE;
if(l_u8TxBurstMessages < 24)
l_u8TxBurstMessages++;
else
break;
}
}

5
main.c
View File

@ -17,12 +17,11 @@
#include "string.h"
#include "ivec_rte.h"
void vMCAL_TimerCallback(void)
{
vRTE_MatlabRun();
DL_TimerA_clearInterruptStatus(TIMER_1_INST, GPTIMER_CPU_INT_IMASK_Z_SET);
// DL_GPIO_togglePins(GPIOB, DL_GPIO_PIN_17);
}
static void __prv_TimerConfig(void)
@ -34,8 +33,6 @@ static void __prv_TimerConfig(void)
NVIC_EnableIRQ(TIMA0_INT_IRQn);
}
int main(void)
{
__enable_irq();

4
mspm0g3507.lds
View File

@ -7,7 +7,7 @@ _Min_Stack_Size = 0x000012E8; /* required amount of stack */
/* Specify the memory areas */
MEMORY
{
FLASH (RX) : ORIGIN = 0x00000000, LENGTH = 0x00020000
FLASH (RX) : ORIGIN = 0x00008000, LENGTH = 0x00018000
SRAM (RWX) : ORIGIN = 0x20200000, LENGTH = 0x00008000
BCR_CONFIG (R) : ORIGIN = 0x41C00000, LENGTH = 0x00000080
BSL_CONFIG (R) : ORIGIN = 0x41C00100, LENGTH = 0x00000080
@ -33,7 +33,7 @@ SECTIONS
{
/* section for the interrupt vector area */
PROVIDE (_intvecs_base_address =
DEFINED(_intvecs_base_address) ? _intvecs_base_address : 0x00000000);
DEFINED(_intvecs_base_address) ? _intvecs_base_address : 0x00008000);
.intvecs (_intvecs_base_address) : AT (_intvecs_base_address) {
KEEP (*(.intvecs))

4
utils/utils.c
View File

@ -94,7 +94,7 @@ static const DL_SYSCTL_SYSPLLConfig gSYSPLLConfig = {
.enableCLK0 = DL_SYSCTL_SYSPLL_CLK0_ENABLE,
.sysPLLMCLK = DL_SYSCTL_SYSPLL_MCLK_CLK0,
.sysPLLRef = DL_SYSCTL_SYSPLL_REF_HFCLK,
.qDiv = 1,
.qDiv = 3,
.pDiv = DL_SYSCTL_SYSPLL_PDIV_1
};
@ -145,7 +145,7 @@ xCoreStatus_t xMCAL_SYSCTL_INIT(uint8_t u8CLK_SRC,uint8_t u8LP_MODE)
DL_SYSCTL_disableSYSPLL();
DL_SYSCTL_setHFCLKSourceHFXTParams(DL_SYSCTL_HFXT_RANGE_16_32_MHZ,10, true);
DL_SYSCTL_configSYSPLL((DL_SYSCTL_SYSPLLConfig *) &gSYSPLLConfig);
DL_SYSCTL_setULPCLKDivider(DL_SYSCTL_ULPCLK_DIV_1);
DL_SYSCTL_setULPCLKDivider(DL_SYSCTL_ULPCLK_DIV_2);
DL_SYSCTL_setMCLKSource(SYSOSC, HSCLK, DL_SYSCTL_HSCLK_SOURCE_SYSPLL);
}
else if(u8CLK_SRC==SYSOSC)

2
utils/utils.h
View File

@ -75,7 +75,7 @@ typedef enum
typedef enum
{
/*SysTick Period Options*/
Period_1ms = 24000, /*!< sets period of SysTick to 1ms */
Period_1ms = 48000, /*!< sets period of SysTick to 1ms @48Mhz*/
}xTicks_t;
typedef enum