diff --git a/.settings/org.eclipse.core.resources.prefs b/.settings/org.eclipse.core.resources.prefs index ee5c8f4..970a25f 100644 --- a/.settings/org.eclipse.core.resources.prefs +++ b/.settings/org.eclipse.core.resources.prefs @@ -38,10 +38,6 @@ encoding//Debug/SDK/drivers/Src/timers/subdir_rules.mk=UTF-8 encoding//Debug/SDK/drivers/Src/timers/subdir_vars.mk=UTF-8 encoding//Debug/TM1650_SDK/src/subdir_rules.mk=UTF-8 encoding//Debug/TM1650_SDK/src/subdir_vars.mk=UTF-8 -encoding//Debug/bs_touchAndLcd/socTouchDisplay_ert_rtw/subdir_rules.mk=UTF-8 -encoding//Debug/bs_touchAndLcd/socTouchDisplay_ert_rtw/subdir_vars.mk=UTF-8 -encoding//Debug/bs_touchAndLcd/subdir_rules.mk=UTF-8 -encoding//Debug/bs_touchAndLcd/subdir_vars.mk=UTF-8 encoding//Debug/ivec_APP/src/subdir_rules.mk=UTF-8 encoding//Debug/ivec_APP/src/subdir_vars.mk=UTF-8 encoding//Debug/ivec_ECU/ivec_ecu_can/src/subdir_rules.mk=UTF-8 diff --git a/Core/Source/ivec_mcal_mcan.c b/Core/Source/ivec_mcal_mcan.c index 1143d5f..9716823 100644 --- a/Core/Source/ivec_mcal_mcan.c +++ b/Core/Source/ivec_mcal_mcan.c @@ -25,6 +25,7 @@ volatile uint32_t l_canTransmitTimeout; volatile uint8_t u8CallBack_buff[8]={0}; volatile IVEC_McalStatus_e l_statusFlag = IVEC_MCAL_STATUS_SUCCESS; extern volatile uint8_t u8CANDataAct; +#define MCAN_FILTER_SIZE 0u /*REQUIRED MCAN CONFIGS*/ @@ -73,55 +74,107 @@ static DL_MCAN_ConfigParams gMCAN0ConfigParams={ .filterConfig.rrfe = false, .filterConfig.anfe = 0, .filterConfig.anfs = 0, +// .filterConfig.anfe = 3, +// .filterConfig.anfs = 3, }; + +//static DL_MCAN_MsgRAMConfigParams gMCAN0MsgRAMConfigParams ={ +// +// /* Standard ID Filter List Start Address. */ +// .flssa = 0 , +// /* List Size: Standard ID. */ +// .lss = 0 , +// /* Extended ID Filter List Start Address. */ +// .flesa = 0 , +// /* List Size: Extended ID. */ +// .lse = 0 , +// /* Tx Buffers Start Address. */ +// .txStartAddr = 10 , +// /* Number of Dedicated Transmit Buffers. */ +// .txBufNum = 10 , +// .txFIFOSize = 10, +// /* Tx Buffer Element Size. */ +// .txBufMode = 0, +// .txBufElemSize = DL_MCAN_ELEM_SIZE_8BYTES, +// /* Tx Event FIFO Start Address. */ +// .txEventFIFOStartAddr = 640 , +// /* Event FIFO Size. */ +// .txEventFIFOSize = 10 , +// /* Level for Tx Event FIFO watermark interrupt. */ +// .txEventFIFOWaterMark = 0, +// /* Rx FIFO0 Start Address. */ +// .rxFIFO0startAddr = 170 , +// /* Number of Rx FIFO elements. */ +// .rxFIFO0size = 10 , +// /* Rx FIFO0 Watermark. */ +// .rxFIFO0waterMark = 0, +// .rxFIFO0OpMode = 0, +// /* Rx FIFO1 Start Address. */ +// .rxFIFO1startAddr = 190 , +// /* Number of Rx FIFO elements. */ +// .rxFIFO1size = 10 , +// /* Level for Rx FIFO 1 watermark interrupt. */ +// .rxFIFO1waterMark = 10, +// /* FIFO blocking mode. */ +// .rxFIFO1OpMode = 0, +// /* Rx Buffer Start Address. */ +// .rxBufStartAddr = 208 , +// /* Rx Buffer Element Size. */ +// .rxBufElemSize = DL_MCAN_ELEM_SIZE_8BYTES, +// /* Rx FIFO0 Element Size. */ +// .rxFIFO0ElemSize = DL_MCAN_ELEM_SIZE_8BYTES, +// /* Rx FIFO1 Element Size. */ +// .rxFIFO1ElemSize = DL_MCAN_ELEM_SIZE_8BYTES, +//}; + static DL_MCAN_MsgRAMConfigParams gMCAN0MsgRAMConfigParams ={ - /* Standard ID Filter List Start Address. */ - .flssa = 0 , - /* List Size: Standard ID. */ - .lss = 0 , - /* Extended ID Filter List Start Address. */ - .flesa = 0 , - /* List Size: Extended ID. */ - .lse = 0 , - /* Tx Buffers Start Address. */ - .txStartAddr = 10 , - /* Number of Dedicated Transmit Buffers. */ - .txBufNum = 10 , - .txFIFOSize = 10, - /* Tx Buffer Element Size. */ - .txBufMode = 0, - .txBufElemSize = DL_MCAN_ELEM_SIZE_8BYTES, - /* Tx Event FIFO Start Address. */ - .txEventFIFOStartAddr = 640 , - /* Event FIFO Size. */ - .txEventFIFOSize = 10 , - /* Level for Tx Event FIFO watermark interrupt. */ - .txEventFIFOWaterMark = 0, - /* Rx FIFO0 Start Address. */ - .rxFIFO0startAddr = 170 , - /* Number of Rx FIFO elements. */ - .rxFIFO0size = 10 , - /* Rx FIFO0 Watermark. */ - .rxFIFO0waterMark = 0, - .rxFIFO0OpMode = 0, - /* Rx FIFO1 Start Address. */ - .rxFIFO1startAddr = 190 , - /* Number of Rx FIFO elements. */ - .rxFIFO1size = 10 , - /* Level for Rx FIFO 1 watermark interrupt. */ - .rxFIFO1waterMark = 10, - /* FIFO blocking mode. */ - .rxFIFO1OpMode = 0, - /* Rx Buffer Start Address. */ - .rxBufStartAddr = 208 , - /* Rx Buffer Element Size. */ - .rxBufElemSize = DL_MCAN_ELEM_SIZE_8BYTES, - /* Rx FIFO0 Element Size. */ - .rxFIFO0ElemSize = DL_MCAN_ELEM_SIZE_8BYTES, - /* Rx FIFO1 Element Size. */ - .rxFIFO1ElemSize = DL_MCAN_ELEM_SIZE_8BYTES, + /* Standard ID Filter List Start Address. */ + .flssa = 1, + /* List Size: Standard ID. */ + .lss = MCAN_FILTER_SIZE, + /* Extended ID Filter List Start Address. */ + .flesa = 48 , + /* List Size: Extended ID. */ + .lse = 0 , + /* Tx Buffers Start Address. */ + .txStartAddr = 10 , + /* Number of Dedicated Transmit Buffers. */ + .txBufNum = 10 , + .txFIFOSize = 10, + /* Tx Buffer Element Size. */ + .txBufMode = 0, + .txBufElemSize = DL_MCAN_ELEM_SIZE_8BYTES, + /* Tx Event FIFO Start Address. */ + .txEventFIFOStartAddr = 640 , + /* Event FIFO Size. */ + .txEventFIFOSize = 10 , + /* Level for Tx Event FIFO watermark interrupt. */ + .txEventFIFOWaterMark = 0, + /* Rx FIFO0 Start Address. */ + .rxFIFO0startAddr = 170 , + /* Number of Rx FIFO elements. */ + .rxFIFO0size = 10 , + /* Rx FIFO0 Watermark. */ + .rxFIFO0waterMark = 0, + .rxFIFO0OpMode = 0, + /* Rx FIFO1 Start Address. */ + .rxFIFO1startAddr = 190 , + /* Number of Rx FIFO elements. */ + .rxFIFO1size = 10 , + /* Level for Rx FIFO 1 watermark interrupt. */ + .rxFIFO1waterMark = 10, + /* FIFO blocking mode. */ + .rxFIFO1OpMode = 0, + /* Rx Buffer Start Address. */ + .rxBufStartAddr = 208 , + /* Rx Buffer Element Size. */ + .rxBufElemSize = DL_MCAN_ELEM_SIZE_8BYTES, + /* Rx FIFO0 Element Size. */ + .rxFIFO0ElemSize = DL_MCAN_ELEM_SIZE_8BYTES, + /* Rx FIFO1 Element Size. */ + .rxFIFO1ElemSize = DL_MCAN_ELEM_SIZE_8BYTES, }; static DL_MCAN_BitTimingParams gMCAN0BitTimes_500 = { @@ -164,17 +217,17 @@ static DL_MCAN_BitTimingParams gMCAN0BitTimes_250 = { static const DL_MCAN_StdMsgIDFilterElement gMCAN0StdFiltelem1 = { - .sfec = 0x1, - .sft = 0x01, - .sfid1 = 0x1AE, - .sfid2 = 0x520, + .sfec = 001, + .sft = 10, + .sfid1 = 0, + .sfid2 = 100, }; static const DL_MCAN_StdMsgIDFilterElement gMCAN0StdFiltelem2 = { .sfec = 0x1, .sft = 0x00, - .sfid1 = 0xBB, - .sfid2 = 0xBB, + .sfid1 = 200, + .sfid2 = 300, }; static const DL_MCAN_StdMsgIDFilterElement gMCAN0StdFiltelem3 = { @@ -201,8 +254,8 @@ static const DL_MCAN_StdMsgIDFilterElement gMCAN0StdFiltelem5 = { static const DL_MCAN_ExtMsgIDFilterElement gMCAN0ExtFiltelem1 = { .efec = 0x1, .eft = 0x0, - .efid1 = 0x18904001, - .efid2 = 0x18904001, + .efid1 = 30000, + .efid2 = 40000, }; static const DL_MCAN_ExtMsgIDFilterElement gMCAN0ExtFiltelem2 = { @@ -289,22 +342,34 @@ void CANFD0_IRQHandler(void) DL_MCAN_writeRxFIFOAck(CANFD0, rxFS.num, rxFS.getIdx); xCanIdType_t idType = ERROR; - if (TempRxMsg.id >= 0 && TempRxMsg.id <= 0x7FF) - { - idType = STD_ID; - } else if (TempRxMsg.id <= 0x1FFFFFFF) - { - idType = EXT_ID; - } +// if (TempRxMsg.id >= 0 && TempRxMsg.id <= 0x7FF) +// { +// idType = STD_ID; +// } else if (TempRxMsg.id <= 0x1FFFFFFF) +// { +// idType = EXT_ID; +// } +// +// for(int i=0;i<8;i++) +// { +// u8CallBack_buff[i]=(TempRxMsg.data[i] & 0xFF); +// } + + uint64_t idx = 0; + idx = TempRxMsg.id; + uint32_t value = ((TempRxMsg.id & (uint32_t) 0x1FFC0000) >> (uint32_t) 18); + if ((value > 0) && (value <= 0x7FF)) + if(TempRxMsg.xtd == 0) + { + idType = STD_ID; + idx = value; + idx = ((TempRxMsg.id & (uint32_t) 0x1FFC0000) >> (uint32_t) 18); + } - for(int i=0;i<8;i++) - { - u8CallBack_buff[i]=(TempRxMsg.data[i] & 0xFF); - } __asm("nop"); - TempRxID=TempRxMsg.id; + TempRxID = idx; _prv_vGetRxMsg(&TempRxMsg,&TempRxID ,TempRxBuffer,TempRxMsg.dlc); DL_MCAN_clearIntrStatus(CANFD0, IntrStatus,DL_MCAN_INTR_SRC_MCAN_LINE_1); b_ServiceInt = true; @@ -395,9 +460,9 @@ IVEC_McalStatus_e xMCAL_MCANInit(MCAN_Regs* MCAN, xCAN_baud_t BAUD) DL_MCAN_msgRAMConfig(MCAN, (DL_MCAN_MsgRAMConfigParams*) &gMCAN0MsgRAMConfigParams); /* Configure Standard ID filter element */ -// DL_MCAN_addStdMsgIDFilter(MCAN, 0U, (DL_MCAN_StdMsgIDFilterElement *) &gMCAN0StdFiltelem1); + // DL_MCAN_addStdMsgIDFilter(MCAN, 0U, (DL_MCAN_StdMsgIDFilterElement *) &gMCAN0StdFiltelem1); // -// DL_MCAN_addStdMsgIDFilter(MCAN, 1U, (DL_MCAN_StdMsgIDFilterElement *) &gMCAN0StdFiltelem2); + // DL_MCAN_addStdMsgIDFilter(MCAN, 1U, (DL_MCAN_StdMsgIDFilterElement *) &gMCAN0StdFiltelem2); // // DL_MCAN_addStdMsgIDFilter(MCAN, 2U, (DL_MCAN_StdMsgIDFilterElement *) &gMCAN0StdFiltelem3); // @@ -405,7 +470,7 @@ IVEC_McalStatus_e xMCAL_MCANInit(MCAN_Regs* MCAN, xCAN_baud_t BAUD) // // DL_MCAN_addStdMsgIDFilter(MCAN, 4U, (DL_MCAN_StdMsgIDFilterElement *) &gMCAN0StdFiltelem5); // -// DL_MCAN_addExtMsgIDFilter(MCAN, 0U,(DL_MCAN_ExtMsgIDFilterElement *)&gMCAN0ExtFiltelem1); + // DL_MCAN_addExtMsgIDFilter(MCAN, 0U,(DL_MCAN_ExtMsgIDFilterElement *)&gMCAN0ExtFiltelem1); // // DL_MCAN_addExtMsgIDFilter(MCAN, 1U,(DL_MCAN_ExtMsgIDFilterElement *)&gMCAN0ExtFiltelem2); // diff --git a/Core/Source/ivec_mcal_uart.c b/Core/Source/ivec_mcal_uart.c index 5d9f0f9..28bc6c3 100644 --- a/Core/Source/ivec_mcal_uart.c +++ b/Core/Source/ivec_mcal_uart.c @@ -316,11 +316,11 @@ exit: ///////////////////////////////////////////////////////////////////////////////////// static xCoreStatus_t uart_init(McalUartHandle_s* pxUartHandle, McalUartBaudRate_e xBaud) { -// DL_GPIO_initPeripheralOutputFunction(IOMUX_PINCM32, IOMUX_PINCM32_PF_UART2_TX); -// DL_GPIO_initPeripheralInputFunction(IOMUX_PINCM33, IOMUX_PINCM33_PF_UART2_RX); + DL_GPIO_initPeripheralOutputFunction(IOMUX_PINCM32, IOMUX_PINCM32_PF_UART2_TX); + DL_GPIO_initPeripheralInputFunction(IOMUX_PINCM33, IOMUX_PINCM33_PF_UART2_RX); - DL_GPIO_initPeripheralOutputFunction(IOMUX_PINCM19, IOMUX_PINCM19_PF_UART1_TX); - DL_GPIO_initPeripheralInputFunction(IOMUX_PINCM20, IOMUX_PINCM20_PF_UART1_RX); +// DL_GPIO_initPeripheralOutputFunction(IOMUX_PINCM19, IOMUX_PINCM19_PF_UART1_TX); +// DL_GPIO_initPeripheralInputFunction(IOMUX_PINCM20, IOMUX_PINCM20_PF_UART1_RX); // Get the UART instance based on the port number in the handle UART_Regs* uart_inst = GetUartInstance(pxUartHandle->eUartPortNumber); diff --git a/ivec_ECU/ivec_ecu_can/src/ivec_ecu_can.c b/ivec_ECU/ivec_ecu_can/src/ivec_ecu_can.c index e3061ae..e69fd79 100644 --- a/ivec_ECU/ivec_ecu_can/src/ivec_ecu_can.c +++ b/ivec_ECU/ivec_ecu_can/src/ivec_ecu_can.c @@ -61,7 +61,8 @@ IVEC_EcuCommonErr_e xECU_WriteDataOverCAN(uint8_t* pucBuf, uint32_t ulId, int re int Bytes = retCode; - l_i32Ret = xMCAL_MCANTx(CANFD0, xFrame.id, TxData, BufNum, Bytes); + //MCAL_MCANTx(MCAN_Regs *MCAN, uint32_t u32ID ,uint16_t *TxData, uint32_t BufNum, uint32_t Bytes) + l_i32Ret = xMCAL_MCANTx(CANFD0, ulId, TxData, BufNum, Bytes); if(l_i32Ret == IVEC_MCAL_STATUS_SUCCESS) { l_xFuncStatus = commonECU_SUCCESS; diff --git a/ivec_ECU/ivec_ecu_uart/src/ivec_ecu_uart.c b/ivec_ECU/ivec_ecu_uart/src/ivec_ecu_uart.c index 18ede0e..db0d850 100644 --- a/ivec_ECU/ivec_ecu_uart/src/ivec_ecu_uart.c +++ b/ivec_ECU/ivec_ecu_uart/src/ivec_ecu_uart.c @@ -72,7 +72,7 @@ IVEC_EcuCommonErr_e xECU_UARTInit(McalUartHandle_s* prvUartHandle, uint32_t spee } IVEC_ECU_LOG(LOG_STRING, "Initilising UART"); - prvUartHandle->eUartPortNumber = mcalUART_PORT2; + prvUartHandle->eUartPortNumber = mcalUART_PORT3; prvUartHandle->pvUartRecvCallback = __prv_vEcu_CANOverUartMsgCallback; prvUartHandle->xUartConfig.eUartBaudrate = speed; prvUartHandle->xUartConfig.eUartFlowCtrl = mcalUART_FC_NONE; diff --git a/utils/utils.c b/utils/utils.c index 7fc59e4..5080519 100644 --- a/utils/utils.c +++ b/utils/utils.c @@ -235,8 +235,8 @@ void vMCAL_DelayTicks(int i32Delay_ms) void xMCAL_McuInit() { SYSCFG_DL_initPower(); - DL_UART_Main_reset(UART1); - DL_UART_Main_enablePower(UART1); +// DL_UART_Main_reset(UART1); +// DL_UART_Main_enablePower(UART1); SYSCFG_DL_GPIO_init(); }