fix: Update clock configuration and UART/CAN settings

- Corrected clock configuration according to HFXT
- Set UART baud rate based on HFXT clock
- Configured CAN timing according to DL_MCAN_FCLK_HFCLK
stable
Rakshitavecmocon 2024-10-10 18:39:44 +05:30
parent 17131c3a34
commit 5b88394f22
9 changed files with 273 additions and 797 deletions

View File

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View File

@ -103,93 +103,3 @@ IVEC_McalCommonErr_e xMCAL_UartInit(McalUartHandle_s* pxHandleUart);
#endif /* IVEC_MCAL_UART_H */
//
///**
// * @file ivec_mcal_uart.h
// * @author Akshat Dabas (akshat@vecmocon.com)
// * @brief This header file contains API for UART Functionality
// * @version 0.1.0
// * @date 2024-Feb-17
// *
// * @copyright Copyright (c) 2024
// *
// */
//
//#ifndef CORE_INCLUDE_IVEC_MCAL_UART_H_
//#define CORE_INCLUDE_IVEC_MCAL_UART_H_
//
//#include "ti_msp_dl_config.h"
//#include "../utils/utils.h"
//#include <stdint.h>
//
//#define BUFFER_SIZE 100U
//#define SIZE 100U
//
//xCoreStatus_t xMCAL_uart_init(UART_Regs *uart_inst,xUart_baud_t xBaud);
//xCoreStatus_t xMCAL_uart_deinit(UART_Regs* uart_inst);
//xCoreStatus_t xMCAL_uart_getdata(UART_Regs *uart_inst, uint8_t *u8rxdata, uint32_t u32rxbuffer_size);
//xCoreStatus_t xMCAL_uart_transmit(UART_Regs *uart_inst, uint8_t *u8txdata,uint32_t u32size);
//xCoreStatus_t xMCAL_uart_bufferReset(UART_Regs * uart_inst);
//
//#endif /* CORE_INCLUDE_IVEC_MCAL_UART_H_ */

View File

@ -22,6 +22,7 @@ uint32_t IntrStatus;
static volatile uint8_t u8_MCAN_StatusFlag = IVEC_MCAL_STATUS_ERROR;
uint8_t g_CanData[8];
volatile DL_MCAN_ProtocolStatus HeaderStat;
#define MCAN_FILTER_SIZE 4u
/*REQUIRED MCAN CONFIGS*/
@ -29,7 +30,7 @@ volatile DL_MCAN_ProtocolStatus HeaderStat;
/*=======================================================================================PRIVATE_MEMBERS======================================================================================*/
static const DL_MCAN_ClockConfig gMCAN0ClockConf = {
.clockSel = DL_MCAN_FCLK_SYSPLLCLK1,////DL_MCAN_FCLK_SYSPLLCLK1,DL_MCAN_FCLK_HFCLK,
.clockSel = DL_MCAN_FCLK_HFCLK,////DL_MCAN_FCLK_SYSPLLCLK1,DL_MCAN_FCLK_HFCLK,
.divider = DL_MCAN_FCLK_DIV_1,
};
@ -53,7 +54,7 @@ static const DL_MCAN_InitParams gMCAN0InitParams= {
.tdcConfig.tdco = 6,
};
static const DL_MCAN_ConfigParams gMCAN0ConfigParams={
static DL_MCAN_ConfigParams gMCAN0ConfigParams={
/* Initialize MCAN Config parameters. */
.monEnable = false,
.asmEnable = false,
@ -68,12 +69,14 @@ static const DL_MCAN_ConfigParams gMCAN0ConfigParams={
.filterConfig.anfs = 1,
};
static const DL_MCAN_MsgRAMConfigParams gMCAN0MsgRAMConfigParams ={
static DL_MCAN_MsgRAMConfigParams gMCAN0MsgRAMConfigParams ={
/* Standard ID Filter List Start Address. */
.flssa = 0 ,
.flssa = 5 ,
/* List Size: Standard ID. */
.lss = 1 ,
.lss = MCAN_FILTER_SIZE,
/* Extended ID Filter List Start Address. */
.flesa = 48 ,
/* List Size: Extended ID. */
@ -124,16 +127,15 @@ static const DL_MCAN_StdMsgIDFilterElement gMCAN0StdFiltelem = {
.sfid2 = 2047,
};
static const DL_MCAN_BitTimingParams gMCAN0BitTimes_500 = {
static DL_MCAN_BitTimingParams gMCAN0BitTimes_500 = {
/* Arbitration Baud Rate Pre-scaler. */
.nomRatePrescalar = 0,
/* Arbitration Time segment before sample point. */
.nomTimeSeg1 = 62,
.nomTimeSeg1 = 41,
/* Arbitration Time segment after sample point. */
.nomTimeSeg2 = 15,
.nomTimeSeg2 = 4,
/* Arbitration (Re)Synchronization Jump Width Range. */
.nomSynchJumpWidth = 15,
.nomSynchJumpWidth = 4,
/* Data Baud Rate Pre-scaler. */
.dataRatePrescalar = 0,
/* Data Time segment before sample point. */
@ -144,6 +146,7 @@ static const DL_MCAN_BitTimingParams gMCAN0BitTimes_500 = {
.dataSynchJumpWidth = 0,
};
static const DL_MCAN_BitTimingParams gMCAN0BitTimes_250 = {
/* Arbitration Baud Rate Pre-scaler. */
.nomRatePrescalar = 0,
@ -280,16 +283,20 @@ void CANFD0_IRQHandler(void)
DL_MCAN_setOpMode(CANFD0, DL_MCAN_OPERATION_MODE_NORMAL);
}
else if (HeaderStat.lastErrCode == 4) {
// Initiate bus-off recovery
if (HeaderStat.lastErrCode) {
if (HeaderStat.lastErrCode != 3){
int status = -1;
printf("Attempting recovery...\n");
xECU_CanReInit(CANFD0 ,BAUD_500);
status = xECU_CanReInit(CANFD0 ,BAUD_500);
if(status == 0)
{
printf("done\n");
}
}
else
printf("tx ack err...\n");
}
if (IntrStatus & DL_MCAN_INTERRUPT_TC){
__asm("nop");
@ -299,7 +306,7 @@ void CANFD0_IRQHandler(void)
u8_MCAN_StatusFlag = IVEC_MCAL_STATUS_SUCCESS;
__asm("nop");
}
else if(IntrStatus & DL_MCAN_INTERRUPT_RF0N)
if(IntrStatus & DL_MCAN_INTERRUPT_RF0N)
{
b_ServiceInt = false;
rxFS.fillLvl = 0;
@ -335,9 +342,9 @@ void CANFD0_IRQHandler(void)
}
b_ServiceInt = true;
DL_MCAN_clearIntrStatus(CANFD0, IntrStatus,DL_MCAN_INTR_SRC_MCAN_LINE_1);
}
else{
//DL_MCAN_clearIntrStatus(CANFD0, IntrStatus,DL_MCAN_INTR_SRC_MCAN_LINE_1);
// }
// else{
DL_MCAN_getIntrStatus(CANFD0);
DL_MCAN_clearIntrStatus(CANFD0, IntrStatus,DL_MCAN_INTR_SRC_MCAN_LINE_1);
}
@ -359,6 +366,9 @@ void CANFD0_IRQHandler(void)
*/
IVEC_McalStatus_e xMCAL_MCANInit(MCAN_Regs* MCAN, xCAN_baud_t BAUD)
{
// DL_GPIO_initPeripheralOutputFunction(IOMUX_PINCM59, IOMUX_PINCM59_PF_CANFD0_CANTX); //ok
// DL_GPIO_initPeripheralInputFunction(IOMUX_PINCM60, IOMUX_PINCM60_PF_CANFD0_CANRX);
assert(MCAN == CANFD0);
assert(BAUD == BAUD_500 || BAUD == BAUD_250);
assert(b_MCAN_InitFlag == 0);
@ -445,19 +455,32 @@ IVEC_McalStatus_e xMCAL_MCANInit(MCAN_Regs* MCAN, xCAN_baud_t BAUD)
* @param MCAN Pointer to the register overlay for the peripheral
* @retval IVEC MCAL status
*/
IVEC_McalStatus_e xMCAL_MCANDeInit(MCAN_Regs* MCAN)
{
assert(MCAN == CANFD0);
assert(b_MCAN_InitFlag != 0);
DL_MCAN_disableInterrupt(MCAN, (DL_MCAN_MSP_INTERRUPT_LINE1));
assert(b_MCAN_InitFlag != 0); // Ensure the module was initialized before deinitializing.
/* Disable MSPM0 MCAN interrupt */
NVIC_DisableIRQ(CANFD0_INT_IRQn);
DL_MCAN_disableInterrupt(MCAN, DL_MCAN_MSP_INTERRUPT_LINE1);
DL_MCAN_disablePower(MCAN);
/* Put MCAN in SW initialization mode to stop it */
DL_MCAN_setOpMode(MCAN, DL_MCAN_OPERATION_MODE_SW_INIT);
/* Wait till MCAN is in SW initialization mode */
while (DL_MCAN_OPERATION_MODE_SW_INIT != DL_MCAN_getOpMode(MCAN));
/* Disable the MCAN clock */
DL_MCAN_disableModuleClock(MCAN);
/* Clear initialization flag */
b_MCAN_InitFlag = 0;
return IVEC_MCAL_STATUS_SUCCESS;
return IVEC_MCAL_STATUS_SUCCESS;
}
/**
* @brief Function to Transmit CAN message
* @param MCAN Pointer to the register overlay for the peripheral
@ -471,39 +494,31 @@ IVEC_McalStatus_e xMCAL_MCANTx(MCAN_Regs *MCAN, DL_MCAN_TxBufElement *TxMsg ,uin
{
assert(MCAN == CANFD0);
assert(b_MCAN_InitFlag != 0);
int result = -1;
for(int i=0;i<Bytes;i++)
{
TxMsg->data[i] = TxData[i];
}
// uint32_t txPendingStatus;
//
// //Check if the Tx Buffer is available (no pending request)
// txPendingStatus = DL_MCAN_getTxBufReqPend(MCAN);
//
// //Check if the specified buffer (BufNum) is available
// if ((txPendingStatus & (1 << BufNum)) == 0)
// {
DL_MCAN_writeMsgRam(MCAN, DL_MCAN_MEM_TYPE_BUF, BufNum , TxMsg);
result = DL_MCAN_TXBufAddReq(MCAN, BufNum);
if(result == 0)
uint32_t txPendingStatus;
//Check if the Tx Buffer is available (no pending request)
txPendingStatus = DL_MCAN_getTxBufReqPend(MCAN);
//Check if the specified buffer (BufNum) is available
if ((txPendingStatus & (1 << BufNum)) == 0)
{
printf("pass\n");
DL_MCAN_writeMsgRam(MCAN, DL_MCAN_MEM_TYPE_BUF, BufNum , TxMsg);
DL_MCAN_TXBufAddReq(MCAN, BufNum);
}
else
{
printf("result %d\n",result);
printf("fail\n");
}
// }
// else
// {
printf("tx pending\n");
//return IVEC_MCAL_STATUS_BUSY;
//
// }
}
return IVEC_MCAL_STATUS_SUCCESS;
}

View File

@ -488,7 +488,7 @@ static xCoreStatus_t uart_init(McalUartHandle_s* pxUartHandle, McalUartBaudRate_
// }
DL_UART_ClockConfig gUART_0ClockConfig ={0};
gUART_0ClockConfig.clockSel = DL_UART_MAIN_CLOCK_BUSCLK;
gUART_0ClockConfig.clockSel = DL_UART_CLOCK_BUSCLK;
gUART_0ClockConfig.divideRatio = DL_UART_MAIN_CLOCK_DIVIDE_RATIO_1;
DL_UART_Main_setClockConfig(uart_inst, (DL_UART_Main_ClockConfig *) &gUART_0ClockConfig);
@ -504,8 +504,13 @@ static xCoreStatus_t uart_init(McalUartHandle_s* pxUartHandle, McalUartBaudRate_
* Actual baud rate: 115211.52
*/
// DL_UART_Main_setOversampling(uart_inst, DL_UART_OVERSAMPLING_RATE_16X);
// DL_UART_Main_setBaudRateDivisor(uart_inst, 17, 23);
DL_UART_Main_setOversampling(uart_inst, DL_UART_OVERSAMPLING_RATE_16X);
DL_UART_Main_setBaudRateDivisor(uart_inst, 17, 23);
DL_UART_Main_setBaudRateDivisor(uart_inst, 13, 1);
}
else if(xBaud==9600)
@ -686,479 +691,3 @@ exit:
}
//
//
///**
// * @file ivec_mcal_uart.c
// * @author Akshat Dabas (akshat@vecmocon.com)
// * @brief This source file contains API and Private members for UART Functionality
// * @version 0.1.0
// * @date 2024-Feb-17
// *
// * @copyright Copyright (c) 2024
// *
// */
//
//#include "../Core/Include/ivec_mcal_uart.h"
//#include "string.h"
//
///*GENERALIZED UART PERIPHERAL CONFIG*/
//
///*=======================================================================================PRIVATE_MEMBERS======================================================================================*/
//
//static volatile bool b_UART1_init_flag=0;
//
//static volatile bool b_UART3_init_flag=0;
//#define BUFFER_SIZE 100U
//
//static volatile uint8_t u8rxbuffer1[BUFFER_SIZE]={0};
//
//static volatile uint8_t u8rxbuffer3[BUFFER_SIZE]={0};
//
//static volatile int i32bufferIdx1=0;
//
//static volatile int i32bufferIdx3=0;
//
//
//static const DL_UART_Main_ClockConfig gUART_0ClockConfig = {
// .clockSel = DL_UART_MAIN_CLOCK_BUSCLK,
// .divideRatio = DL_UART_MAIN_CLOCK_DIVIDE_RATIO_1
//};
//
//static const DL_UART_Main_Config gUART_0Config = {
// .mode = DL_UART_MAIN_MODE_RS485,//DL_UART_MAIN_MODE_NORMAL,
// .direction = DL_UART_MAIN_DIRECTION_TX_RX,
// .flowControl = DL_UART_MAIN_FLOW_CONTROL_NONE,
// .parity = DL_UART_MAIN_PARITY_NONE,
// .wordLength = DL_UART_MAIN_WORD_LENGTH_8_BITS,
// .stopBits = DL_UART_MAIN_STOP_BITS_ONE
//};
//
//static void _prv_vrxcallback();
//static uint8_t _prv_u8MCAL_uart_receive(UART_Regs *uart_inst);
//
///*____________________________________________________________________________________________________________________________________________________________________________________________*/
//
//
///*=============================================================================================================================================================================================
// PRIVATE_DECLARATIONS
//==============================================================================================================================================================================================*/
//
///**
// * @brief Default Interrupt Callback for UART
// *
// */
//void UART3_IRQHandler()
//{
// _prv_vrxcallback();
//}
//
//void UART1_IRQHandler()
//{
// _prv_vrxcallback();
//}
///**
// * @brief Function to read byte by byte in IRQ Handler
// *
// */
//void _prv_vrxcallback()
//{
// switch (DL_UART_Main_getPendingInterrupt(UART1))
// {
// case DL_UART_MAIN_IIDX_RX:
//
// if(i32bufferIdx1>BUFFER_SIZE-1)
// {
// i32bufferIdx1=0;
// }
// while (!DL_UART_Main_isRXFIFOEmpty(UART1)) {
// u8rxbuffer1[i32bufferIdx1++] = DL_UART_Main_receiveData(UART1);
// }
//// u8rxbuffer1[i32bufferIdx1]=_prv_u8MCAL_uart_receive(UART1);
//// i32bufferIdx1++;
// break;
//
// case DL_UART_MAIN_IIDX_OVERRUN_ERROR:
// __asm("nop");
// break;
// case DL_UART_MAIN_IIDX_BREAK_ERROR:
// __asm("nop");
// break;
// case DL_UART_MAIN_IIDX_PARITY_ERROR:
// __asm("nop");
// break;
// case DL_UART_MAIN_IIDX_FRAMING_ERROR:
// __asm("nop");
// break;
// case DL_UART_MAIN_IIDX_RX_TIMEOUT_ERROR:
// __asm("nop");
// break;
// case DL_UART_MAIN_IIDX_NOISE_ERROR:
// __asm("nop");
// break;
// default:
// break;
// }
//
// switch (DL_UART_Main_getPendingInterrupt(UART3))
// {
// case DL_UART_MAIN_IIDX_RX:
//
// if(i32bufferIdx3>BUFFER_SIZE-1)
// {
// i32bufferIdx3=0;
// }
// u8rxbuffer3[i32bufferIdx3]=_prv_u8MCAL_uart_receive(UART3);
// i32bufferIdx3++;
// break;
//
// case DL_UART_MAIN_IIDX_OVERRUN_ERROR:
// __asm("nop");
// break;
// case DL_UART_MAIN_IIDX_BREAK_ERROR:
// __asm("nop");
// break;
// case DL_UART_MAIN_IIDX_PARITY_ERROR:
// __asm("nop");
// break;
// case DL_UART_MAIN_IIDX_FRAMING_ERROR:
// __asm("nop");
// break;
// case DL_UART_MAIN_IIDX_RX_TIMEOUT_ERROR:
// __asm("nop");
// break;
// case DL_UART_MAIN_IIDX_NOISE_ERROR:
// __asm("nop");
// break;
// default:
// break;
// }
//
//}
//
//
///**
// * @brief Receive in static buffer Function for UART
// *
// * @param uart_inst
// * @return uint8_t
// */
//static uint8_t _prv_u8MCAL_uart_receive(UART_Regs *uart_inst)
//{
//
// uint8_t temp;
// temp=DL_UART_receiveData(uart_inst);
// return temp;
//
//}
///*____________________________________________________________________________________________________________________________________________________________________________________________*/
//
//
//
//
///*=============================================================================================================================================================================================
// API
//==============================================================================================================================================================================================*/
//
//
///**
// * @brief Initialize UART Peripheral
// *
// * @param uart_inst Pointer to UART config registers
// * @param xBaud enum for desired UART baud rate
// * @return xCoreStatus_t
// */
//
//xCoreStatus_t xMCAL_uart_init(UART_Regs *uart_inst, xUart_baud_t xBaud)
//{
//// DL_GPIO_initPeripheralOutputFunction(IOMUX_PINCM21, IOMUX_PINCM21_PF_UART0_TX);
//// DL_GPIO_initPeripheralInputFunction(IOMUX_PINCM22, IOMUX_PINCM22_PF_UART0_RX);
//
//// DL_GPIO_initPeripheralOutputFunction(IOMUX_PINCM20, IOMUX_PINCM20_PF_UART1_RX);
//// DL_GPIO_initPeripheralInputFunction(IOMUX_PINCM19, IOMUX_PINCM19_PF_UART1_TX);
//// assert(uart_inst == UART1 || uart_inst == UART3);IOMUX_PINCM16
//// assert(xBaud == BAUD_115200 || xBaud == BAUD_9600);
//// assert(!(b_UART1_init_flag == 1 && b_UART3_init_flag == 1));
//
//
// DL_UART_Main_setClockConfig(uart_inst, (DL_UART_Main_ClockConfig *) &gUART_0ClockConfig);
// DL_UART_Main_init(uart_inst, (DL_UART_Main_Config *) &gUART_0Config);
//
// /* Configure baud rate by setting oversampling and baud rate divisors.*/
//
// if(xBaud==BAUD_115200)
// {
//
// /*
// * Target baud rate: 115200
// * Actual baud rate: 115211.52
// */
//
// DL_UART_Main_setOversampling(uart_inst, DL_UART_OVERSAMPLING_RATE_16X);
// DL_UART_Main_setBaudRateDivisor(uart_inst, 17, 23);
//
// }
// else if(xBaud==BAUD_9600)
// {
// DL_UART_Main_setOversampling(uart_inst, DL_UART_OVERSAMPLING_RATE_16X);
// DL_UART_Main_setBaudRateDivisor(uart_inst, 208, 21);
//
// }
//
// /* Configure Interrupts */
//
//// if(uart_inst==UART1)
//// {
// DL_UART_Main_enableInterrupt(uart_inst,
// DL_UART_MAIN_INTERRUPT_BREAK_ERROR |
// DL_UART_MAIN_INTERRUPT_FRAMING_ERROR |
// DL_UART_MAIN_INTERRUPT_NOISE_ERROR |
// DL_UART_MAIN_INTERRUPT_OVERRUN_ERROR |
// DL_UART_MAIN_INTERRUPT_PARITY_ERROR |
// DL_UART_MAIN_INTERRUPT_RX |
// DL_UART_MAIN_INTERRUPT_RX_TIMEOUT_ERROR);
//
//
// DL_UART_Main_enable(uart_inst);
// /*Clearing and Enabling Interrupt Requests*/
//
// NVIC_ClearPendingIRQ(UART1_INT_IRQn);
// NVIC_EnableIRQ(UART1_INT_IRQn);
// b_UART1_init_flag=1;
// //}
//// else if(uart_inst==UART3)
//// {
////
////
//// DL_UART_Main_enableInterrupt(uart_inst,
//// DL_UART_MAIN_INTERRUPT_BREAK_ERROR |
//// DL_UART_MAIN_INTERRUPT_FRAMING_ERROR |
//// DL_UART_MAIN_INTERRUPT_NOISE_ERROR |
//// DL_UART_MAIN_INTERRUPT_OVERRUN_ERROR |
//// DL_UART_MAIN_INTERRUPT_PARITY_ERROR |
//// DL_UART_MAIN_INTERRUPT_RX |
//// DL_UART_MAIN_INTERRUPT_RX_TIMEOUT_ERROR);
////
////
//// DL_UART_Main_enable(uart_inst);
//// /*Clearing and Enabling Interrupt Requests*/
////
//// NVIC_ClearPendingIRQ(UART3_INT_IRQn);
//// NVIC_EnableIRQ(UART3_INT_IRQn);
//// b_UART3_init_flag=1;
//// }
//
// return STATUS_SUCCESS;//TODO: FIX RETURN BUG
//}
//
///**
// * @brief
// *
// * @param uart_inst Pointer to UART config registers
// * @return xCoreStatus_t
// */
//xCoreStatus_t xMCAL_uart_deinit(UART_Regs* uart_inst)
//{
//// assert(b_UART1_init_flag == 1 || b_UART3_init_flag == 1);
//// assert(uart_inst == UART1 || uart_inst == UART3);
//
//// if(uart_inst==UART1)
//// {
// NVIC_DisableIRQ(UART1_INT_IRQn);
// DL_UART_disablePower(uart_inst);
// b_UART1_init_flag=0;
// //}
//// else if(uart_inst==UART3)
//// {
//// NVIC_DisableIRQ(UART3_INT_IRQn);
//// DL_UART_disablePower(uart_inst);
//// b_UART3_init_flag=0;
//// }
// return STATUS_SUCCESS;
//}
//
///**
// * @brief Function to send received data to main
// *
// * @param uart_inst Pointer to UART config registers
// * @param u8rxdata Pointer to data buffer to receive data in
// * @return xCoreStatus_t
// */
//xCoreStatus_t xMCAL_uart_getdata(UART_Regs *uart_inst, uint8_t *u8rxdata, uint32_t u32rxbuffer_size)
//{
//// assert(b_UART1_init_flag == 1 || b_UART3_init_flag == 1);
//// assert(uart_inst == UART1 || uart_inst == UART3);
//
//// if((i32bufferIdx1==0)&&(i32bufferIdx3==0))
//// {
//// return STATUS_ERROR;
//// }
//
//
// //if(uart_inst==UART1)
// //{
//
//// for(int i=0;i<u32rxbuffer_size;i++)
//// {
// for(int j=0;j<=i32bufferIdx1;j++)
// {
// u8rxdata[j]=u8rxbuffer1[j];
// }
// //}
// return STATUS_SUCCESS;
//// }
//// else if(uart_inst==UART3)
//// {
//// for(int i=0;i<u32rxbuffer_size;i++)
//// {
//// for(int j=0;j<=i32bufferIdx3;j++)
//// {
//// u8rxdata[j]=u8rxbuffer3[j];
//// }
//// }
////
//// xMCAL_uart_bufferReset(uart_inst);
//// return STATUS_SUCCESS;
//// }
// return STATUS_ERROR;
//}
//
//
///**
// * @brief Function to directly transmit through UART
// *
// * @param uart_inst Pointer to UART config registers
// * @param u8txdata Pointer to data buffer to be sent
// * @param u32size Size of the passed buffer
// * @return xCoreStatus_t
// */
//xCoreStatus_t xMCAL_uart_transmit(UART_Regs *uart_inst, uint8_t *u8txdata, uint32_t u32size)
//{
//// assert(b_UART1_init_flag == 1 || b_UART3_init_flag == 1);
//// assert(uart_inst == UART1 || uart_inst == UART3);
//
//// if(u32size==0)
//// {
//// return STATUS_ERROR;
//// }
//
// for(int j=0;j<u32size;j++)
// {
//
// DL_UART_transmitData(uart_inst,u8txdata[j]);
// //DL_UART_transmitDataBlocking(uart_inst, u8txdata[j]);
// //while (DL_UART_isBusy(uart_inst));
// while(DL_UART_Main_isBusy(uart_inst));
// }
//
// return STATUS_SUCCESS;
//
//}
//
///**
// * @brief Function to Reset static u8rxbuffer on command
// *
// * @param uart_inst Pointer to UART config registers
// * @return xCoreStatus_t
// */
//xCoreStatus_t xMCAL_uart_bufferReset(UART_Regs *uart_inst)
//{
//// assert(b_UART1_init_flag == 1 || b_UART3_init_flag == 1);
//// assert(uart_inst == UART1 || uart_inst == UART3);
//
// //if(uart_inst==UART1)
// {
// i32bufferIdx1=0;
// memset((uint8_t *)&u8rxbuffer1[0], 0, sizeof(u8rxbuffer1));
// }
//// else if(uart_inst==UART3)
//// {
//// i32bufferIdx3=0;
//// memset((uint8_t *)&u8rxbuffer3[0], 0, sizeof(u8rxbuffer3));
//// }
//
// return STATUS_SUCCESS;
//}
///*____________________________________________________________________________________________________________________________________________________________________________________________*/
//

View File

@ -20,7 +20,6 @@ uint8_t store_msg_from_isr_to_queue(uint32_t id, uint8_t* data, uint8_t len)
buff.id = id;
buff.length = len;
memcpy(buff.data, data, len);
printf("ENQUEUE %d\n",id);
ENQUEUE(g_canQueue, buff);
return 0;
}
@ -64,7 +63,7 @@ IVEC_EcuCommonErr_e xECU_WriteDataOverCAN(uint8_t* pucBuf, uint32_t ulId, int re
// Number of bytes to transmit (retCode holds DLC)
int Bytes = retCode;
printf("bufnum %d\n",BufNum);
//printf("bufnum %d\n",BufNum);
l_i32Ret = xMCAL_MCANTx(CANFD0, &xFrame, TxData, BufNum, Bytes);
if(l_i32Ret == IVEC_MCAL_STATUS_SUCCESS)
{
@ -100,8 +99,6 @@ IVEC_EcuCommonErr_e xECU_CanReInit(MCAN_Regs* MCAN,uint16_t speed)
{
l_xFuncStatus = commonECU_DEINIT_FAIL;
}
//vCanConfigFilter();
DL_UART_Main_enablePower(MCAN);
l_i32Ret = xMCAL_MCANInit(MCAN,speed);
if(l_i32Ret != IVEC_MCAL_STATUS_SUCCESS)
{

View File

@ -13,7 +13,6 @@ static uint8_t g_prv_u8CANUartDataBuffer[CAN_UART_BUFFER_MAX_SIZE];
CmplxFifoQueueHandle_s __gprv_MyEcuUARTResponseQueue = { 0 };
CmplxFifoQueueHandle_s __gprv_MyEcuCANResponseQueue = { 0 };
static uint32_t g_prv_u32CanUartDataAvailable = 0;
uint8_t QueueBuffer[100];
@ -87,18 +86,6 @@ IVEC_EcuCommonErr_e xECU_UARTInit(McalUartHandle_s* prvUartHandle)
goto exit;
}
IVEC_ECU_LOG(LOG_STRING, "CAN Initilising Queue");
__gprv_MyEcuCANResponseQueue.i32ElementSize = sizeof(uint8_t);
__gprv_MyEcuCANResponseQueue.i32TotalElements = 100;
__gprv_MyEcuCANResponseQueue.pu8Buffer = (uint8_t*)QueueBuffer;
__gprv_MyEcuCANResponseQueue.i32QueueType = FIXED_ELEMENT_SIZE_QUEUE;
l_i32Ret = u8CMPLX_FifoQueueInit(&__gprv_MyEcuCANResponseQueue);
if (l_i32Ret == 0)
{
l_xFuncStatus = commonECU_FAIL;
goto exit;
}
IVEC_ECU_LOG(LOG_STRING, "Initilising UART");
prvUartHandle->eUartPortNumber = mcalUART_PORT3;
prvUartHandle->pvUartRecvCallback = __prv_vEcu_CANOverUartMsgCallback;

44
main.c
View File

@ -141,7 +141,7 @@ void UARTDataProcess()
uint32_t ulId = 0xffffffff;
retCode= xECU_ReadCANDataOverUART(&prvUartHandle,pucBuf,&ulId);
printf("length %d\n",retCode);
// printf("length %d\n",retCode);
if(retCode > -1)
{
if(ulId == 0x00)
@ -149,26 +149,27 @@ void UARTDataProcess()
vECU_InitiateUartToCanTransmit(&prvUartHandle, ulId, pucBuf, 0);
}
else{
if(count == 0){
xECU_WriteDataOverCAN(pucBuf, ulId, retCode, 0);
printf("%d\n",count);
count = 1;
}
else if (count == 1){
xECU_WriteDataOverCAN(pucBuf, ulId, retCode, 1);
printf("%d\n",count);
count = 2;
}
else if (count == 2){
xECU_WriteDataOverCAN(pucBuf, ulId, retCode, 2);
printf("%d\n",count);
count = 3;
}
else{
xECU_WriteDataOverCAN(pucBuf, ulId, retCode, 3);
printf("%d\n",count);
count = 0;
}
// if(count == 0){
// xECU_WriteDataOverCAN(pucBuf, ulId, retCode, 0);
// printf("%d\n",count);
// count = 1;
// }
// else if (count == 1){
// xECU_WriteDataOverCAN(pucBuf, ulId, retCode, 1);
// printf("%d\n",count);
// count = 2;
// }
// else if (count == 2){
// xECU_WriteDataOverCAN(pucBuf, ulId, retCode, 2);
// printf("%d\n",count);
// count = 3;
// }
// else{
// xECU_WriteDataOverCAN(pucBuf, ulId, retCode, 3);
// printf("%d\n",count);
// count = 0;
// }
}
}
@ -182,7 +183,6 @@ void CANDataProcess()
{
vECU_InitiateUartToCanTransmit(&prvUartHandle, (uint32_t)xBuff.id, (uint8_t*)&xBuff.data[0], (uint8_t)xBuff.length);
}
//delay(3200000);
}
@ -190,7 +190,7 @@ int main(void)
{
xMCAL_McuInit();
printf("hii\n");
xMCAL_SYSCTL_INIT(SYSOSC,STANDBY0);
xMCAL_SYSCTL_INIT(HFXT,STANDBY0);
xMCAL_SYSTICK_INIT(Period_1ms);
// Initialize the timer with the desired timeout value

View File

@ -1,7 +1,7 @@
/**
* These arguments were used when this file was generated. They will be automatically applied on subsequent loads
* via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments.
* @cliArgs --device "MSPM0G350X" --package "LQFP-48(PT)" --part "Default" --product "mspm0_sdk@2.01.00.03"
* @cliArgs --device "MSPM0G350X" --package "VQFN-48(RGZ)" --part "Default" --product "mspm0_sdk@2.01.00.03"
* @versions {"tool":"1.19.0+3426"}
*/
@ -31,27 +31,15 @@ const ProjectConfig = scripting.addModule("/ti/project_config/ProjectConfig");
/**
* Write custom configuration values to the imported modules.
*/
const divider2 = system.clockTree["HFCLK4MFPCLKDIV"];
divider2.divideValue = 6;
const divider7 = system.clockTree["PLL_PDIV"];
divider7.divideValue = 4;
const gate7 = system.clockTree["MFCLKGATE"];
gate7.enable = true;
const gate8 = system.clockTree["MFPCLKGATE"];
gate8.enable = true;
const multiplier2 = system.clockTree["PLL_QDIV"];
multiplier2.multiplyValue = 10;
const mux2 = system.clockTree["CANCLKMUX"];
mux2.inputSelect = "CANCLKMUX_PLLCLK1_OUT";
const mux4 = system.clockTree["EXHFMUX"];
mux4.inputSelect = "EXHFMUX_XTAL";
const mux8 = system.clockTree["HSCLKMUX"];
mux8.inputSelect = "HSCLKMUX_SYSPLL0";
const mux12 = system.clockTree["SYSPLLMUX"];
mux12.inputSelect = "zSYSPLLMUX_HFCLK";
const pinFunction3 = system.clockTree["HFCLKEXT"];
pinFunction3.inputFreq = 24;
@ -59,6 +47,7 @@ const pinFunction4 = system.clockTree["HFXT"];
pinFunction4.inputFreq = 24;
pinFunction4.HFXTStartup = 10;
pinFunction4.HFCLKMonitor = true;
pinFunction4.enable = true;
CAPTURE1.$name = "CAPTURE_0";
CAPTURE1.timerClkPrescale = 32;
@ -105,29 +94,6 @@ I2C1.sclPinConfig.$name = "ti_driverlib_gpio_GPIOPinGeneric8";
MCAN1.$name = "MCAN0";
MCAN1.fdMode = false;
MCAN1.stdFiltElem = "001";
MCAN1.stdFiltType = "00";
MCAN1.stdFiltID2 = 2047;
MCAN1.txBufNum = 10;
MCAN1.txFIFOSize = 10;
MCAN1.txBufElemSize = "DL_MCAN_ELEM_SIZE_8BYTES";
MCAN1.txEventFIFOSize = 10;
MCAN1.txEventFIFOWaterMark = 0;
MCAN1.txEventFIFOStartAddr = 640;
MCAN1.rxBufElemSize = "DL_MCAN_ELEM_SIZE_8BYTES";
MCAN1.rxFIFO0ElemSize = "DL_MCAN_ELEM_SIZE_8BYTES";
MCAN1.rxFIFO1ElemSize = "DL_MCAN_ELEM_SIZE_8BYTES";
MCAN1.enableInterrupt = true;
MCAN1.interruptFlags = ["DL_MCAN_INTERRUPT_ARA","DL_MCAN_INTERRUPT_BEU","DL_MCAN_INTERRUPT_BO","DL_MCAN_INTERRUPT_DRX","DL_MCAN_INTERRUPT_ELO","DL_MCAN_INTERRUPT_EP","DL_MCAN_INTERRUPT_EW","DL_MCAN_INTERRUPT_MRAF","DL_MCAN_INTERRUPT_PEA","DL_MCAN_INTERRUPT_PED","DL_MCAN_INTERRUPT_RF0N","DL_MCAN_INTERRUPT_TC","DL_MCAN_INTERRUPT_TEFN","DL_MCAN_INTERRUPT_TOO","DL_MCAN_INTERRUPT_TSW","DL_MCAN_INTERRUPT_WDI"];
MCAN1.interruptLine = ["DL_MCAN_INTR_LINE_NUM_1"];
MCAN1.interruptLine1Flag = ["DL_MCAN_INTR_MASK_ALL"];
MCAN1.m0interrupts = ["DL_MCAN_MSP_INTERRUPT_LINE1"];
MCAN1.rxFIFO0size = 10;
MCAN1.rxFIFO0waterMark = 0;
MCAN1.rxFIFO1size = 10;
MCAN1.rxFIFO1waterMark = 10;
MCAN1.txStartAddr = 20;
MCAN1.peripheral.$assign = "CANFD0";
MCAN1.peripheral.rxPin.$assign = "PA27";
MCAN1.peripheral.txPin.$assign = "PA26";
MCAN1.txPinConfig.$name = "ti_driverlib_gpio_GPIOPinGeneric0";
@ -177,6 +143,7 @@ TIMER1.peripheral.$assign = "TIMG0";
UART1.$name = "UART_1";
UART1.enabledInterrupts = ["BREAK_ERROR","FRAMING_ERROR","NOISE_ERROR","OVERRUN_ERROR","PARITY_ERROR","RX","RX_TIMEOUT_ERROR"];
UART1.targetBaudRate = 115200;
UART1.peripheral.$assign = "UART1";
UART1.peripheral.rxPin.$assign = "PA9";
UART1.peripheral.txPin.$assign = "PA8";
@ -185,10 +152,19 @@ UART1.txPinConfig.hideOutputInversion = scripting.forceWrite(false);
UART1.txPinConfig.onlyInternalResistor = scripting.forceWrite(false);
UART1.txPinConfig.passedPeripheralType = scripting.forceWrite("Digital");
UART1.txPinConfig.$name = "ti_driverlib_gpio_GPIOPinGeneric2";
UART1.rxPinConfig.$name = "ti_driverlib_gpio_GPIOPinGeneric12";
UART1.rxPinConfig.hideOutputInversion = scripting.forceWrite(false);
UART1.rxPinConfig.onlyInternalResistor = scripting.forceWrite(false);
UART1.rxPinConfig.passedPeripheralType = scripting.forceWrite("Digital");
UART1.rxPinConfig.$name = "ti_driverlib_gpio_GPIOPinGeneric12";
ProjectConfig.deviceSpin = "MSPM0G3507";
scripting.suppress("Migrating requires going through the Switch Board or Device menu in the Device View section\\.", ProjectConfig, "deviceSpin");
/**
* Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future
* version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to
* re-solve from scratch.
*/
pinFunction4.peripheral.$suggestSolution = "SYSCTL";
pinFunction4.peripheral.hfxInPin.$suggestSolution = "PA5";
pinFunction4.peripheral.hfxOutPin.$suggestSolution = "PA6";
MCAN1.peripheral.$suggestSolution = "CANFD0";

View File

@ -40,19 +40,21 @@ uint8_t u8SysTick_initFlag=0;
// .pDiv = DL_SYSCTL_SYSPLL_PDIV_2
//};
static const DL_SYSCTL_SYSPLLConfig gSYSPLLConfig = {
.inputFreq = DL_SYSCTL_SYSPLL_INPUT_FREQ_8_16_MHZ,
.rDivClk2x = 1,
.rDivClk1 = 0,
.rDivClk0 = 0,
.enableCLK2x = DL_SYSCTL_SYSPLL_CLK2X_DISABLE,
.enableCLK1 = DL_SYSCTL_SYSPLL_CLK1_ENABLE,
.enableCLK0 = DL_SYSCTL_SYSPLL_CLK0_DISABLE,
.sysPLLMCLK = DL_SYSCTL_SYSPLL_MCLK_CLK0,
.sysPLLRef = DL_SYSCTL_SYSPLL_REF_SYSOSC,
.qDiv = 9,
.pDiv = DL_SYSCTL_SYSPLL_PDIV_4
};
//static const DL_SYSCTL_SYSPLLConfig gSYSPLLConfig = {
// .inputFreq = DL_SYSCTL_SYSPLL_INPUT_FREQ_8_16_MHZ,
// .rDivClk2x = 1,
// .rDivClk1 = 0,
// .rDivClk0 = 0,
// .enableCLK2x = DL_SYSCTL_SYSPLL_CLK2X_DISABLE,
// .enableCLK1 = DL_SYSCTL_SYSPLL_CLK1_ENABLE,
// .enableCLK0 = DL_SYSCTL_SYSPLL_CLK0_DISABLE,
// .sysPLLMCLK = DL_SYSCTL_SYSPLL_MCLK_CLK0,
// .sysPLLRef = DL_SYSCTL_SYSPLL_REF_SYSOSC,
// .qDiv = 9,
// .pDiv = DL_SYSCTL_SYSPLL_PDIV_4
//};
void mcuInit(void)
{
SYSCFG_DL_initPower();
@ -62,26 +64,43 @@ void mcuInit(void)
xCoreStatus_t xMCAL_SYSTICK_INIT(xTicks_t tick)
{
if(u8SysTick_initFlag==1)
{
return STATUS_ERROR;
}
if(tick!=Period_1ms)
{
return STATUS_INIT_FAIL;
}
// if(u8SysTick_initFlag==1)
// {
// return STATUS_ERROR;
// }
//
// if(tick!=Period_1ms)
// {
// return STATUS_INIT_FAIL;
// }
SysTick_Config(tick);
NVIC_SetPriority(SysTick_IRQn, 0);
u8SysTick_initFlag=1;
return STATUS_SUCCESS;
}
static const DL_SYSCTL_SYSPLLConfig gSYSPLLConfig = {
.inputFreq = DL_SYSCTL_SYSPLL_INPUT_FREQ_16_32_MHZ,
.rDivClk2x = 1,
.rDivClk1 = 0,
.rDivClk0 = 0,
.enableCLK2x = DL_SYSCTL_SYSPLL_CLK2X_DISABLE,
.enableCLK1 = DL_SYSCTL_SYSPLL_CLK1_ENABLE,
.enableCLK0 = DL_SYSCTL_SYSPLL_CLK0_ENABLE,
.sysPLLMCLK = DL_SYSCTL_SYSPLL_MCLK_CLK0,
.sysPLLRef = DL_SYSCTL_SYSPLL_REF_HFCLK,
.qDiv = 1,
.pDiv = DL_SYSCTL_SYSPLL_PDIV_1
};
xCoreStatus_t xMCAL_SYSCTL_INIT(uint8_t u8CLK_SRC,uint8_t u8LP_MODE)
{
if((u8LP_MODE!=STANDBY0)&&(u8LP_MODE!=SLEEP0))
return STATUS_INIT_FAIL;
if((u8CLK_SRC!=HFXT)&&(u8CLK_SRC!=SYSOSC))
@ -103,7 +122,21 @@ xCoreStatus_t xMCAL_SYSCTL_INIT(uint8_t u8CLK_SRC,uint8_t u8LP_MODE)
if(u8CLK_SRC==HFXT)
{
//Low Power Mode is configured to be SLEEP0
// DL_SYSCTL_setBORThreshold(DL_SYSCTL_BOR_THRESHOLD_LEVEL_0);
// DL_SYSCTL_setSYSOSCFreq(DL_SYSCTL_SYSOSC_FREQ_BASE);
/* Set default configuration */
// DL_SYSCTL_disableHFXT();
// DL_SYSCTL_disableSYSPLL();
// DL_SYSCTL_setHFCLKSourceHFXTParams(DL_SYSCTL_HFXT_RANGE_16_32_MHZ,30, true);
// DL_SYSCTL_setULPCLKDivider(DL_SYSCTL_ULPCLK_DIV_1);
//DL_SYSCTL_setMCLKSource(SYSOSC, HSCLK, DL_SYSCTL_HSCLK_SOURCE_HFCLK);
//Low Power Mode is configured to be SLEEP0
DL_SYSCTL_setBORThreshold(DL_SYSCTL_BOR_THRESHOLD_LEVEL_0);
DL_SYSCTL_setFlashWaitState(DL_SYSCTL_FLASH_WAIT_STATE_2);
DL_SYSCTL_setSYSOSCFreq(DL_SYSCTL_SYSOSC_FREQ_BASE);
@ -113,32 +146,14 @@ xCoreStatus_t xMCAL_SYSCTL_INIT(uint8_t u8CLK_SRC,uint8_t u8LP_MODE)
DL_SYSCTL_setHFCLKSourceHFXTParams(DL_SYSCTL_HFXT_RANGE_16_32_MHZ,10, true);
DL_SYSCTL_configSYSPLL((DL_SYSCTL_SYSPLLConfig *) &gSYSPLLConfig);
DL_SYSCTL_setULPCLKDivider(DL_SYSCTL_ULPCLK_DIV_1);
DL_SYSCTL_setHFCLKDividerForMFPCLK(DL_SYSCTL_HFCLK_MFPCLK_DIVIDER_6);
DL_SYSCTL_enableMFCLK();
DL_SYSCTL_enableMFPCLK();
DL_SYSCTL_setMFPCLKSource(DL_SYSCTL_MFPCLK_SOURCE_HFCLK);
DL_SYSCTL_setMCLKSource(SYSOSC, HSCLK, DL_SYSCTL_HSCLK_SOURCE_HFCLK);
// DL_SYSCTL_setHFCLKSourceHFXTParams(DL_SYSCTL_HFXT_RANGE_16_32_MHZ,0, false);
// DL_SYSCTL_setULPCLKDivider(DL_SYSCTL_ULPCLK_DIV_1);
// DL_SYSCTL_setMCLKSource(SYSOSC, HSCLK, DL_SYSCTL_HSCLK_SOURCE_HFCLK);
//DL_SYSCTL_setHFCLKSourceHFXTParams(DL_SYSCTL_HFXT_RANGE_32_48_MHZ,0, false);
// DL_SYSCTL_setHFCLKSourceHFXTParams(DL_SYSCTL_HFXT_RANGE_16_32_MHZ,0, false);
// DL_SYSCTL_setULPCLKDivider(DL_SYSCTL_ULPCLK_DIV_1);
// DL_SYSCTL_setMCLKSource(SYSOSC, HSCLK, DL_SYSCTL_HSCLK_SOURCE_HFCLK);
DL_SYSCTL_setMCLKSource(SYSOSC, HSCLK, DL_SYSCTL_HSCLK_SOURCE_SYSPLL);
}
else if(u8CLK_SRC==SYSOSC)
{
// DL_SYSCTL_setSYSOSCFreq(DL_SYSCTL_SYSOSC_FREQ_BASE);
// /* Set default configuration */
// DL_SYSCTL_disableHFXT();
// DL_SYSCTL_disableSYSPLL();
// DL_SYSCTL_configSYSPLL((DL_SYSCTL_SYSPLLConfig *) &gSYSPLLConfig);
DL_SYSCTL_setSYSOSCFreq(DL_SYSCTL_SYSOSC_FREQ_BASE);
DL_SYSCTL_disableHFXT();
DL_SYSCTL_disableSYSPLL();
DL_SYSCTL_setHFCLKSourceHFXTParams(DL_SYSCTL_HFXT_RANGE_16_32_MHZ,50, true);
DL_SYSCTL_configSYSPLL((DL_SYSCTL_SYSPLLConfig *) &gSYSPLLConfig);
DL_SYSCTL_setHFCLKDividerForMFPCLK(DL_SYSCTL_HFCLK_MFPCLK_DIVIDER_6);
DL_SYSCTL_enableMFCLK();
@ -146,6 +161,51 @@ xCoreStatus_t xMCAL_SYSCTL_INIT(uint8_t u8CLK_SRC,uint8_t u8LP_MODE)
DL_SYSCTL_setMFPCLKSource(DL_SYSCTL_MFPCLK_SOURCE_SYSOSC);
}
// if(u8CLK_SRC==HFXT)
// {
//
//
//
// DL_SYSCTL_setSYSOSCFreq(DL_SYSCTL_SYSOSC_FREQ_BASE);
// /* Set default configuration */
// DL_SYSCTL_disableHFXT();
// DL_SYSCTL_disableSYSPLL();
// DL_SYSCTL_setHFCLKSourceHFXTParams(DL_SYSCTL_HFXT_RANGE_16_32_MHZ,10, true);
// DL_SYSCTL_configSYSPLL((DL_SYSCTL_SYSPLLConfig *) &gSYSPLLConfig);
// DL_SYSCTL_setULPCLKDivider(DL_SYSCTL_ULPCLK_DIV_1);
// DL_SYSCTL_setHFCLKDividerForMFPCLK(DL_SYSCTL_HFCLK_MFPCLK_DIVIDER_6);
// DL_SYSCTL_enableMFCLK();
// DL_SYSCTL_enableMFPCLK();
// DL_SYSCTL_setMFPCLKSource(DL_SYSCTL_MFPCLK_SOURCE_HFCLK);
// DL_SYSCTL_setMCLKSource(SYSOSC, HSCLK, DL_SYSCTL_HSCLK_SOURCE_HFCLK);
//// DL_SYSCTL_setHFCLKSourceHFXTParams(DL_SYSCTL_HFXT_RANGE_16_32_MHZ,0, false);
//// DL_SYSCTL_setULPCLKDivider(DL_SYSCTL_ULPCLK_DIV_1);
//// DL_SYSCTL_setMCLKSource(SYSOSC, HSCLK, DL_SYSCTL_HSCLK_SOURCE_HFCLK);
//
//
// //DL_SYSCTL_setHFCLKSourceHFXTParams(DL_SYSCTL_HFXT_RANGE_32_48_MHZ,0, false);
//// DL_SYSCTL_setHFCLKSourceHFXTParams(DL_SYSCTL_HFXT_RANGE_16_32_MHZ,0, false);
//// DL_SYSCTL_setULPCLKDivider(DL_SYSCTL_ULPCLK_DIV_1);
//// DL_SYSCTL_setMCLKSource(SYSOSC, HSCLK, DL_SYSCTL_HSCLK_SOURCE_HFCLK);
// }
//
// else if(u8CLK_SRC==SYSOSC)
// {
//// DL_SYSCTL_setSYSOSCFreq(DL_SYSCTL_SYSOSC_FREQ_BASE);
//// /* Set default configuration */
//// DL_SYSCTL_disableHFXT();
//// DL_SYSCTL_disableSYSPLL();
//// DL_SYSCTL_configSYSPLL((DL_SYSCTL_SYSPLLConfig *) &gSYSPLLConfig);
// DL_SYSCTL_setSYSOSCFreq(DL_SYSCTL_SYSOSC_FREQ_BASE);
// DL_SYSCTL_disableHFXT();
// DL_SYSCTL_disableSYSPLL();
// DL_SYSCTL_configSYSPLL((DL_SYSCTL_SYSPLLConfig *) &gSYSPLLConfig);
// DL_SYSCTL_setHFCLKDividerForMFPCLK(DL_SYSCTL_HFCLK_MFPCLK_DIVIDER_6);
// DL_SYSCTL_enableMFCLK();
// DL_SYSCTL_enableMFPCLK();
// DL_SYSCTL_setMFPCLKSource(DL_SYSCTL_MFPCLK_SOURCE_SYSOSC);
// }
return STATUS_SUCCESS;
}
@ -185,6 +245,8 @@ void xMCAL_McuInit()
// DL_SYSCTL_init();
// xMCAL_VrefInit();
SYSCFG_DL_initPower();
// DL_MCAN_reset(CANFD0);
// DL_MCAN_enablePower(CANFD0);
DL_UART_Main_reset(UART2);
DL_UART_Main_enablePower(UART2);
SYSCFG_DL_GPIO_init();