diff --git a/Core/Source/ivec_mcal_mcan.c b/Core/Source/ivec_mcal_mcan.c index d5a3e5c..96d7012 100644 --- a/Core/Source/ivec_mcal_mcan.c +++ b/Core/Source/ivec_mcal_mcan.c @@ -420,6 +420,7 @@ IVEC_McalStatus_e xMCAL_MCANInit(MCAN_Regs* MCAN, xCAN_baud_t BAUD) while (DL_MCAN_OPERATION_MODE_NORMAL != DL_MCAN_getOpMode(MCAN)); /* Enable MCAN mopdule Interrupts */ + DL_MCAN_enableIntr(MCAN, (DL_MCAN_INTERRUPT_BEU | \ DL_MCAN_INTERRUPT_BO | \ DL_MCAN_INTERRUPT_ELO | \ @@ -445,6 +446,7 @@ IVEC_McalStatus_e xMCAL_MCANInit(MCAN_Regs* MCAN, xCAN_baud_t BAUD) DL_MCAN_INTERRUPT_TOO), DL_MCAN_INTR_LINE_NUM_1); DL_MCAN_enableIntrLine(MCAN, DL_MCAN_INTR_LINE_NUM_1, 1U); + DL_MCAN_selectIntrLine(MCAN, (DL_MCAN_INTERRUPT_BEU | \ DL_MCAN_INTERRUPT_BO | \ DL_MCAN_INTERRUPT_ELO | \ @@ -458,6 +460,7 @@ IVEC_McalStatus_e xMCAL_MCANInit(MCAN_Regs* MCAN, xCAN_baud_t BAUD) DL_MCAN_INTERRUPT_TOO), DL_MCAN_INTR_LINE_NUM_0); DL_MCAN_enableIntrLine(MCAN, DL_MCAN_INTR_LINE_NUM_0, 1U); + /* Enable MSPM0 MCAN interrupt */ DL_MCAN_clearInterruptStatus(MCAN,(DL_MCAN_MSP_INTERRUPT_LINE0)); DL_MCAN_enableInterrupt(MCAN,(DL_MCAN_MSP_INTERRUPT_LINE0)); @@ -490,29 +493,121 @@ IVEC_McalStatus_e xMCAL_MCANInit(MCAN_Regs* MCAN, xCAN_baud_t BAUD) // return IVEC_MCAL_STATUS_SUCCESS; // //} + IVEC_McalStatus_e xMCAL_MCANDeInit(MCAN_Regs* MCAN) { assert(MCAN == CANFD0); assert(b_MCAN_InitFlag != 0); // Ensure the module was initialized before deinitializing. - /* Disable MSPM0 MCAN interrupt */ - NVIC_DisableIRQ(CANFD0_INT_IRQn); - DL_MCAN_disableInterrupt(MCAN, DL_MCAN_MSP_INTERRUPT_LINE1); + //DL_MCAN_reset(MCAN); + + + DL_MCAN_setOpMode(CANFD0, DL_MCAN_OPERATION_MODE_SW_INIT); + while (DL_MCAN_OPERATION_MODE_SW_INIT != DL_MCAN_getOpMode(MCAN)); + NVIC_DisableIRQ(CANFD0_INT_IRQn); + + + DL_MCAN_enableIntr(MCAN, (DL_MCAN_INTERRUPT_BEU | \ + DL_MCAN_INTERRUPT_BO | \ + DL_MCAN_INTERRUPT_ELO | \ + DL_MCAN_INTERRUPT_EP | \ + DL_MCAN_INTERRUPT_EW | \ + DL_MCAN_INTERRUPT_PEA | \ + DL_MCAN_INTERRUPT_PED | \ + DL_MCAN_INTERRUPT_RF0N | \ + DL_MCAN_INTERRUPT_RF1N | \ + DL_MCAN_INTERRUPT_TC | \ + DL_MCAN_INTERRUPT_TOO), false); + + DL_MCAN_enableIntrLine(CANFD0, DL_MCAN_INTR_LINE_NUM_0, false); + DL_MCAN_enableIntrLine(CANFD0, DL_MCAN_INTR_LINE_NUM_1, false); + + + DL_MCAN_clearInterruptStatus(MCAN,(DL_MCAN_MSP_INTERRUPT_LINE0)); + DL_MCAN_disableInterrupt(MCAN, DL_MCAN_MSP_INTERRUPT_LINE0); + + DL_MCAN_clearInterruptStatus(MCAN,(DL_MCAN_MSP_INTERRUPT_LINE1)); + DL_MCAN_disableInterrupt(MCAN, DL_MCAN_MSP_INTERRUPT_LINE1); + + DL_MCAN_setOpMode(CANFD0, DL_MCAN_OPERATION_MODE_NORMAL); + + b_MCAN_InitFlag = 0; + DL_GPIO_initPeripheralOutputFunction(IOMUX_PINCM59, 0); + DL_GPIO_initPeripheralInputFunction(IOMUX_PINCM60, 0); + DL_MCAN_disableModuleClock(MCAN); + DL_MCAN_disablePower(MCAN); + delay_cycles(16); +// DL_MCAN_setOpMode(CANFD0, DL_MCAN_OPERATION_MODE_SW_INIT); + +// while (DL_MCAN_OPERATION_MODE_SW_INIT != DL_MCAN_getOpMode(MCAN)); +// +// DL_GPIO_disablePower(MCAN); +// +// DL_MCAN_setOpMode(CANFD0, DL_MCAN_OPERATION_MODE_SW_INIT); +// +// +// +// DL_MCAN_setOpMode(CANFD0, DL_MCAN_OPERATION_MODE_NORMAL); + + +// DL_MCAN_enableIntrLine(CANFD0, DL_MCAN_INTR_LINE_NUM_1, false); +// +// DL_MCAN_enableIntrLine(CANFD0, DL_MCAN_INTR_LINE_NUM_0, false); + + + + + // DL_MCAN_setOpMode(MCAN, DL_MCAN_OPERATION_MODE_SW_INIT); + - DL_MCAN_setOpMode(MCAN, DL_MCAN_OPERATION_MODE_SW_INIT); /* Wait till MCAN is in SW initialization mode */ - while (DL_MCAN_OPERATION_MODE_SW_INIT != DL_MCAN_getOpMode(MCAN)); +// while (DL_MCAN_OPERATION_MODE_SW_INIT != DL_MCAN_getOpMode(MCAN)); + + // Reset MCAN module + //DL_MCAN_reset(MCAN); /* Disable the MCAN clock */ - DL_MCAN_disableModuleClock(MCAN); +// DL_MCAN_disableModuleClock(MCAN); +// DL_MCAN_reset(MCAN); + + //DL_GPIO_disablePower(MCAN); /* Clear initialization flag */ - b_MCAN_InitFlag = 0; +// b_MCAN_InitFlag = 0; return IVEC_MCAL_STATUS_SUCCESS; } +//IVEC_McalStatus_e xMCAL_MCANDeInit(MCAN_Regs* MCAN) +//{ +// assert(MCAN == CANFD0); +// assert(b_MCAN_InitFlag != 0); +// +// // Disable interrupts +// NVIC_DisableIRQ(CANFD0_INT_IRQn); +// DL_MCAN_disableInterrupt(MCAN, DL_MCAN_MSP_INTERRUPT_LINE0 | DL_MCAN_MSP_INTERRUPT_LINE1); +// // DL_MCAN_clearInterruptStatus(MCAN, DL_MCAN_MSP_INTERRUPT_LINE0 | DL_MCAN_MSP_INTERRUPT_LINE1); +// +// // Transition to SW initialization mode +// DL_MCAN_setOpMode(MCAN, DL_MCAN_OPERATION_MODE_SW_INIT); +// while (DL_MCAN_OPERATION_MODE_SW_INIT != DL_MCAN_getOpMode(MCAN)); +// +// +// // Disable clock and reset +// DL_MCAN_disableModuleClock(MCAN); +// DL_MCAN_reset(MCAN); +// +// // Power down +// DL_GPIO_disablePower(MCAN); +// +// // Clear initialization flag +// b_MCAN_InitFlag = 0; +// +// return IVEC_MCAL_STATUS_SUCCESS; +//} + + /** * @brief Function to Transmit CAN message * @param MCAN Pointer to the register overlay for the peripheral @@ -684,7 +779,9 @@ IVEC_McalStatus_e xMCAL_getMCAN_ErrorStatus(char *ErrorStatus) DL_MCAN_getErrCounters(CANFD0, &l_errCounter); return ( (HeaderStat.lastErrCode == DL_MCAN_ERR_CODE_ACK_ERROR) || \ - HeaderStat.busOffStatus) ? IVEC_MCAL_STATUS_ERROR : IVEC_MCAL_STATUS_SUCCESS; + (HeaderStat.busOffStatus) || \ + (HeaderStat.lastErrCode == DL_MCAN_ERR_CODE_STUFF_ERROR) || \ + (HeaderStat.lastErrCode == DL_MCAN_ERR_CODE_FORM_ERROR) ) ? IVEC_MCAL_STATUS_ERROR : IVEC_MCAL_STATUS_SUCCESS; } /** diff --git a/ivec_ECU/ivec_ecu_can/src/ivec_ecu_can.c b/ivec_ECU/ivec_ecu_can/src/ivec_ecu_can.c index 5ef705e..f7f72b6 100644 --- a/ivec_ECU/ivec_ecu_can/src/ivec_ecu_can.c +++ b/ivec_ECU/ivec_ecu_can/src/ivec_ecu_can.c @@ -58,13 +58,23 @@ IVEC_EcuCommonErr_e xECU_CANGetData(can_buff_t *pxBuff) } IVEC_EcuCommonErr_e xECU_CanReInit(MCAN_Regs* MCAN,uint16_t speed) -{ IVEC_EcuCommonErr_e l_xFuncStatus = commonECU_SUCCESS; +{ + IVEC_EcuCommonErr_e l_xFuncStatus = commonECU_SUCCESS; uint8_t l_i32Ret; l_i32Ret = xMCAL_MCANDeInit(MCAN); if(l_i32Ret != IVEC_MCAL_STATUS_SUCCESS) { l_xFuncStatus = commonECU_DEINIT_FAIL; } + + //DL_MCAN_reset(MCAN); + // DL_GPIO_enablePower(GPIOA); + // DL_GPIO_enablePower(GPIOB); + DL_MCAN_enablePower(MCAN); + delay_cycles(POWER_STARTUP_DELAY); + + DL_GPIO_initPeripheralOutputFunction(GPIO_MCAN0_IOMUX_CAN_TX, GPIO_MCAN0_IOMUX_CAN_TX_FUNC); + DL_GPIO_initPeripheralInputFunction(GPIO_MCAN0_IOMUX_CAN_RX, GPIO_MCAN0_IOMUX_CAN_RX_FUNC); l_i32Ret = xMCAL_MCANInit(MCAN,speed); if(l_i32Ret != IVEC_MCAL_STATUS_SUCCESS) { @@ -101,5 +111,9 @@ IVEC_EcuCommonErr_e xECU_GetCanStatus(MCAN_Regs* MCAN, uint16_t speed) { char l_ucErrorString[32] = {0}; if( xMCAL_getMCAN_ErrorStatus(&l_ucErrorString) == IVEC_MCAL_STATUS_ERROR ) + { xECU_CanReInit(MCAN, speed); + return commonECU_FAIL; + } + return commonECU_SUCCESS; } diff --git a/ivec_RTE/src/ivec_rte.c b/ivec_RTE/src/ivec_rte.c index 6307cba..17e15ad 100644 --- a/ivec_RTE/src/ivec_rte.c +++ b/ivec_RTE/src/ivec_rte.c @@ -429,8 +429,12 @@ void vRTE_UARTDataProcess(void) } if ( retCode >= 0 && (ulId > 0x00 && ulId < 0xffffffff) ) { - __gprv_u8Buf = (__gprv_u8Buf + 1) % 2; - xECU_WriteDataOverCAN(&g_pu8Buf[PKT_HEADER], ulId, retCode, __gprv_u8Buf); + uint8_t status; + //__gprv_u8Buf = (__gprv_u8Buf + 1) % 2; + status = xECU_WriteDataOverCAN(&g_pu8Buf[PKT_HEADER], ulId, retCode, 0); + if(status != 0) + vECU_InitiateUartToCanTransmit(&g_xUartHandle, 0x5, g_pu8Buf, 0); + } } } @@ -469,7 +473,11 @@ void vRTE_CANDataProcess(void) else break; } - xECU_GetCanStatus(CANFD0, g_u16CanSpeed); + uint8_t status; + status = xECU_GetCanStatus(CANFD0, g_u16CanSpeed); + if ( status != 0) + vECU_InitiateUartToCanTransmit(&g_xUartHandle, 0x4, g_pu8Buf, 0); + } // Function to control individual relays based on relay_status (16 bits) diff --git a/mspm0g3507.lds b/mspm0g3507.lds index 97562bf..ccb3787 100644 --- a/mspm0g3507.lds +++ b/mspm0g3507.lds @@ -7,7 +7,7 @@ _Min_Stack_Size = 0x000012E8; /* required amount of stack */ /* Specify the memory areas */ MEMORY { - FLASH (RX) : ORIGIN = 0x00000000, LENGTH = 0x00020000 + FLASH (RX) : ORIGIN = 0x00008000, LENGTH = 0x00018000 SRAM (RWX) : ORIGIN = 0x20200000, LENGTH = 0x00008000 BCR_CONFIG (R) : ORIGIN = 0x41C00000, LENGTH = 0x00000080 BSL_CONFIG (R) : ORIGIN = 0x41C00100, LENGTH = 0x00000080 @@ -33,7 +33,7 @@ SECTIONS { /* section for the interrupt vector area */ PROVIDE (_intvecs_base_address = - DEFINED(_intvecs_base_address) ? _intvecs_base_address : 0x00000000); + DEFINED(_intvecs_base_address) ? _intvecs_base_address : 0x00008000); .intvecs (_intvecs_base_address) : AT (_intvecs_base_address) { KEEP (*(.intvecs)) diff --git a/utils/utils.h b/utils/utils.h index 1dcf443..3b77902 100644 --- a/utils/utils.h +++ b/utils/utils.h @@ -38,7 +38,7 @@ typedef enum // 1 - Basil Battery Smart // 2 - Basil // 3 - Battery Swapping Station -#define UART_PIN_SELECTION 3 // Set the desired UART configuration here +#define UART_PIN_SELECTION 2 // Set the desired UART configuration here volatile int i32TickCnt;