code-sierra
/
chg-stn-motherboard-ti-mcu
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

feat: Implement SysTick for UART reception and enhance CAN MCAL layer 

-Replaced timer-based UART data reception with SysTick timer implementation.
- Modified the UART interrupt handler to manage interrupts effectively.
- Updated MCAL layer for CAN to ensure proper handling of FIFO in RX interrupts.
- Corrected the deinitialization function in the MCAL layer of CAN.
- Implemented a handler for managing lastErrCode in CAN interrupts.
- Removed all debug print statements and unnecessary CAN filters to clean up the code.
stable
Rakshitavecmocon 2024-10-15 16:10:03 +05:30
parent 5b88394f22
commit 9599f1630c
6 changed files with 171 additions and 89 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

49
Core/Source/ivec_mcal_mcan.c
View File

@ -121,10 +121,18 @@ static DL_MCAN_MsgRAMConfigParams gMCAN0MsgRAMConfigParams ={
};
static const DL_MCAN_StdMsgIDFilterElement gMCAN0StdFiltelem = {
.sfec = 0x1,
.sft = 0x0,
.sfid1 = 0,
.sfid2 = 2047,
.sfec = 0x1, // Store in Rx FIFO 0 if filter matches
.sft = 0x11, // Disable filter, receive all IDs
.sfid1 = 0, // These values won't be used because filtering is disabled
.sfid2 = 0, // These values won't be used because filtering is disabled
};
// Static filter element definition to disable filtering
static const DL_MCAN_ExtMsgIDFilterElement gMCAN0ExtFilterElem = {
.efid1 = 0, // These values won't be used because filtering is disabled
.efec = 0x0, // Disable filter element (0b000)
.efid2 = 0, // These values won't be used because filtering is disabled
.eft = 0x3, // Set to 0b11 for disabling filtering (no specific filter applied)
};
static DL_MCAN_BitTimingParams gMCAN0BitTimes_500 = {
@ -312,13 +320,30 @@ void CANFD0_IRQHandler(void)
rxFS.fillLvl = 0;
rxFS.num = DL_MCAN_RX_FIFO_NUM_0;
int status = -1;
while ((rxFS.fillLvl) == 0)
{
DL_MCAN_getRxFIFOStatus(CANFD0, &rxFS);
}
if (rxFS.fillLvl > 0) {
// There are messages to process
while (rxFS.fillLvl > 0) {
// Read and process messages...
// (Assuming you have logic to read from the FIFO)
DL_MCAN_readMsgRam(CANFD0, DL_MCAN_MEM_TYPE_FIFO, 0, rxFS.num, &TempRxMsg);
DL_MCAN_readMsgRam(CANFD0, DL_MCAN_MEM_TYPE_FIFO, 0, rxFS.num, &TempRxMsg);
DL_MCAN_writeRxFIFOAck(CANFD0, rxFS.num, rxFS.getIdx);
// Acknowledge the message
DL_MCAN_writeRxFIFOAck(CANFD0, rxFS.num, rxFS.getIdx);
// Update the FIFO status again after reading
DL_MCAN_getRxFIFOStatus(CANFD0, &rxFS);
}
}
// DL_MCAN_readMsgRam(CANFD0, DL_MCAN_MEM_TYPE_FIFO, 0, rxFS.num, &TempRxMsg);
// DL_MCAN_writeRxFIFOAck(CANFD0, rxFS.num, rxFS.getIdx);
xCanIdType_t idType = ERROR;
if (TempRxMsg.id >= 0 && TempRxMsg.id <= 0x7FF)
@ -337,14 +362,17 @@ void CANFD0_IRQHandler(void)
{
g_CanData[inx] = TempRxMsg.data[inx];
}
printf("trigger id %d\n",idx);
mcu_FDCAN_RxFifo_Callback(idx, &g_CanData[0], TempRxMsg.dlc);
}
b_ServiceInt = true;
// if (rxFS.fifoFull) {
// printf("rx fifo fill\n");
// DL_MCAN_clearNewDataStatus(CANFD0, &statusLow); // Pass the proper structure
// }
//DL_MCAN_clearIntrStatus(CANFD0, IntrStatus,DL_MCAN_INTR_SRC_MCAN_LINE_1);
// }
// else{
// }
// else{
DL_MCAN_getIntrStatus(CANFD0);
DL_MCAN_clearIntrStatus(CANFD0, IntrStatus,DL_MCAN_INTR_SRC_MCAN_LINE_1);
}
@ -353,6 +381,8 @@ void CANFD0_IRQHandler(void)
/*=============================================================================================================================================================================================
API
==============================================================================================================================================================================================*/
@ -499,7 +529,6 @@ IVEC_McalStatus_e xMCAL_MCANTx(MCAN_Regs *MCAN, DL_MCAN_TxBufElement *TxMsg ,uin
{
TxMsg->data[i] = TxData[i];
}
uint32_t txPendingStatus;
//Check if the Tx Buffer is available (no pending request)

110
Core/Source/ivec_mcal_uart.c
View File

@ -33,38 +33,43 @@ void _prv_vrxcallback()
{
switch (DL_UART_Main_getPendingInterrupt(UART0))
{
case DL_UART_MAIN_IIDX_RX:
case DL_UART_MAIN_IIDX_RX:
{
bool status = 0;
status = DL_UART_receiveDataCheck(UART0, (uint8_t *)&u8rxbuffer1);
if(status == true)
{
UART_ReadCallback(UART0,(uint8_t *)&u8rxbuffer1,status);
}
uint8_t l_pu8Buffer[8] = {0}; // Adjust size as needed
uint32_t bytesRead;
// Drain the RX FIFO and store the data in buffer
bytesRead = DL_UART_drainRXFIFO(UART0, l_pu8Buffer, sizeof(l_pu8Buffer));
DL_UART_clearInterruptStatus(UART0, DL_UART_MAIN_IIDX_RX);
for( int ijk = 0; ijk < bytesRead; ijk++ )
UART_ReadCallback(UART0, &l_pu8Buffer[ijk], true);
break;
}
// case DL_UART_MAIN_IIDX_EOT_DONE:
// {
// g_TxCplt = true;
// }
case DL_UART_MAIN_IIDX_OVERRUN_ERROR:
__asm("nop");
break;
DL_UART_clearInterruptStatus(UART2, DL_UART_MAIN_IIDX_OVERRUN_ERROR);
__asm("nop");
break;
case DL_UART_MAIN_IIDX_BREAK_ERROR:
__asm("nop");
break;
DL_UART_clearInterruptStatus(UART2, DL_UART_MAIN_IIDX_BREAK_ERROR);
__asm("nop");
break;
case DL_UART_MAIN_IIDX_PARITY_ERROR:
__asm("nop");
break;
DL_UART_clearInterruptStatus(UART2, DL_UART_MAIN_IIDX_PARITY_ERROR);
__asm("nop");
break;
case DL_UART_MAIN_IIDX_FRAMING_ERROR:
__asm("nop");
break;
DL_UART_clearInterruptStatus(UART2, DL_UART_MAIN_IIDX_FRAMING_ERROR);
__asm("nop");
break;
case DL_UART_MAIN_IIDX_RX_TIMEOUT_ERROR:
__asm("nop");
break;
DL_UART_clearInterruptStatus(UART2, DL_UART_MAIN_IIDX_RX_TIMEOUT_ERROR);
__asm("nop");
break;
case DL_UART_MAIN_IIDX_NOISE_ERROR:
__asm("nop");
break;
DL_UART_clearInterruptStatus(UART2, DL_UART_MAIN_IIDX_NOISE_ERROR);
__asm("nop");
break;
default:
break;
}
@ -73,33 +78,38 @@ void _prv_vrxcallback()
case DL_UART_MAIN_IIDX_RX:
{
bool status = 0;
status = DL_UART_receiveDataCheck(UART1, (uint8_t *)&u8rxbuffer1);
if(status == true)
{
UART_ReadCallback(UART1,(uint8_t *)&u8rxbuffer1,status);
}
uint8_t l_pu8Buffer[8] = {0}; // Adjust size as needed
uint32_t bytesRead;
// Drain the RX FIFO and store the data in buffer
bytesRead = DL_UART_drainRXFIFO(UART1, l_pu8Buffer, sizeof(l_pu8Buffer));
DL_UART_clearInterruptStatus(UART1, DL_UART_MAIN_IIDX_RX);
for( int ijk = 0; ijk < bytesRead; ijk++ )
UART_ReadCallback(UART1, &l_pu8Buffer[ijk], true);
break;
}
// case DL_UART_MAIN_IIDX_EOT_DONE:
// {
// g_TxCplt = true;
// }
case DL_UART_MAIN_IIDX_OVERRUN_ERROR:
DL_UART_clearInterruptStatus(UART2, DL_UART_MAIN_IIDX_OVERRUN_ERROR);
__asm("nop");
break;
case DL_UART_MAIN_IIDX_BREAK_ERROR:
DL_UART_clearInterruptStatus(UART2, DL_UART_MAIN_IIDX_BREAK_ERROR);
__asm("nop");
break;
case DL_UART_MAIN_IIDX_PARITY_ERROR:
DL_UART_clearInterruptStatus(UART2, DL_UART_MAIN_IIDX_PARITY_ERROR);
__asm("nop");
break;
case DL_UART_MAIN_IIDX_FRAMING_ERROR:
DL_UART_clearInterruptStatus(UART2, DL_UART_MAIN_IIDX_FRAMING_ERROR);
__asm("nop");
break;
case DL_UART_MAIN_IIDX_RX_TIMEOUT_ERROR:
DL_UART_clearInterruptStatus(UART2, DL_UART_MAIN_IIDX_RX_TIMEOUT_ERROR);
__asm("nop");
break;
case DL_UART_MAIN_IIDX_NOISE_ERROR:
DL_UART_clearInterruptStatus(UART2, DL_UART_MAIN_IIDX_NOISE_ERROR);
__asm("nop");
break;
default:
@ -110,40 +120,46 @@ void _prv_vrxcallback()
case DL_UART_MAIN_IIDX_RX:
{
bool status = 0;
status = DL_UART_receiveDataCheck(UART2, (uint8_t *)&u8rxbuffer1);
if(status == true)
{
UART_ReadCallback(UART2,(uint8_t *)&u8rxbuffer1,status);
}
uint8_t l_pu8Buffer[8] = {0}; // Adjust size as needed
uint32_t bytesRead;
// Drain the RX FIFO and store the data in buffer
bytesRead = DL_UART_drainRXFIFO(UART2, l_pu8Buffer, sizeof(l_pu8Buffer));
DL_UART_clearInterruptStatus(UART2, DL_UART_MAIN_IIDX_RX);
for( int ijk = 0; ijk < bytesRead; ijk++ )
UART_ReadCallback(UART2, &l_pu8Buffer[ijk], true);
break;
}
// case DL_UART_MAIN_IIDX_EOT_DONE:
// {
// g_TxCplt = true;
// }
case DL_UART_MAIN_IIDX_OVERRUN_ERROR:
DL_UART_clearInterruptStatus(UART2, DL_UART_MAIN_IIDX_OVERRUN_ERROR);
__asm("nop");
break;
case DL_UART_MAIN_IIDX_BREAK_ERROR:
DL_UART_clearInterruptStatus(UART2, DL_UART_MAIN_IIDX_BREAK_ERROR);
__asm("nop");
break;
case DL_UART_MAIN_IIDX_PARITY_ERROR:
DL_UART_clearInterruptStatus(UART2, DL_UART_MAIN_IIDX_PARITY_ERROR);
__asm("nop");
break;
case DL_UART_MAIN_IIDX_FRAMING_ERROR:
DL_UART_clearInterruptStatus(UART2, DL_UART_MAIN_IIDX_FRAMING_ERROR);
__asm("nop");
break;
case DL_UART_MAIN_IIDX_RX_TIMEOUT_ERROR:
DL_UART_clearInterruptStatus(UART2, DL_UART_MAIN_IIDX_RX_TIMEOUT_ERROR);
__asm("nop");
break;
case DL_UART_MAIN_IIDX_NOISE_ERROR:
DL_UART_clearInterruptStatus(UART2, DL_UART_MAIN_IIDX_NOISE_ERROR);
__asm("nop");
break;
default:
break;
}
}
}
void UART0_IRQHandler()
{
_prv_vrxcallback();
@ -516,7 +532,8 @@ static xCoreStatus_t uart_init(McalUartHandle_s* pxUartHandle, McalUartBaudRate_
else if(xBaud==9600)
{
DL_UART_Main_setOversampling(uart_inst, DL_UART_OVERSAMPLING_RATE_16X);
DL_UART_Main_setBaudRateDivisor(uart_inst, 208, 21);
//DL_UART_Main_setBaudRateDivisor(uart_inst, 208, 21);
DL_UART_Main_setBaudRateDivisor(uart_inst, 156, 16);
}
@ -565,7 +582,6 @@ static xCoreStatus_t uart_init(McalUartHandle_s* pxUartHandle, McalUartBaudRate_
else if(uart_inst==UART2)
{
DL_UART_Main_enableInterrupt(uart_inst,
DL_UART_MAIN_INTERRUPT_BREAK_ERROR |
DL_UART_MAIN_INTERRUPT_FRAMING_ERROR |
@ -576,12 +592,18 @@ static xCoreStatus_t uart_init(McalUartHandle_s* pxUartHandle, McalUartBaudRate_
DL_UART_MAIN_INTERRUPT_RX_TIMEOUT_ERROR);
DL_UART_Main_enableFIFOs(UART2);
DL_UART_Main_setRXFIFOThreshold(UART2, DL_UART_RX_FIFO_LEVEL_ONE_ENTRY);
DL_UART_Main_setTXFIFOThreshold(UART2, DL_UART_TX_FIFO_LEVEL_1_2_EMPTY);
// DL_UART_Main_setRXInterruptTimeout(UART2, 15);
DL_UART_Main_enable(uart_inst);
/*Clearing and Enabling Interrupt Requests*/
NVIC_ClearPendingIRQ(UART2_INT_IRQn);
NVIC_EnableIRQ(UART2_INT_IRQn);
//b_UART2_init_flag=1;
}
return STATUS_SUCCESS;//TODO: FIX RETURN BUG

15
ivec_ECU/ivec_ecu_can/src/ivec_ecu_can.c
View File

@ -32,9 +32,16 @@ IVEC_EcuCommonErr_e xECU_WriteDataOverCAN(uint8_t* pucBuf, uint32_t ulId, int re
// {
DL_MCAN_TxBufElement xFrame = {0};
xFrame.id = ulId; //txMsg.id = ((uint32_t)(0x9)) << 18U;
xFrame.dlc = (uint8_t)retCode;
xFrame.xtd = (ulId > 0x7ff) ? 1U : 0U;
if(xFrame.xtd == 0)
{
xFrame.id = ulId << 18U; //txMsg.id = ((uint32_t)(0x9)) << 18U;
}
else
xFrame.id = ulId; //txMsg.id = ((uint32_t)(0x9)) << 18U;
xFrame.rtr = 0U;
/* ESI bit in CAN FD format depends only on error passive flag. */
xFrame.esi = 0U;
@ -47,14 +54,14 @@ IVEC_EcuCommonErr_e xECU_WriteDataOverCAN(uint8_t* pucBuf, uint32_t ulId, int re
/* Message Marker. */
xFrame.mm = 0xAAU;
uint8_t TxData[DL_MCAN_MAX_PAYLOAD_BYTES]; // Define a buffer for the CAN payload data
uint16_t TxData[DL_MCAN_MAX_PAYLOAD_BYTES]; // Define a buffer for the CAN payload data
//
// // Copy the data you want to transmit (from pucBuf) into TxData
// //memcpy(TxData, &pucBuf[PKT_HEADER], retCode);
//
// Loop through pucBuf starting at PKT_HEADER and XOR each byte with 0x0000
for (int i = 0; i < retCode; i++) {
TxData[i] = pucBuf[PKT_HEADER + i];
TxData[i] = pucBuf[PKT_HEADER + i]^0x0000;
}
@ -84,7 +91,7 @@ IVEC_EcuCommonErr_e xECU_CANGetData(can_buff_t *pxBuff)
can_buff_t xBuff = { 0x00 };
DEQUEUE(g_canQueue, xBuff);
memcpy(pxBuff,&xBuff,sizeof(can_buff_t));
printf("ID received dequeue %d\n",xBuff.id);
// printf("ID received dequeue %d\n",xBuff.id);
l_xFuncStatus = commonECU_SUCCESS;
}

55
ivec_ECU/ivec_ecu_uart/src/ivec_ecu_uart.c
View File

@ -166,11 +166,52 @@ IVEC_EcuCommonErr_e xECU_UARTTransmit(McalUartHandle_s *prvUartHandle, uint8_t*
//IVEC_EcuCommonErr_e xECU_UARTGetData(McalUartHandle_s *prvUartHandle, uint8_t* pucBuffer, uint16_t len, uint16_t timeout)
//{
// IVEC_ECU_FUNC_ENTRY(LOG_STRING);
//
// uint8_t l_i32Ret;
// IVEC_EcuCommonErr_e l_xFuncStatus = commonECU_SUCCESS;
// if (prvUartHandle == NULL)
// {
// l_xFuncStatus = commonECU_INVALID_PARAM;
// goto exit;
// }
//
// int length = 2;
// uint8_t ijk = 0;
//
// uint32_t startCount; // Variable to store the initial timer count
//
//
// xMCAL_TimersetLoadValue(TIMG0, timeout + 1, &startCount); // Set the timeout value
// xMCAL_TimerstartCounter(); // Start the timer
//
// while(!xMCAL_TimergetCount(&startCount) && (ijk < len))
// {
// if(!u8CMPLX_FifoQueueEmpty(&__gprv_MyEcuUARTResponseQueue)){
// if( u8CMPLX_FifoDequeue(&__gprv_MyEcuUARTResponseQueue, &pucBuffer[ijk], &length, 0) == 1 )
// ijk++;
// }
// }
//
// xMCAL_TimerstopCounter(); // Stop the timer
//
// if (ijk != len)
// {
// l_xFuncStatus = commonECU_READ_FAIL;
// goto exit;
// }
//
// exit:
// IVEC_ECU_FUNC_EXIT(LOG_STRING, 0);
// return l_xFuncStatus;
//}
IVEC_EcuCommonErr_e xECU_UARTGetData(McalUartHandle_s *prvUartHandle, uint8_t* pucBuffer, uint16_t len, uint16_t timeout)
{
IVEC_ECU_FUNC_ENTRY(LOG_STRING);
uint8_t l_i32Ret;
IVEC_EcuCommonErr_e l_xFuncStatus = commonECU_SUCCESS;
if (prvUartHandle == NULL)
{
@ -181,21 +222,18 @@ IVEC_EcuCommonErr_e xECU_UARTGetData(McalUartHandle_s *prvUartHandle, uint8_t* p
int length = 2;
uint8_t ijk = 0;
uint32_t startCount; // Variable to store the initial timer count
uint32_t u32CommTimestamp = i32MCAL_getTicks();
xMCAL_TimersetLoadValue(TIMG0, timeout + 1, &startCount); // Set the timeout value
xMCAL_TimerstartCounter(); // Start the timer
while(!xMCAL_TimergetCount(&startCount) && (ijk < len))
while(((i32MCAL_getTicks()-u32CommTimestamp) <= timeout+1) && (ijk < len))
{
if(!u8CMPLX_FifoQueueEmpty(&__gprv_MyEcuUARTResponseQueue)){
if( u8CMPLX_FifoDequeue(&__gprv_MyEcuUARTResponseQueue, &pucBuffer[ijk], &length, 0) == 1 )
ijk++;
}
}
xMCAL_TimerstopCounter(); // Stop the timer
//xMCAL_TimerstopCounter(); // Stop the timer
if (ijk != len)
{
@ -209,6 +247,7 @@ IVEC_EcuCommonErr_e xECU_UARTGetData(McalUartHandle_s *prvUartHandle, uint8_t* p
}
PacketRetCode_t xECU_ReadCANDataLenOverUART(McalUartHandle_s *prvUartHandle, uint8_t* pucBuf, uint32_t *ulId)
{
int PktLen = PACKET_FAIL;

26
main.c
View File

@ -141,7 +141,6 @@ void UARTDataProcess()
uint32_t ulId = 0xffffffff;
retCode= xECU_ReadCANDataOverUART(&prvUartHandle,pucBuf,&ulId);
// printf("length %d\n",retCode);
if(retCode > -1)
{
if(ulId == 0x00)
@ -150,26 +149,6 @@ void UARTDataProcess()
}
else{
xECU_WriteDataOverCAN(pucBuf, ulId, retCode, 0);
// if(count == 0){
// xECU_WriteDataOverCAN(pucBuf, ulId, retCode, 0);
// printf("%d\n",count);
// count = 1;
// }
// else if (count == 1){
// xECU_WriteDataOverCAN(pucBuf, ulId, retCode, 1);
// printf("%d\n",count);
// count = 2;
// }
// else if (count == 2){
// xECU_WriteDataOverCAN(pucBuf, ulId, retCode, 2);
// printf("%d\n",count);
// count = 3;
// }
// else{
// xECU_WriteDataOverCAN(pucBuf, ulId, retCode, 3);
// printf("%d\n",count);
// count = 0;
// }
}
}
@ -186,6 +165,8 @@ void CANDataProcess()
}
int main(void)
{
xMCAL_McuInit();
@ -194,7 +175,7 @@ int main(void)
xMCAL_SYSTICK_INIT(Period_1ms);
// Initialize the timer with the desired timeout value
xMCAL_TimerInit(TIMG0); // Initialize your timer instance (e.g., TIMG0)
//xMCAL_TimerInit(TIMG0); // Initialize your timer instance (e.g., TIMG0)
xECU_UARTInit(&prvUartHandle);
xECU_CANInit(CANFD0,BAUD_500);
@ -210,6 +191,7 @@ int main(void)
// xMCAL_SYSCTL_INIT(SYSOSC,STANDBY0);
// xMCAL_SYSTICK_INIT(Period_1ms);
//
//// //SYSCFG_DL_init();
////
////

5
mspm0g3507_mcal.syscfg
View File

@ -143,7 +143,10 @@ TIMER1.peripheral.$assign = "TIMG0";
UART1.$name = "UART_1";
UART1.enabledInterrupts = ["BREAK_ERROR","FRAMING_ERROR","NOISE_ERROR","OVERRUN_ERROR","PARITY_ERROR","RX","RX_TIMEOUT_ERROR"];
UART1.enableFIFO = true;
UART1.rxFifoThreshold = "DL_UART_RX_FIFO_LEVEL_ONE_ENTRY";
UART1.targetBaudRate = 115200;
UART1.interruptPriority = "0";
UART1.peripheral.$assign = "UART1";
UART1.peripheral.rxPin.$assign = "PA9";
UART1.peripheral.txPin.$assign = "PA8";
@ -152,10 +155,10 @@ UART1.txPinConfig.hideOutputInversion = scripting.forceWrite(false);
UART1.txPinConfig.onlyInternalResistor = scripting.forceWrite(false);
UART1.txPinConfig.passedPeripheralType = scripting.forceWrite("Digital");
UART1.txPinConfig.$name = "ti_driverlib_gpio_GPIOPinGeneric2";
UART1.rxPinConfig.$name = "ti_driverlib_gpio_GPIOPinGeneric12";
UART1.rxPinConfig.hideOutputInversion = scripting.forceWrite(false);
UART1.rxPinConfig.onlyInternalResistor = scripting.forceWrite(false);
UART1.rxPinConfig.passedPeripheralType = scripting.forceWrite("Digital");
UART1.rxPinConfig.$name = "ti_driverlib_gpio_GPIOPinGeneric12";
ProjectConfig.deviceSpin = "MSPM0G3507";