diff --git a/.cproject b/.cproject
index caceae2..e516fd5 100644
--- a/.cproject
+++ b/.cproject
@@ -6,6 +6,7 @@
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@@ -29,7 +30,7 @@
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@@ -110,17 +111,18 @@
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@@ -240,6 +487,9 @@
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diff --git a/.gitignore b/.gitignore
index b281844..2f5962f 100644
--- a/.gitignore
+++ b/.gitignore
@@ -3,3 +3,4 @@
/dvt/
/.jxbrowser.userdata
/AAR/
+/Test__GNU/
diff --git a/.project b/.project
index 36714e6..af188fa 100644
--- a/.project
+++ b/.project
@@ -24,4 +24,17 @@
org.eclipse.cdt.core.ccnature
org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
+
+
+ driverlib
+ 2
+ C:/ti/mspm0_sdk_2_02_00_05/source/ti/driverlib
+
+
+
+
+ SYSCONFIG_TOOL_SYMBOLS
+ file:/C:/ti/ccs1280/ccs/utils/sysconfig_1.21.0
+
+
diff --git a/.settings/org.eclipse.core.resources.prefs b/.settings/org.eclipse.core.resources.prefs
index cdca3ba..c08c524 100644
--- a/.settings/org.eclipse.core.resources.prefs
+++ b/.settings/org.eclipse.core.resources.prefs
@@ -38,3 +38,72 @@ encoding//Debug/SDK/drivers/Src/timers/subdir_rules.mk=UTF-8
encoding//Debug/SDK/drivers/Src/timers/subdir_vars.mk=UTF-8
encoding//Debug/ivec_cmplx_gptimer/src/subdir_rules.mk=UTF-8
encoding//Debug/ivec_cmplx_gptimer/src/subdir_vars.mk=UTF-8
+encoding//Test__GNU/Core/Source/subdir_rules.mk=UTF-8
+encoding//Test__GNU/Core/Source/subdir_vars.mk=UTF-8
+encoding//Test__GNU/Generated\ Codes/subdir_rules.mk=UTF-8
+encoding//Test__GNU/Generated\ Codes/subdir_vars.mk=UTF-8
+encoding//Test__GNU/TM1650_SDK/src/subdir_rules.mk=UTF-8
+encoding//Test__GNU/TM1650_SDK/src/subdir_vars.mk=UTF-8
+encoding//Test__GNU/driverlib/lib/gcc/m0p/mspm0c110x/subdir_rules.mk=UTF-8
+encoding//Test__GNU/driverlib/lib/gcc/m0p/mspm0c110x/subdir_vars.mk=UTF-8
+encoding//Test__GNU/driverlib/lib/gcc/m0p/mspm0g1x0x_g3x0x/subdir_rules.mk=UTF-8
+encoding//Test__GNU/driverlib/lib/gcc/m0p/mspm0g1x0x_g3x0x/subdir_vars.mk=UTF-8
+encoding//Test__GNU/driverlib/lib/gcc/m0p/mspm0gx51x/subdir_rules.mk=UTF-8
+encoding//Test__GNU/driverlib/lib/gcc/m0p/mspm0gx51x/subdir_vars.mk=UTF-8
+encoding//Test__GNU/driverlib/lib/gcc/m0p/mspm0l11xx_l13xx/subdir_rules.mk=UTF-8
+encoding//Test__GNU/driverlib/lib/gcc/m0p/mspm0l11xx_l13xx/subdir_vars.mk=UTF-8
+encoding//Test__GNU/driverlib/lib/gcc/m0p/mspm0l122x_l222x/subdir_rules.mk=UTF-8
+encoding//Test__GNU/driverlib/lib/gcc/m0p/mspm0l122x_l222x/subdir_vars.mk=UTF-8
+encoding//Test__GNU/driverlib/lib/iar/m0p/mspm0c110x/subdir_rules.mk=UTF-8
+encoding//Test__GNU/driverlib/lib/iar/m0p/mspm0c110x/subdir_vars.mk=UTF-8
+encoding//Test__GNU/driverlib/lib/iar/m0p/mspm0g1x0x_g3x0x/subdir_rules.mk=UTF-8
+encoding//Test__GNU/driverlib/lib/iar/m0p/mspm0g1x0x_g3x0x/subdir_vars.mk=UTF-8
+encoding//Test__GNU/driverlib/lib/iar/m0p/mspm0gx51x/subdir_rules.mk=UTF-8
+encoding//Test__GNU/driverlib/lib/iar/m0p/mspm0gx51x/subdir_vars.mk=UTF-8
+encoding//Test__GNU/driverlib/lib/iar/m0p/mspm0l11xx_l13xx/subdir_rules.mk=UTF-8
+encoding//Test__GNU/driverlib/lib/iar/m0p/mspm0l11xx_l13xx/subdir_vars.mk=UTF-8
+encoding//Test__GNU/driverlib/lib/iar/m0p/mspm0l122x_l222x/subdir_rules.mk=UTF-8
+encoding//Test__GNU/driverlib/lib/iar/m0p/mspm0l122x_l222x/subdir_vars.mk=UTF-8
+encoding//Test__GNU/driverlib/lib/keil/m0p/mspm0c110x/subdir_rules.mk=UTF-8
+encoding//Test__GNU/driverlib/lib/keil/m0p/mspm0c110x/subdir_vars.mk=UTF-8
+encoding//Test__GNU/driverlib/lib/keil/m0p/mspm0g1x0x_g3x0x/subdir_rules.mk=UTF-8
+encoding//Test__GNU/driverlib/lib/keil/m0p/mspm0g1x0x_g3x0x/subdir_vars.mk=UTF-8
+encoding//Test__GNU/driverlib/lib/keil/m0p/mspm0gx51x/subdir_rules.mk=UTF-8
+encoding//Test__GNU/driverlib/lib/keil/m0p/mspm0gx51x/subdir_vars.mk=UTF-8
+encoding//Test__GNU/driverlib/lib/keil/m0p/mspm0l11xx_l13xx/subdir_rules.mk=UTF-8
+encoding//Test__GNU/driverlib/lib/keil/m0p/mspm0l11xx_l13xx/subdir_vars.mk=UTF-8
+encoding//Test__GNU/driverlib/lib/keil/m0p/mspm0l122x_l222x/subdir_rules.mk=UTF-8
+encoding//Test__GNU/driverlib/lib/keil/m0p/mspm0l122x_l222x/subdir_vars.mk=UTF-8
+encoding//Test__GNU/driverlib/lib/ticlang/m0p/mspm0c110x/subdir_rules.mk=UTF-8
+encoding//Test__GNU/driverlib/lib/ticlang/m0p/mspm0c110x/subdir_vars.mk=UTF-8
+encoding//Test__GNU/driverlib/lib/ticlang/m0p/mspm0g1x0x_g3x0x/subdir_rules.mk=UTF-8
+encoding//Test__GNU/driverlib/lib/ticlang/m0p/mspm0g1x0x_g3x0x/subdir_vars.mk=UTF-8
+encoding//Test__GNU/driverlib/lib/ticlang/m0p/mspm0gx51x/subdir_rules.mk=UTF-8
+encoding//Test__GNU/driverlib/lib/ticlang/m0p/mspm0gx51x/subdir_vars.mk=UTF-8
+encoding//Test__GNU/driverlib/lib/ticlang/m0p/mspm0l11xx_l13xx/subdir_rules.mk=UTF-8
+encoding//Test__GNU/driverlib/lib/ticlang/m0p/mspm0l11xx_l13xx/subdir_vars.mk=UTF-8
+encoding//Test__GNU/driverlib/lib/ticlang/m0p/mspm0l122x_l222x/subdir_rules.mk=UTF-8
+encoding//Test__GNU/driverlib/lib/ticlang/m0p/mspm0l122x_l222x/subdir_vars.mk=UTF-8
+encoding//Test__GNU/driverlib/m0p/subdir_rules.mk=UTF-8
+encoding//Test__GNU/driverlib/m0p/subdir_vars.mk=UTF-8
+encoding//Test__GNU/driverlib/m0p/sysctl/subdir_rules.mk=UTF-8
+encoding//Test__GNU/driverlib/m0p/sysctl/subdir_vars.mk=UTF-8
+encoding//Test__GNU/driverlib/subdir_rules.mk=UTF-8
+encoding//Test__GNU/driverlib/subdir_vars.mk=UTF-8
+encoding//Test__GNU/ivec_APP/src/subdir_rules.mk=UTF-8
+encoding//Test__GNU/ivec_APP/src/subdir_vars.mk=UTF-8
+encoding//Test__GNU/ivec_ECU/ivec_ecu_can/src/subdir_rules.mk=UTF-8
+encoding//Test__GNU/ivec_ECU/ivec_ecu_can/src/subdir_vars.mk=UTF-8
+encoding//Test__GNU/ivec_ECU/ivec_ecu_common/src/subdir_rules.mk=UTF-8
+encoding//Test__GNU/ivec_ECU/ivec_ecu_common/src/subdir_vars.mk=UTF-8
+encoding//Test__GNU/ivec_ECU/ivec_ecu_uart/src/subdir_rules.mk=UTF-8
+encoding//Test__GNU/ivec_ECU/ivec_ecu_uart/src/subdir_vars.mk=UTF-8
+encoding//Test__GNU/ivec_RTE/src/subdir_rules.mk=UTF-8
+encoding//Test__GNU/ivec_RTE/src/subdir_vars.mk=UTF-8
+encoding//Test__GNU/makefile=UTF-8
+encoding//Test__GNU/objects.mk=UTF-8
+encoding//Test__GNU/sources.mk=UTF-8
+encoding//Test__GNU/subdir_rules.mk=UTF-8
+encoding//Test__GNU/subdir_vars.mk=UTF-8
+encoding//Test__GNU/utils/subdir_rules.mk=UTF-8
+encoding//Test__GNU/utils/subdir_vars.mk=UTF-8
diff --git a/Core/Source/ivec_mcal_mcan.c b/Core/Source/ivec_mcal_mcan.c
index 1143d5f..0469073 100644
--- a/Core/Source/ivec_mcal_mcan.c
+++ b/Core/Source/ivec_mcal_mcan.c
@@ -100,16 +100,16 @@ static DL_MCAN_MsgRAMConfigParams gMCAN0MsgRAMConfigParams ={
/* Level for Tx Event FIFO watermark interrupt. */
.txEventFIFOWaterMark = 0,
/* Rx FIFO0 Start Address. */
- .rxFIFO0startAddr = 170 ,
+ .rxFIFO0startAddr = 172 ,
/* Number of Rx FIFO elements. */
- .rxFIFO0size = 10 ,
+ .rxFIFO0size = 64 ,
/* Rx FIFO0 Watermark. */
.rxFIFO0waterMark = 0,
.rxFIFO0OpMode = 0,
/* Rx FIFO1 Start Address. */
- .rxFIFO1startAddr = 190 ,
+ .rxFIFO1startAddr = 192 ,
/* Number of Rx FIFO elements. */
- .rxFIFO1size = 10 ,
+ .rxFIFO1size = 64 ,
/* Level for Rx FIFO 1 watermark interrupt. */
.rxFIFO1waterMark = 10,
/* FIFO blocking mode. */
@@ -225,14 +225,15 @@ volatile DL_MCAN_TxBufElement txMsg = {
.xtd = 0U,
.esi = 0U,
.dlc = 8U,
- .brs = 1U,
- .fdf = 1U,
+ .brs = 0U,
+ .fdf = 0U,
.efc = 1U,
.mm = 0xAAU,
- .data = 0U,
+ .data = {0},
};
+
/*____________________________________________________________________________________________________________________________________________________________________________________________*/
@@ -255,86 +256,75 @@ static void _prv_vGetRxMsg(DL_MCAN_RxBufElement *rxMsg,uint32_t *ID,uint8_t *RxD
}
+void __prv_CANInterruptProcess(uint32_t u32InterruptStatus)
+{
+ uint32_t IntrStatus = u32InterruptStatus;
+ DL_MCAN_getProtocolStatus(CANFD0, &HeaderStat);
+
+ if (IntrStatus & DL_MCAN_INTERRUPT_TC){
+ b_ServiceInt = true;
+ u8_MCAN_StatusFlag = IVEC_MCAL_STATUS_SUCCESS;
+ }
+
+ if( IntrStatus & DL_MCAN_INTERRUPT_BO)
+ DL_MCAN_setOpMode(CANFD0, DL_MCAN_OPERATION_MODE_NORMAL);
+
+ if(IntrStatus & (DL_MCAN_INTERRUPT_RF0N | DL_MCAN_INTERRUPT_RF1N)){
+
+ while (false == b_ServiceInt);
+
+ b_ServiceInt = false;
+ rxFS.fillLvl = 0;
+ rxFS.num = (IntrStatus & DL_MCAN_INTERRUPT_RF0N) ? DL_MCAN_RX_FIFO_NUM_0 : DL_MCAN_RX_FIFO_NUM_1;
+
+ while ((rxFS.fillLvl) == 0)
+ {
+ DL_MCAN_getRxFIFOStatus(CANFD0, &rxFS);
+ }
+
+ DL_MCAN_readMsgRam(CANFD0, DL_MCAN_MEM_TYPE_FIFO, 0, rxFS.num, &TempRxMsg);
+ DL_MCAN_writeRxFIFOAck(CANFD0, rxFS.num, rxFS.getIdx);
+
+ b_ServiceInt = true;
+ if(HeaderStat.busOffStatus==1)
+ {
+ DL_MCAN_setOpMode(CANFD0, DL_MCAN_OPERATION_MODE_NORMAL);
+ }
+ if( !TempRxMsg.xtd )
+ TempRxMsg.id = (uint32_t)(TempRxMsg.id >> 18);
+ uint8_t l_pu8DataArr[8] = {0};
+ for( int ijk = 0; ijk < 8; ijk++ )
+ l_pu8DataArr[ijk] = TempRxMsg.data[ijk] & 0xFF;
+
+ mcu_FDCAN_RxFifo_Callback(TempRxMsg.id, &l_pu8DataArr[0], TempRxMsg.dlc);
+ }
+}
+
/**
* @brief Default Interrupt Handler for MCAN
*
*/
void CANFD0_IRQHandler(void)
{
- uint32_t IntrStatus = DL_MCAN_getIntrStatus(CANFD0);
- DL_MCAN_getProtocolStatus(CANFD0, &HeaderStat);
-
- if (IntrStatus & DL_MCAN_INTERRUPT_TC){
- __asm("nop");
- DL_MCAN_clearIntrStatus(CANFD0, IntrStatus,DL_MCAN_INTR_SRC_MCAN_LINE_1);
-
- b_ServiceInt = true;
- u8_MCAN_StatusFlag = IVEC_MCAL_STATUS_SUCCESS;
- __asm("nop");
- }
- else if(IntrStatus & DL_MCAN_INTERRUPT_RF0N){
-
- while (false == b_ServiceInt);
-
- b_ServiceInt = false;
- rxFS.fillLvl = 0;
- rxFS.num = DL_MCAN_RX_FIFO_NUM_0;
-
- while ((rxFS.fillLvl) == 0)
+ switch (DL_MCAN_getPendingInterrupt(CANFD0)) {
+ case DL_MCAN_IIDX_LINE1:
{
- DL_MCAN_getRxFIFOStatus(CANFD0, &rxFS);
+ uint32_t IntrStatus = DL_MCAN_getIntrStatus(CANFD0);
+ __prv_CANInterruptProcess(IntrStatus);
+ DL_MCAN_clearIntrStatus(MCAN0_INST, IntrStatus,
+ DL_MCAN_INTR_SRC_MCAN_LINE_1);
}
-
- DL_MCAN_readMsgRam(CANFD0, DL_MCAN_MEM_TYPE_FIFO, 0, rxFS.num, &TempRxMsg);
- DL_MCAN_writeRxFIFOAck(CANFD0, rxFS.num, rxFS.getIdx);
-
- xCanIdType_t idType = ERROR;
- if (TempRxMsg.id >= 0 && TempRxMsg.id <= 0x7FF)
+ break;
+ case DL_MCAN_IIDX_LINE0:
{
- idType = STD_ID;
- } else if (TempRxMsg.id <= 0x1FFFFFFF)
- {
- idType = EXT_ID;
+ uint32_t IntrStatus = DL_MCAN_getIntrStatus(CANFD0);
+ __prv_CANInterruptProcess(IntrStatus);
+ DL_MCAN_clearIntrStatus(MCAN0_INST, IntrStatus,
+ DL_MCAN_INTR_SRC_MCAN_LINE_0);
+ break;
}
-
- for(int i=0;i<8;i++)
- {
- u8CallBack_buff[i]=(TempRxMsg.data[i] & 0xFF);
- }
-
- __asm("nop");
-
- TempRxID=TempRxMsg.id;
- _prv_vGetRxMsg(&TempRxMsg,&TempRxID ,TempRxBuffer,TempRxMsg.dlc);
- DL_MCAN_clearIntrStatus(CANFD0, IntrStatus,DL_MCAN_INTR_SRC_MCAN_LINE_1);
- b_ServiceInt = true;
- if(HeaderStat.busOffStatus==1)
- {
- DL_MCAN_setOpMode(CANFD0, DL_MCAN_OPERATION_MODE_NORMAL);
- }
-
- uint32_t u32RxCANID = 0;
- uint8_t u8RxData[8] = {0};
-
- xMCAL_MCANRx(CANFD0,&u32RxCANID,u8RxData,8);
-
-// vSOC_MeterCallback(u32RxCANID, &u8RxData[0]);
- mcu_FDCAN_RxFifo_Callback(u32RxCANID, &u8RxData[0], TempRxMsg.dlc);
- }
- else if(IntrStatus & MCAN_IR_PEA_MASK)
- {
- __asm("nop");
- DL_MCAN_clearIntrStatus(CANFD0, IntrStatus,DL_MCAN_INTR_SRC_MCAN_LINE_1);
-
- }
- else if(IntrStatus & MCAN_IR_BO_MASK)
-
- {
- DL_MCAN_clearIntrStatus(CANFD0, IntrStatus,DL_MCAN_INTR_SRC_MCAN_LINE_1);
- }
- else{
- DL_MCAN_clearIntrStatus(CANFD0, IntrStatus,DL_MCAN_INTR_SRC_MCAN_LINE_1);
-
+ default:
+ break;
}
}
@@ -429,6 +419,7 @@ IVEC_McalStatus_e xMCAL_MCANInit(MCAN_Regs* MCAN, xCAN_baud_t BAUD)
DL_MCAN_INTERRUPT_PEA | \
DL_MCAN_INTERRUPT_PED | \
DL_MCAN_INTERRUPT_RF0N | \
+ DL_MCAN_INTERRUPT_RF1N | \
DL_MCAN_INTERRUPT_TC | \
DL_MCAN_INTERRUPT_TOO), 1U);
@@ -440,11 +431,28 @@ IVEC_McalStatus_e xMCAL_MCANInit(MCAN_Regs* MCAN, xCAN_baud_t BAUD)
DL_MCAN_INTERRUPT_PEA | \
DL_MCAN_INTERRUPT_PED | \
DL_MCAN_INTERRUPT_RF0N | \
+ DL_MCAN_INTERRUPT_RF1N | \
DL_MCAN_INTERRUPT_TC | \
DL_MCAN_INTERRUPT_TOO), DL_MCAN_INTR_LINE_NUM_1);
DL_MCAN_enableIntrLine(MCAN, DL_MCAN_INTR_LINE_NUM_1, 1U);
+ DL_MCAN_selectIntrLine(MCAN, (DL_MCAN_INTERRUPT_BEU | \
+ DL_MCAN_INTERRUPT_BO | \
+ DL_MCAN_INTERRUPT_ELO | \
+ DL_MCAN_INTERRUPT_EP | \
+ DL_MCAN_INTERRUPT_EW | \
+ DL_MCAN_INTERRUPT_PEA | \
+ DL_MCAN_INTERRUPT_PED | \
+ DL_MCAN_INTERRUPT_RF0N | \
+ DL_MCAN_INTERRUPT_RF1N | \
+ DL_MCAN_INTERRUPT_TC | \
+ DL_MCAN_INTERRUPT_TOO), DL_MCAN_INTR_LINE_NUM_0);
+ DL_MCAN_enableIntrLine(MCAN, DL_MCAN_INTR_LINE_NUM_0, 1U);
+
/* Enable MSPM0 MCAN interrupt */
+ DL_MCAN_clearInterruptStatus(MCAN,(DL_MCAN_MSP_INTERRUPT_LINE0));
+ DL_MCAN_enableInterrupt(MCAN,(DL_MCAN_MSP_INTERRUPT_LINE0));
+
DL_MCAN_clearInterruptStatus(MCAN,(DL_MCAN_MSP_INTERRUPT_LINE1));
DL_MCAN_enableInterrupt(MCAN,(DL_MCAN_MSP_INTERRUPT_LINE1));
NVIC_SetPriority(CANFD0_INT_IRQn, 1);
@@ -504,9 +512,7 @@ IVEC_McalStatus_e xMCAL_MCANTx(MCAN_Regs *MCAN, uint32_t u32ID ,uint16_t *TxData
{
txMsg.data[i]=TxData[i];
}
-
- // memcpy(txMsg.data,TxData,Bytes);
- __asm("nop");
+ txMsg.dlc = Bytes;
DL_MCAN_writeMsgRam(MCAN, DL_MCAN_MEM_TYPE_BUF, BufNum , &txMsg);
@@ -520,11 +526,9 @@ IVEC_McalStatus_e xMCAL_MCANTx(MCAN_Regs *MCAN, uint32_t u32ID ,uint16_t *TxData
while(1){
if (u8_MCAN_StatusFlag == IVEC_MCAL_STATUS_SUCCESS || u8_MCAN_StatusFlag == IVEC_MCAL_STATUS_ERROR){
- __asm("nop");
return u8_MCAN_StatusFlag;
}
else if((i32MCAL_getTicks() - l_canTransmitTimeout) > 2){
- __asm("nop");
return IVEC_MCAL_STATUS_TIMEOUT;
}
}
@@ -557,18 +561,12 @@ IVEC_McalStatus_e xMCAL_MCANRx(MCAN_Regs *MCAN,uint32_t *ID ,uint8_t *RxData, in
DL_MCAN_setOpMode(CANFD0, DL_MCAN_OPERATION_MODE_NORMAL);
}
- if((((TempRxID&0xFFF)>>1)==0x16))
- {
- xMCAL_SoftReset();
- }
- if((((TempRxID&0xFFF)>>1)==0x1AE)||(((TempRxID&0xFFF)>>1)==0x520)||(((TempRxID&0xFFF)>>1)==0xBB)||(((TempRxID&0xFFF)>>1)==0x1A4)||(((TempRxID&0xFFF)>>1)==0x521))//TODO: CHANGE ID CHECKS AFTER UPDATED CAN MATRIX
- {
- *ID=((TempRxID&0xFFF)>>1);
- }
- else
- {
- *ID=TempRxID;
- }
+// if((((TempRxID&0xFFF)>>1)==0x16))
+// {
+// xMCAL_SoftReset();
+// }
+
+ *ID=TempRxID;
for(int i=0;ieUartPortNumber);
// Check if the UART instance is valid
- if (uart_inst == NULL)
+ if (uart_inst == NULL || u32size==0)
{
return STATUS_ERROR;
}
- // Check if data length is valid
- if(u32size==0)
- {
- return STATUS_ERROR;
- }
-
uint32_t l_u32Tick = i32MCAL_getTicks();
for(int j=0; j
+#include
+#include
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * ======== SYSCFG_DL_init ========
+ * Perform all required MSP DL initialization
+ *
+ * This function should be called once at a point before any use of
+ * MSP DL.
+ */
+
+
+/* clang-format off */
+
+#define POWER_STARTUP_DELAY (16)
+
+
+#define GPIO_HFXT_PORT GPIOA
+#define GPIO_HFXIN_PIN DL_GPIO_PIN_5
+#define GPIO_HFXIN_IOMUX (IOMUX_PINCM10)
+#define GPIO_HFXOUT_PIN DL_GPIO_PIN_6
+#define GPIO_HFXOUT_IOMUX (IOMUX_PINCM11)
+#define CPUCLK_FREQ 24000000
+
+
+
+/* Defines for CAPTURE_0 */
+#define CAPTURE_0_INST (TIMA1)
+#define CAPTURE_0_INST_IRQHandler TIMA1_IRQHandler
+#define CAPTURE_0_INST_INT_IRQN (TIMA1_INT_IRQn)
+#define CAPTURE_0_INST_LOAD_VALUE (0U)
+/* GPIO defines for channel 0 */
+#define GPIO_CAPTURE_0_C0_PORT GPIOA
+#define GPIO_CAPTURE_0_C0_PIN DL_GPIO_PIN_10
+#define GPIO_CAPTURE_0_C0_IOMUX (IOMUX_PINCM21)
+#define GPIO_CAPTURE_0_C0_IOMUX_FUNC IOMUX_PINCM21_PF_TIMA1_CCP0
+
+
+
+
+
+/* Defines for TIMER_0 */
+#define TIMER_0_INST (TIMG0)
+#define TIMER_0_INST_IRQHandler TIMG0_IRQHandler
+#define TIMER_0_INST_INT_IRQN (TIMG0_INT_IRQn)
+#define TIMER_0_INST_LOAD_VALUE (495U)
+/* Defines for TIMER_1 */
+#define TIMER_1_INST (TIMA0)
+#define TIMER_1_INST_IRQHandler TIMA0_IRQHandler
+#define TIMER_1_INST_INT_IRQN (TIMA0_INT_IRQn)
+#define TIMER_1_INST_LOAD_VALUE (1091U)
+
+
+
+/* Defines for UART_0 */
+#define UART_0_INST UART2
+#define UART_0_INST_FREQUENCY 24000000
+#define UART_0_INST_IRQHandler UART2_IRQHandler
+#define UART_0_INST_INT_IRQN UART2_INT_IRQn
+#define GPIO_UART_0_RX_PORT GPIOB
+#define GPIO_UART_0_TX_PORT GPIOB
+#define GPIO_UART_0_RX_PIN DL_GPIO_PIN_16
+#define GPIO_UART_0_TX_PIN DL_GPIO_PIN_15
+#define GPIO_UART_0_IOMUX_RX (IOMUX_PINCM33)
+#define GPIO_UART_0_IOMUX_TX (IOMUX_PINCM32)
+#define GPIO_UART_0_IOMUX_RX_FUNC IOMUX_PINCM33_PF_UART2_RX
+#define GPIO_UART_0_IOMUX_TX_FUNC IOMUX_PINCM32_PF_UART2_TX
+#define UART_0_BAUD_RATE (115200)
+#define UART_0_IBRD_24_MHZ_115200_BAUD (13)
+#define UART_0_FBRD_24_MHZ_115200_BAUD (1)
+
+
+
+
+
+/* Port definition for Pin Group GPIO_GRP_0 */
+#define GPIO_GRP_0_PORT (GPIOB)
+
+/* Defines for PIN_0: GPIOB.17 with pinCMx 43 on package pin 36 */
+#define GPIO_GRP_0_PIN_0_PIN (DL_GPIO_PIN_17)
+#define GPIO_GRP_0_PIN_0_IOMUX (IOMUX_PINCM43)
+
+
+/* Defines for MCAN0 */
+#define MCAN0_INST CANFD0
+#define GPIO_MCAN0_CAN_TX_PORT GPIOA
+#define GPIO_MCAN0_CAN_TX_PIN DL_GPIO_PIN_26
+#define GPIO_MCAN0_IOMUX_CAN_TX (IOMUX_PINCM59)
+#define GPIO_MCAN0_IOMUX_CAN_TX_FUNC IOMUX_PINCM59_PF_CANFD0_CANTX
+#define GPIO_MCAN0_CAN_RX_PORT GPIOA
+#define GPIO_MCAN0_CAN_RX_PIN DL_GPIO_PIN_27
+#define GPIO_MCAN0_IOMUX_CAN_RX (IOMUX_PINCM60)
+#define GPIO_MCAN0_IOMUX_CAN_RX_FUNC IOMUX_PINCM60_PF_CANFD0_CANRX
+
+
+/* Defines for MCAN0 MCAN RAM configuration */
+#define MCAN0_INST_MCAN_STD_ID_FILT_START_ADDR (0)
+#define MCAN0_INST_MCAN_STD_ID_FILTER_NUM (1)
+#define MCAN0_INST_MCAN_EXT_ID_FILT_START_ADDR (48)
+#define MCAN0_INST_MCAN_EXT_ID_FILTER_NUM (1)
+#define MCAN0_INST_MCAN_TX_BUFF_START_ADDR (148)
+#define MCAN0_INST_MCAN_TX_BUFF_SIZE (2)
+#define MCAN0_INST_MCAN_FIFO_1_START_ADDR (192)
+#define MCAN0_INST_MCAN_FIFO_1_NUM (2)
+#define MCAN0_INST_MCAN_TX_EVENT_START_ADDR (164)
+#define MCAN0_INST_MCAN_TX_EVENT_SIZE (2)
+#define MCAN0_INST_MCAN_EXT_ID_AND_MASK (0x1FFFFFFFU)
+#define MCAN0_INST_MCAN_RX_BUFF_START_ADDR (208)
+#define MCAN0_INST_MCAN_FIFO_0_START_ADDR (172)
+#define MCAN0_INST_MCAN_FIFO_0_NUM (3)
+
+
+
+
+/* clang-format on */
+
+void SYSCFG_DL_init(void);
+void SYSCFG_DL_initPower(void);
+void SYSCFG_DL_GPIO_init(void);
+void SYSCFG_DL_SYSCTL_init(void);
+void SYSCFG_DL_SYSCTL_CLK_init(void);
+void SYSCFG_DL_CAPTURE_0_init(void);
+void SYSCFG_DL_TIMER_0_init(void);
+void SYSCFG_DL_TIMER_1_init(void);
+void SYSCFG_DL_UART_0_init(void);
+
+void SYSCFG_DL_MCAN0_init(void);
+
+bool SYSCFG_DL_saveConfiguration(void);
+bool SYSCFG_DL_restoreConfiguration(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ti_msp_dl_config_h */
diff --git a/TI_Bootloader_HW35.bin b/TI_Bootloader_HW35.bin
new file mode 100644
index 0000000..3839008
Binary files /dev/null and b/TI_Bootloader_HW35.bin differ
diff --git a/bootloader_flasher.uniflash b/bootloader_flasher.uniflash
new file mode 100644
index 0000000..1335d27
--- /dev/null
+++ b/bootloader_flasher.uniflash
@@ -0,0 +1 @@
+{"programs":[{"name":"CORTEX_M0P","programs":[{"file":{"name":"TI_Bootloader_HW35.hex","path":"D:/AAR/cantouart_ti/TI_Bootloader_HW35.hex","size":83506,"type":"NWFile","isLocal":true},"isBinary":false,"index":0,"isSelected":true,"provider":"NWProgramProvider"}]}],"propertyActions":{"actionList":[],"orderIndex":0},"session":{"version":"uniflash_session_format_version_2","ccxmlContent":"\n\n\n \n \n \t\n \t\t \n \t\n \t\t \n \t\n \t\t \n \t\n \n \n \n \n \n\n \n \n \n \n \n \n \n \n\n","deviceXMLFile":"MSPM0G3507","connectionXMLFile":"TIXDS110_Connection","queryConfig":{"cores":[{"name":"CORTEX_M0P","pathName":"Texas Instruments XDS110 USB Debug Probe/CORTEX_M0P","isa":"CORTEX_M0P","$$hashKey":"object:7166"}],"deviceProperties":{"FilterString":{"Type":"stringfield","Value":"MSPM0","id":"FilterString"},"DefaultToolChain":{"Type":"stringfield","Value":"TICLANG","id":"DefaultToolChain"},"PromoteSDKExamples":{"Type":"stringfield","Value":"true","id":"PromoteSDKExamples"},"HexBuildOptions":{"Type":"stringfield","Value":"--romwidth=8 --memwidth=8 --intel","id":"HexBuildOptions"},"TICLANGHexBuildOptions":{"Type":"stringfield","Value":"--romwidth=8 --memwidth=8 --intel","id":"TICLANGHexBuildOptions"},"EnableSWDPassword":{"Type":"choicelist","Name":"Enable SWD Password","Value":"0","id":"EnableSWDPassword"},"MSPM0SWDPassword0":{"Name":"SWD Password [0] (32-bit HEX format)","Type":"numericfield","Value":"0","NumericType":"HEX","UpperBound":"0xFFFFFFFF","LowerBound":"0","id":"MSPM0SWDPassword0"},"MSPM0SWDPassword1":{"Name":"SWD Password [1] (32-bit HEX format)","Type":"numericfield","Value":"0","NumericType":"HEX","UpperBound":"0xFFFFFFFF","LowerBound":"0","id":"MSPM0SWDPassword1"},"MSPM0SWDPassword2":{"Name":"SWD Password [2] (32-bit HEX format)","Type":"numericfield","Value":"0","NumericType":"HEX","UpperBound":"0xFFFFFFFF","LowerBound":"0","id":"MSPM0SWDPassword2"},"MSPM0SWDPassword3":{"Name":"SWD Password [3] (32-bit HEX format)","Type":"numericfield","Value":"0","NumericType":"HEX","UpperBound":"0xFFFFFFFF","LowerBound":"0","id":"MSPM0SWDPassword3"}},"partnum":"MSPM0G3507","connectionProperties":{"Diagnostic Command":{"Name":"Diagnostic Command","Type":"hiddenfield","Value":"%ccs_base%/common/uscif/dbgjtag -f %boarddatafile% -rv -o -S integrity","ID":"DiagnosticCommand"},"Debug Probe Filename":{"Name":"Debug Probe Filename","Type":"hiddenfield","Value":"jioxds110.dll","ID":"SEPK.POD_DRVR"},"Debug Probe Selection":{"Name":"Debug Probe Selection","Type":"choicelist","Value":"0","ID":"SEPK.POD_PORT"},"Power Selection":{"id":"Power Selection","Name":"Power Selection","Type":"choicelist","Value":"0","ID":"SEPK.POD_SUPPLY"},"Title":{"Name":"Title","Type":"hiddenfield","Value":"Texas Instruments XDS110 USB","ID":"PRODUCT.TITLE"},"Alias":{"Name":"Alias","Type":"hiddenfield","Value":"TI_XDS110_USB","ID":"PRODUCT.ALIAS"},"Name":{"Name":"Name","Type":"hiddenfield","Value":"XDS110","ID":"PRODUCT.NAME"},"TMS/TDO Output Timing":{"Name":"TMS/TDO Output Timing","Type":"hiddenfield","Value":"FALL","ID":"USCIF.TDOEDGE"},"The JTAG TCLK Frequency (MHz)":{"Name":"The JTAG TCLK Frequency (MHz)","Type":"choicelist","Value":"0","ID":"USCIF.TCLK_PROGRAM"},"JTAG Signal Isolation":{"Name":"JTAG Signal Isolation","Type":"choicelist","Value":"1","ID":"USCIF.JTAG_ISOLATE"},"SWD Mode Settings":{"id":"SWD Mode Settings","desc":"JTAG / SWD / cJTAG Mode","Type":"choicelist","Value":"0","ID":"DOT7.DTS_USAGE"},"SWD.SWJ_DP_DEFAULT_MODE":{"Name":"SWJ-DP default mode","id":"SWD.SWJ_DP_DEFAULT_MODE","desc":"Default mode of the SWJ-DP","Type":"hiddenfield","Value":"0"},"SWD.APPY_PIN_RESET_DORMANT_WAKEUP":{"Name":"Apply pin reset","id":"SWD.APPY_PIN_RESET_DORMANT_WAKEUP","desc":"Apply pin reset when waking up from the dormant state","Type":"hiddenfield","Value":"0"}},"deviceXMLFile":"/TICloudAgent/win/ccs_base/common/targetdb/devices/MSPM0G3507.xml","connectionXMLFile":"/TICloudAgent/win/ccs_base/common/targetdb/connections/TIXDS110_Connection.xml","debuggableCores":[{"name":"CORTEX_M0P","pathName":"Texas Instruments XDS110 USB Debug Probe/CORTEX_M0P","isa":"CORTEX_M0P","$$hashKey":"object:7166"},{"name":"SEC_AP","pathName":"Texas Instruments XDS110 USB Debug Probe/SEC_AP","isa":"SEC_AP"}],"nondebuggableCores":[]}},"propertyValues":[{"name":"CORTEX_M0P","valueObj":[{"id":"FlashResetBeforeLoadSetting","value":true,"modified":false,"disabled":false,"valueType":"Boolean"},{"id":"FlashResetAfterLoadSetting","value":true,"modified":false,"disabled":false,"valueType":"Boolean"},{"id":"FlashResetType","value":"Hard reset","modified":false,"disabled":false,"valueType":"ChoiceList"},{"id":"MSPM0EraseText","modified":false,"disabled":false,"valueType":"Text"},{"id":"FlashEraseSelection","value":"Erase MAIN memory only","modified":false,"disabled":false,"valueType":"ChoiceList"},{"id":"FlashEraseSectorsText","modified":false,"disabled":false,"valueType":"Text"},{"id":"FlashEraseSectorsStartAddress","value":"0","modified":false,"disabled":false,"valueType":"String"},{"id":"FlashEraseSectorsEndAddress","value":"0","modified":false,"disabled":false,"valueType":"String"},{"id":"FlashNonMainIgnoreErase","value":false,"modified":false,"disabled":false,"valueType":"Boolean"},{"id":"FlashVerification","value":true,"modified":false,"disabled":false,"valueType":"Boolean"},{"id":"ManualMassErase","modified":false,"disabled":false,"valueType":"Button"},{"id":"AutomaticMassErase","modified":false,"disabled":false,"valueType":"Button"},{"id":"ManualFactoryReset","modified":false,"disabled":false,"valueType":"Button"},{"id":"AutomaticFactoryReset","modified":false,"disabled":false,"valueType":"Button"},{"id":"EraseECCSRAMText","modified":false,"disabled":false,"valueType":"Text"},{"id":"EraseECCSRAM","value":false,"modified":false,"disabled":false,"valueType":"Boolean"},{"id":"FlashSkipDeviceID","value":false,"modified":false,"disabled":false,"valueType":"Boolean"},{"id":"FlashVerboseMode","value":false,"modified":false,"disabled":false,"valueType":"Boolean"}]}],"quickSettings":[{"core":"CORTEX_M0P","pinnedList":[]}]}
\ No newline at end of file
diff --git a/ivec_ECU/ivec_ecu_can/src/ivec_ecu_can.c b/ivec_ECU/ivec_ecu_can/src/ivec_ecu_can.c
index e3061ae..16176ff 100644
--- a/ivec_ECU/ivec_ecu_can/src/ivec_ecu_can.c
+++ b/ivec_ECU/ivec_ecu_can/src/ivec_ecu_can.c
@@ -28,48 +28,18 @@ IVEC_EcuCommonErr_e xECU_WriteDataOverCAN(uint8_t* pucBuf, uint32_t ulId, int re
{
IVEC_EcuCommonErr_e l_xFuncStatus = commonECU_WRITE_FAIL;
uint8_t l_i32Ret;
-// if ( (retCode >= 0) && (ulId > 0x00) && (ulId < 0xffffffff) )
-// {
- DL_MCAN_TxBufElement xFrame = {0};
-
- xFrame.dlc = (uint8_t)retCode;
- xFrame.xtd = (ulId > 0x7ff) ? 1U : 0U;
- if(xFrame.xtd == 0)
- {
- xFrame.id = ulId << 18U; //txMsg.id = ((uint32_t)(0x9)) << 18U;
- }
- else
- xFrame.id = ulId; //txMsg.id = ((uint32_t)(0x9)) << 18U;
-
- xFrame.rtr = 0U;
- /* ESI bit in CAN FD format depends only on error passive flag. */
- xFrame.esi = 0U;
- /* CAN FD frames transmitted with bit rate switching. */
- xFrame.brs = 0U;
- /* Frame transmitted in CAN FD format. */
- xFrame.fdf = 0U;
- /* Store Tx events. */
- xFrame.efc = 1U;
- /* Message Marker. */
- xFrame.mm = 0xAAU;
-
- uint16_t TxData[DL_MCAN_MAX_PAYLOAD_BYTES]; // Define a buffer for the CAN payload data
- for (int i = 0; i < retCode; i++) {
- TxData[i] = pucBuf[PKT_HEADER + i]^0x0000;
- }
-
-
- int Bytes = retCode;
- l_i32Ret = xMCAL_MCANTx(CANFD0, xFrame.id, TxData, BufNum, Bytes);
- if(l_i32Ret == IVEC_MCAL_STATUS_SUCCESS)
- {
- l_xFuncStatus = commonECU_SUCCESS;
- }
-
- //}
+ uint16_t TxData[8] = {0}; // Define a buffer for the CAN payload data
+ for (int i = 0; i < retCode; i++) {
+ TxData[i] = (uint16_t)(pucBuf[i] ^ 0x0000);
+ }
+ int Bytes = retCode;
+ l_i32Ret = xMCAL_MCANTx(CANFD0, ulId, TxData, BufNum, Bytes);
+ if(l_i32Ret == IVEC_MCAL_STATUS_SUCCESS)
+ {
+ l_xFuncStatus = commonECU_SUCCESS;
+ }
return l_xFuncStatus;
-
}
IVEC_EcuCommonErr_e xECU_CANGetData(can_buff_t *pxBuff)
diff --git a/ivec_ECU/ivec_ecu_uart/src/ivec_ecu_uart.c b/ivec_ECU/ivec_ecu_uart/src/ivec_ecu_uart.c
index db0d850..f528bce 100644
--- a/ivec_ECU/ivec_ecu_uart/src/ivec_ecu_uart.c
+++ b/ivec_ECU/ivec_ecu_uart/src/ivec_ecu_uart.c
@@ -6,7 +6,7 @@
#define LOG_STRING "ivec-ecu-UART"
#define CAN_UART_BUFFER_MAX_SIZE 2048
-#define DATA_PACKET_TIMEOUT 100
+#define DATA_PACKET_TIMEOUT 10
CmplxFifoQueueHandle_s __gprv_MyEcuUARTResponseQueue = { 0 };
diff --git a/ivec_RTE/src/ivec_rte.c b/ivec_RTE/src/ivec_rte.c
index d5c5e2e..bc70809 100644
--- a/ivec_RTE/src/ivec_rte.c
+++ b/ivec_RTE/src/ivec_rte.c
@@ -17,8 +17,10 @@
McalUartHandle_s g_xUartHandle;
uint32_t g_u32UartSpeed = 0;
uint16_t g_u16CanSpeed = 0;
+uint8_t g_pu8Buf[MAX_PACKET_LENGTH] = {0};
static uint8_t __gprv_u8Idx = 0;
+static uint8_t __gprv_u8Buf = 0;
extern ExtU_socTouchDisplay_T socTouchDisplay_U;
extern ExtY_socTouchDisplay_T socTouchDisplay_Y;
@@ -134,18 +136,18 @@ void vRTE_InitUARTCANEcho(void)
void vRTE_UARTDataProcess(void)
{
PacketRetCode_t retCode = PACKET_FAIL;
- uint8_t pucBuf[MAX_PACKET_LENGTH] = {0};
uint32_t ulId = 0xffffffff;
- retCode= xECU_ReadCANDataOverUART(&g_xUartHandle,pucBuf,&ulId);
+ retCode= xECU_ReadCANDataOverUART(&g_xUartHandle,g_pu8Buf,&ulId);
+ ulId &= 0x1fffffff;
if(retCode > -1)
{
if(retCode > 0 && ulId == 0x00)
{
uint32_t baudrate = 0;
- uint8_t mode = pucBuf[PKT_HEADER];
- memcpy(&baudrate, &pucBuf[PKT_HEADER+1], (uint32_t)retCode);
- vECU_InitiateUartToCanTransmit(&g_xUartHandle, 0x01, pucBuf, 0);
+ uint8_t mode = g_pu8Buf[PKT_HEADER];
+ memcpy(&baudrate, &g_pu8Buf[PKT_HEADER+1], (uint32_t)retCode);
+ vECU_InitiateUartToCanTransmit(&g_xUartHandle, 0x01, g_pu8Buf, 0);
if( mode == 0 )
{
g_u32UartSpeed = baudrate;
@@ -157,27 +159,26 @@ void vRTE_UARTDataProcess(void)
// xECU_CanReInit(CANFD0, g_u16CanSpeed);
}
vMCAL_DelayTicks(100);
- vECU_InitiateUartToCanTransmit(&g_xUartHandle, 0x01, pucBuf, 0);
+ vECU_InitiateUartToCanTransmit(&g_xUartHandle, 0x01, g_pu8Buf, 0);
}
if ( retCode == 0 && ulId == 0){
- vECU_InitiateUartToCanTransmit(&g_xUartHandle, 0x0, pucBuf, 0);
+ vECU_InitiateUartToCanTransmit(&g_xUartHandle, 0x0, g_pu8Buf, 0);
}
- if ( retCode >= 0 && ulId > 0x00 && ulId < 0xffffffff )
+ if ( retCode >= 0 && (ulId > 0x00 && ulId < 0xffffffff) )
{
- xECU_WriteDataOverCAN(pucBuf, ulId, retCode, 0);
+ __gprv_u8Buf = (__gprv_u8Buf + 1) % 3;
+ xECU_WriteDataOverCAN(&g_pu8Buf[PKT_HEADER], ulId, retCode, __gprv_u8Buf);
}
}
}
void vRTE_CANDataProcess(void)
{
- IVEC_EcuCommonErr_e retCode = commonECU_FAIL;
can_buff_t xBuff = { 0x00 };
-
-
- retCode = xECU_CANGetData(&xBuff);
- if(retCode == commonECU_SUCCESS)
+ uint8_t l_u8TxBurstMessages = 0;
+ while( xECU_CANGetData(&xBuff) == commonECU_SUCCESS && (l_u8TxBurstMessages < 32) )
{
+ l_u8TxBurstMessages++;
vECU_InitiateUartToCanTransmit(&g_xUartHandle, (uint32_t)xBuff.id, (uint8_t*)&xBuff.data[0], (uint8_t)xBuff.length);
socTouchDisplay_U.Input[__gprv_u8Idx].ID = xBuff.id;
socTouchDisplay_U.Input[__gprv_u8Idx].Length = xBuff.length;
diff --git a/main.c b/main.c
index 66afc9f..dab2f33 100644
--- a/main.c
+++ b/main.c
@@ -5,7 +5,7 @@
* @ Remove (_N) from the end of definition to define
* @ Content added by AS - MCAL function for ADC, ADC with DMA, Periodic Timer, PWM, SysTick and Input Capture
*/
-
+#include "ti_msp_dl_config.h"
#include "../utils/utils.h"
#include "../Core/Include/gpio.h"
#include "../Core/Include/ivec_mcal_adc_dma.h"
@@ -14,7 +14,6 @@
#include "../Core/Include/ivec_mcal_spi.h"
#include "../Core/Include/ivec_mcal_i2c.h"
#include "../Core/Include/ivec_mcal_uart.h"
-#include "ti_msp_dl_config.h"
#include "string.h"
#include "ivec_rte.h"
@@ -39,8 +38,10 @@ static void __prv_TimerConfig(void)
int main(void)
{
+ __enable_irq();
+ volatile DL_SYSCTL_RESET_CAUSE l_xResetCause = DL_SYSCTL_getResetCause();
xMCAL_McuInit();
- xMCAL_SYSCTL_INIT(HFXT,SLEEP0);
+ xMCAL_SYSCTL_INIT(HFXT,STANDBY0);
xMCAL_SYSTICK_INIT(Period_1ms);
__prv_TimerConfig();
diff --git a/mspm0g3507.cmd b/mspm0g3507.cmd
index 9bf7d7e..a30eea4 100644
--- a/mspm0g3507.cmd
+++ b/mspm0g3507.cmd
@@ -1,33 +1,33 @@
/*****************************************************************************
- Copyright (C) 2023 Texas Instruments Incorporated - http://www.ti.com/
+ Copyright (C) 2023 Texas Instruments Incorporated - http://www.ti.com/
- Redistribution and use in source and binary forms, with or without
- modification, are permitted provided that the following conditions
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions
are met:
- Redistributions of source code must retain the above copyright
+ Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the
distribution.
Neither the name of Texas Instruments Incorporated nor the names of
its contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
diff --git a/mspm0g3507.lds b/mspm0g3507.lds
new file mode 100644
index 0000000..97562bf
--- /dev/null
+++ b/mspm0g3507.lds
@@ -0,0 +1,169 @@
+/*Entry Point
+ENTRY(Reset_Handler)
+/* Generate a link error if heap and stack don't fit into RAM */
+_Min_Heap_Size = 0; /* required amount of heap */
+_Min_Stack_Size = 0x000012E8; /* required amount of stack */
+
+/* Specify the memory areas */
+MEMORY
+{
+ FLASH (RX) : ORIGIN = 0x00000000, LENGTH = 0x00020000
+ SRAM (RWX) : ORIGIN = 0x20200000, LENGTH = 0x00008000
+ BCR_CONFIG (R) : ORIGIN = 0x41C00000, LENGTH = 0x00000080
+ BSL_CONFIG (R) : ORIGIN = 0x41C00100, LENGTH = 0x00000080
+}
+
+/* Note: SRAM length must match MPPC/MEMSS config! Please edit it manually. */
+
+REGION_ALIAS("REGION_TEXT", FLASH);
+REGION_ALIAS("REGION_PREINIT_ARRAY", FLASH);
+REGION_ALIAS("REGION_INIT_ARRAY", FLASH);
+REGION_ALIAS("REGION_FINI_ARRAY", FLASH);
+REGION_ALIAS("REGION_BSS", SRAM);
+REGION_ALIAS("REGION_NOINIT", SRAM);
+REGION_ALIAS("REGION_DATA", SRAM);
+REGION_ALIAS("REGION_STACK", SRAM);
+REGION_ALIAS("REGION_HEAP", SRAM);
+REGION_ALIAS("REGION_TEXT_RAM", SRAM);
+REGION_ALIAS("REGION_ARM_EXIDX", FLASH);
+REGION_ALIAS("REGION_ARM_EXTAB", FLASH);
+
+/* Define output sections */
+SECTIONS
+{
+ /* section for the interrupt vector area */
+ PROVIDE (_intvecs_base_address =
+ DEFINED(_intvecs_base_address) ? _intvecs_base_address : 0x00000000);
+
+ .intvecs (_intvecs_base_address) : AT (_intvecs_base_address) {
+ KEEP (*(.intvecs))
+ } > REGION_TEXT
+
+ PROVIDE (_vtable_base_address =
+ DEFINED(_vtable_base_address) ? _vtable_base_address : 0x20200000);
+
+ .vtable (_vtable_base_address) (NOLOAD) : AT (_vtable_base_address) {
+ KEEP (*(.vtable))
+ } > REGION_DATA
+
+ .text : {
+ CREATE_OBJECT_SYMBOLS
+ KEEP (*(.text))
+ . = ALIGN(0x8);
+ *(.text.*)
+ . = ALIGN(0x8);
+ KEEP (*(.ctors))
+ . = ALIGN(0x8);
+ KEEP (*(.dtors))
+ . = ALIGN(0x8);
+ KEEP (*(.init))
+ . = ALIGN(0x8);
+ KEEP (*(.fini*))
+ . = ALIGN(0x8);
+ } > REGION_TEXT AT> REGION_TEXT
+
+ .ramfunc : {
+ __ramfunct_load__ = LOADADDR (.ramfunc);
+ __ramfunct_start__ = .;
+ *(.ramfunc)
+ . = ALIGN(0x8);
+ __ramfunct_end__ = .;
+ } > REGION_TEXT_RAM AT> REGION_TEXT
+
+ .rodata : {
+ *(.rodata)
+ . = ALIGN(0x8);
+ *(.rodata.*)
+ . = ALIGN(0x8);
+ } > REGION_TEXT AT> REGION_TEXT
+
+ .preinit_array : {
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP (*(.preinit_array*));
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ } > REGION_PREINIT_ARRAY AT> REGION_TEXT
+
+ .init_array : {
+ . = ALIGN(0x8);
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array*))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ } > REGION_INIT_ARRAY AT> REGION_TEXT
+
+ .fini_array : {
+ . = ALIGN(0x8);
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(SORT(.fini_array.*)))
+ KEEP (*(.fini_array*))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ . = ALIGN(0x8);
+ } > REGION_FINI_ARRAY AT> REGION_TEXT
+
+ .ARM.exidx : {
+ __exidx_start = .;
+ *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+ __exidx_end = .;
+ } > REGION_ARM_EXIDX AT> REGION_ARM_EXIDX
+
+ .ARM.extab : {
+ . = ALIGN(0x8);
+ KEEP (*(.ARM.extab* .gnu.linkonce.armextab.*))
+ . = ALIGN(0x8);
+ } > REGION_ARM_EXTAB AT> REGION_ARM_EXTAB
+
+ __etext = .;
+
+ .data : {
+ __data_load__ = LOADADDR (.data);
+ __data_start__ = .;
+ KEEP (*(.data))
+ KEEP (*(.data*))
+ . = ALIGN (8);
+ __data_end__ = .;
+ } > REGION_DATA AT> REGION_TEXT
+
+ .bss : {
+ __bss_start__ = .;
+ *(.shbss)
+ KEEP (*(.bss))
+ *(.bss.*)
+ *(COMMON)
+ . = ALIGN (8);
+ __bss_end__ = .;
+ } > REGION_BSS AT> REGION_BSS
+
+ .noinit : {
+ /* place all symbols in input sections that start with .noinit */
+ KEEP(*(*.noinit*))
+ . = ALIGN (8);
+ } > REGION_NOINIT AT> REGION_NOINIT
+
+ .heap : {
+ __heap_start__ = .;
+ end = __heap_start__;
+ _end = end;
+ __end = end;
+ KEEP (*(.heap))
+ __heap_end__ = .;
+ __HeapLimit = __heap_end__;
+ } > REGION_HEAP AT> REGION_HEAP
+
+ .stack (NOLOAD) : ALIGN(0x8) {
+ _stack = .;
+ KEEP(*(.stack))
+ } > REGION_STACK AT> REGION_STACK
+
+ .BCRConfig :
+ {
+ KEEP(*(.BCRConfig))
+ } > BCR_CONFIG
+
+ .BSLConfig :
+ {
+ KEEP(*(.BSLConfig))
+ } > BSL_CONFIG
+
+ __StackTop = ORIGIN(REGION_STACK) + LENGTH(REGION_STACK);
+ PROVIDE(__stack = __StackTop);
+}
diff --git a/mspm0g3507_mcal.syscfg b/mspm0g3507_mcal.syscfg
index f880c3e..4157cd6 100644
--- a/mspm0g3507_mcal.syscfg
+++ b/mspm0g3507_mcal.syscfg
@@ -45,6 +45,7 @@ pinFunction4.HFCLKMonitor = true;
pinFunction4.enable = true;
CAPTURE1.$name = "CAPTURE_0";
+CAPTURE1.timerClkPrescale = 2;
CAPTURE1.ccp0PinConfig.$name = "ti_driverlib_gpio_GPIOPinGeneric4";
const Board = scripting.addModule("/ti/driverlib/Board", {}, false);
@@ -99,6 +100,7 @@ UART1.txPinConfig.$name = "ti_driverlib_gpio_GPIOPinGeneric2";
UART1.rxPinConfig.$name = "ti_driverlib_gpio_GPIOPinGeneric3";
ProjectConfig.deviceSpin = "MSPM0G3507";
+ProjectConfig.genLinker = false;
/**
* Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future
diff --git a/startup_mspm0g350x_gcc.c b/startup_mspm0g350x_gcc.c
new file mode 100644
index 0000000..7046a6e
--- /dev/null
+++ b/startup_mspm0g350x_gcc.c
@@ -0,0 +1,222 @@
+/*****************************************************************************
+
+ Copyright (C) 2023 Texas Instruments Incorporated - http://www.ti.com/
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions
+ are met:
+
+ Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+
+ Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the
+ distribution.
+
+ Neither the name of Texas Instruments Incorporated nor the names of
+ its contributors may be used to endorse or promote products derived
+ from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*****************************************************************************/
+
+#include
+
+/* Entry point for the application. */
+extern void SystemInit(void);
+extern int main( void );
+
+extern uint32_t __data_load__;
+extern uint32_t __data_start__;
+extern uint32_t __data_end__;
+extern uint32_t __ramfunct_load__;
+extern uint32_t __ramfunct_start__;
+extern uint32_t __ramfunct_end__;
+extern uint32_t __bss_start__;
+extern uint32_t __bss_end__;
+extern uint32_t __StackTop;
+
+typedef void( *pFunc )( void );
+
+/* Forward declaration of the default fault handlers. */
+void Default_Handler(void);
+extern void Reset_Handler (void) __attribute__((weak));
+extern void __libc_init_array(void);
+extern void _init (void) __attribute__((weak, alias("initStub")));
+void initStub(void){;}
+
+/* Processor Exceptions */
+extern void NMI_Handler (void) __attribute__((weak, alias("Default_Handler")));
+extern void HardFault_Handler (void) __attribute__((weak, alias("Default_Handler")));
+extern void SVC_Handler (void) __attribute__((weak, alias("Default_Handler")));
+extern void PendSV_Handler (void) __attribute__((weak, alias("Default_Handler")));
+extern void SysTick_Handler (void) __attribute__((weak, alias("Default_Handler")));
+
+/* Device Specific Interrupt Handlers */
+extern void GROUP0_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
+extern void GROUP1_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
+extern void TIMG8_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
+extern void UART3_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
+extern void ADC0_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
+extern void ADC1_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
+extern void CANFD0_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
+extern void DAC0_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
+extern void SPI0_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
+extern void SPI1_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
+extern void UART1_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
+extern void UART2_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
+extern void UART0_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
+extern void TIMG0_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
+extern void TIMG6_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
+extern void TIMA0_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
+extern void TIMA1_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
+extern void TIMG7_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
+extern void TIMG12_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
+extern void I2C0_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
+extern void I2C1_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
+extern void AES_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
+extern void RTC_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
+extern void DMA_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
+
+
+/* Interrupt vector table. Note that the proper constructs must be placed on this to */
+/* ensure that it ends up at physical address 0x0000.0000 or at the start of */
+/* the program if located at a start address other than 0. */
+void (* const interruptVectors[])(void) __attribute__ ((used)) __attribute__ ((section (".intvecs"))) =
+{
+ (pFunc)&__StackTop, /* The initial stack pointer */
+ Reset_Handler, /* The reset handler */
+ NMI_Handler, /* The NMI handler */
+ HardFault_Handler, /* The hard fault handler */
+ 0, /* Reserved */
+ 0, /* Reserved */
+ 0, /* Reserved */
+ 0, /* Reserved */
+ 0, /* Reserved */
+ 0, /* Reserved */
+ 0, /* Reserved */
+ SVC_Handler, /* SVCall handler */
+ 0, /* Reserved */
+ 0, /* Reserved */
+ PendSV_Handler, /* The PendSV handler */
+ SysTick_Handler, /* SysTick handler */
+ GROUP0_IRQHandler, /* GROUP0 interrupt handler */
+ GROUP1_IRQHandler, /* GROUP1 interrupt handler */
+ TIMG8_IRQHandler, /* TIMG8 interrupt handler */
+ UART3_IRQHandler, /* UART3 interrupt handler */
+ ADC0_IRQHandler, /* ADC0 interrupt handler */
+ ADC1_IRQHandler, /* ADC1 interrupt handler */
+ CANFD0_IRQHandler, /* CANFD0 interrupt handler */
+ DAC0_IRQHandler, /* DAC0 interrupt handler */
+ 0, /* Reserved */
+ SPI0_IRQHandler, /* SPI0 interrupt handler */
+ SPI1_IRQHandler, /* SPI1 interrupt handler */
+ 0, /* Reserved */
+ 0, /* Reserved */
+ UART1_IRQHandler, /* UART1 interrupt handler */
+ UART2_IRQHandler, /* UART2 interrupt handler */
+ UART0_IRQHandler, /* UART0 interrupt handler */
+ TIMG0_IRQHandler, /* TIMG0 interrupt handler */
+ TIMG6_IRQHandler, /* TIMG6 interrupt handler */
+ TIMA0_IRQHandler, /* TIMA0 interrupt handler */
+ TIMA1_IRQHandler, /* TIMA1 interrupt handler */
+ TIMG7_IRQHandler, /* TIMG7 interrupt handler */
+ TIMG12_IRQHandler, /* TIMG12 interrupt handler */
+ 0, /* Reserved */
+ 0, /* Reserved */
+ I2C0_IRQHandler, /* I2C0 interrupt handler */
+ I2C1_IRQHandler, /* I2C1 interrupt handler */
+ 0, /* Reserved */
+ 0, /* Reserved */
+ AES_IRQHandler, /* AES interrupt handler */
+ 0, /* Reserved */
+ RTC_IRQHandler, /* RTC interrupt handler */
+ DMA_IRQHandler, /* DMA interrupt handler */
+
+};
+
+/* Forward declaration of the default fault handlers. */
+/* This is the code that gets called when the processor first starts execution */
+/* following a reset event. Only the absolutely necessary set is performed, */
+/* after which the application supplied entry() routine is called. Any fancy */
+/* actions (such as making decisions based on the reset cause register, and */
+/* resetting the bits in that register) are left solely in the hands of the */
+/* application. */
+void Reset_Handler(void)
+{
+ uint32_t *pui32Src, *pui32Dest;
+ uint32_t *bs, *be;
+
+ //
+ // Copy the data segment initializers from flash to SRAM.
+ //
+ pui32Src = &__data_load__;
+ for(pui32Dest = &__data_start__; pui32Dest < &__data_end__; )
+ {
+ *pui32Dest++ = *pui32Src++;
+ }
+
+ //
+ // Copy the ramfunct segment initializers from flash to SRAM.
+ //
+ pui32Src = &__ramfunct_load__;
+ for(pui32Dest = &__ramfunct_start__; pui32Dest < &__ramfunct_end__; )
+ {
+ *pui32Dest++ = *pui32Src++;
+ }
+
+ // Initialize .bss to zero
+ bs = &__bss_start__;
+ be = &__bss_end__;
+ while (bs < be)
+ {
+ *bs = 0;
+ bs++;
+ }
+
+ /*
+ * System initialization routine can be called here, but it's not
+ * required for MSPM0.
+ */
+ // SystemInit();
+
+ //
+ // Initialize virtual tables, along executing init, init_array, constructors
+ // and preinit_array functions
+ //
+ __libc_init_array();
+
+ //
+ // Call the application's entry point.
+ //
+
+ main();
+
+ //
+ // If we ever return signal Error
+ //
+ HardFault_Handler();
+}
+
+/* This is the code that gets called when the processor receives an unexpected */
+/* interrupt. This simply enters an infinite loop, preserving the system state */
+/* for examination by a debugger. */
+void Default_Handler(void)
+{
+ /* Enter an infinite loop. */
+ while(1)
+ {
+ }
+}