parent
6b74e25455
commit
f346070551
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@ -499,7 +499,7 @@ void vCcUartRxToCanTx(IVEC_EcuCommonCanFrame_s* pxCanMsg)
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l_i32RetSize = u16CMPLX_vFrameEncode((uint32_t)l_u32Id, (uint8_t*)&pu8Data[1], u8Len, l_u8UartBuffer, 30);
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l_i32RetSize = u16CMPLX_vFrameEncode((uint32_t)l_u32Id, (uint8_t*)&pu8Data[1], u8Len, l_u8UartBuffer, 30);
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l_i32Status = IVEC_ECUUartWrite(&__gprv_UartCcHandle, l_u8UartBuffer, l_i32RetSize);
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l_i32Status = IVEC_ECUUartWrite(&__gprv_UartCcHandle, l_u8UartBuffer, l_i32RetSize);
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vMCAL_WDG_Refresh();
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vMCAL_WDG_Refresh();
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DL_WWDT_disablePower(WATCHDOG_TIMER);
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vMCAL_WatchdogDisablePower();
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vMCAL_softReset();
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vMCAL_softReset();
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}
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}
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@ -770,7 +770,7 @@ void vRTE_ProcessUartData(void)
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iECU_UartInitiateTransmit(&g_xUartHandle, u32Id, pu8Data, u8Len);
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iECU_UartInitiateTransmit(&g_xUartHandle, u32Id, pu8Data, u8Len);
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iECU_UartInitiateTransmit(&g_xUartHandle, 0x8, NULL, 0);
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iECU_UartInitiateTransmit(&g_xUartHandle, 0x8, NULL, 0);
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vMCAL_WDG_Refresh();
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vMCAL_WDG_Refresh();
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DL_WWDT_disablePower(WATCHDOG_TIMER);
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vMCAL_WatchdogDisablePower();
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vMCAL_softReset();
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vMCAL_softReset();
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}
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}
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@ -874,7 +874,7 @@ void vRTE_ProcessCanData(void)
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(l_xCanBuff.u8Data[3] == 'I') && (l_xCanBuff.u8Data[4] == 'O') && \
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(l_xCanBuff.u8Data[3] == 'I') && (l_xCanBuff.u8Data[4] == 'O') && \
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(l_xCanBuff.u8Data[5] == 'T'))
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(l_xCanBuff.u8Data[5] == 'T'))
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{
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{
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DL_WWDT_disablePower(WATCHDOG_TIMER);
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vMCAL_WatchdogDisablePower();
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vMCAL_softReset();
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vMCAL_softReset();
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}
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}
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@ -161,7 +161,7 @@ void vMCAL_delayTicks(int32_t i32DelayMs)
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void vMCAL_mcuInit(void)
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void vMCAL_mcuInit(void)
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{
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{
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SYSCFG_DL_initPower();
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SYSCFG_DL_initPower();
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DL_WWDT_enablePower(WATCHDOG_TIMER);
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vMCAL_WatchdogEnablePower();
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xMCAL_WatchdogInit(MCAL_WDT_4_SEC_TIMER); // Timer Inputs can be : 1 , 2 , 3 , 4 , 5 , 6 , 7 , 8 , 16 , 24 , 32 , 40 , 48 , 56 , 64 in seconds
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xMCAL_WatchdogInit(MCAL_WDT_4_SEC_TIMER); // Timer Inputs can be : 1 , 2 , 3 , 4 , 5 , 6 , 7 , 8 , 16 , 24 , 32 , 40 , 48 , 56 , 64 in seconds
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SYSCFG_DL_GPIO_init();
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SYSCFG_DL_GPIO_init();
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@ -218,3 +218,13 @@ void vMCAL_WDG_Refresh(void)
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{
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{
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xMCAL_WatchdogReset();
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xMCAL_WatchdogReset();
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}
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}
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void vMCAL_WatchdogDisablePower(void)
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{
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DL_WWDT_disablePower(WATCHDOG_TIMER);
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}
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void vMCAL_WatchdogEnablePower(void)
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{
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DL_WWDT_enablePower(WATCHDOG_TIMER);
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}
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@ -107,5 +107,7 @@ void vMCAL_softReset(void);
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void vMCAL_delayUs(uint32_t u32Us);
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void vMCAL_delayUs(uint32_t u32Us);
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IVEC_McalStatus_e xMCAL_vrefInit(void);
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IVEC_McalStatus_e xMCAL_vrefInit(void);
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void vMCAL_WDG_Refresh(void);
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void vMCAL_WDG_Refresh(void);
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void vMCAL_WatchdogDisablePower(void);
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void vMCAL_WatchdogEnablePower(void);
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#endif /* UTILS_IVEC_UTILS_H_ */
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#endif /* UTILS_IVEC_UTILS_H_ */
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Reference in New Issue