51cb91df6c
fix: update the CPU clock to 48Mhz
...
- Update the systick period enum
- Add bootloader jump and check
- Increased the destination buffer size during rx drain
- Increased uart buffer size from 8 to 64
2024-11-07 10:32:26 +05:30
ed765079dd
fix: can implementation
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- add ping reply
- can mcal implementation from socmeter
- removed the dot buffer usage in TM1650
- removed unsued variables/code
2024-10-29 19:03:30 +05:30
ab99333dad
feat: add matlab code to display soc
2024-10-29 14:42:05 +05:30
Rakshitavecmocon
03c4f12a70
fix: command some line
2024-10-24 14:32:21 +05:30
Rakshitavecmocon
ce790d74b1
feat:: changed UART pins to PA8 and PA9, switched to UART1 in new branch, removed some comments
2024-10-23 17:34:45 +05:30
Rakshitavecmocon
bfabca4b6d
feat: Add runtime CAN baud rate change based on UART packet mode
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- Implemented functionality to change the CAN baud rate at runtime if the received UART packet has mode set to one.
2024-10-17 16:26:33 +05:30
Rakshitavecmocon
9b2c2312cb
feat: Add runtime UART baud rate change based on received packet mode
...
Implemented functionality to change UART baud rate at runtime if the received packet has mode set to zero.
2024-10-17 13:10:51 +05:30
Rakshitavecmocon
5b88394f22
fix: Update clock configuration and UART/CAN settings
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- Corrected clock configuration according to HFXT
- Set UART baud rate based on HFXT clock
- Configured CAN timing according to DL_MCAN_FCLK_HFCLK
2024-10-10 18:39:44 +05:30
Rakshitavecmocon
85a15dc97f
feat: Implement UART to CAN and CAN to UART communication
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- Implemented RX and TX functionalities for UART to CAN and CAN to UART
- Updated necessary layers to support seamless communication
2024-10-04 18:51:42 +05:30
Rakshitavecmocon
c5e0c06a07
Initial commit
2024-09-26 18:52:04 +05:30
heezes
Rakshitavecmocon