/* * Copyright (c) 2023, Texas Instruments Incorporated - http://www.ti.com * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * * Neither the name of Texas Instruments Incorporated nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * ============ ti_msp_dl_config.h ============= * Configured MSPM0 DriverLib module declarations * * DO NOT EDIT - This file is generated for the MSPM0G350X * by the SysConfig tool. */ #ifndef ti_msp_dl_config_h #define ti_msp_dl_config_h #define CONFIG_MSPM0G350X #define CONFIG_MSPM0G3507 #if defined(__ti_version__) || defined(__TI_COMPILER_VERSION__) #define SYSCONFIG_WEAK __attribute__((weak)) #elif defined(__IAR_SYSTEMS_ICC__) #define SYSCONFIG_WEAK __weak #elif defined(__GNUC__) #define SYSCONFIG_WEAK __attribute__((weak)) #endif #include #include #include #ifdef __cplusplus extern "C" { #endif /* * ======== SYSCFG_DL_init ======== * Perform all required MSP DL initialization * * This function should be called once at a point before any use of * MSP DL. */ /* Defines for relay_1: GPIOB.20 with pinCMx 48 on package pin 19 */ #define GPIO_relay_pin_relay_1_PIN (DL_GPIO_PIN_20) /* Defines for relay_2: GPIOB.19 with pinCMx 45 on package pin 16 */ #define GPIO_relay_pin_relay_2_PIN (DL_GPIO_PIN_19) /* Defines for relay_3: GPIOB.18 with pinCMx 44 on package pin 15 */ #define GPIO_relay_pin_relay_3_PIN (DL_GPIO_PIN_18) /* Defines for relay_4: GPIOB.17 with pinCMx 43 on package pin 14 */ #define GPIO_relay_pin_relay_4_PIN (DL_GPIO_PIN_17) /* Defines for relay_5: GPIOB.16 with pinCMx 33 on package pin 4 */ #define GPIO_relay_pin_relay_5_PIN (DL_GPIO_PIN_16) /* Defines for relay_6: GPIOB.15 with pinCMx 32 on package pin 3 */ #define GPIO_relay_pin_relay_6_PIN (DL_GPIO_PIN_15) /* Defines for relay_7: GPIOB.14 with pinCMx 31 on package pin 2 */ #define GPIO_relay_pin_relay_7_PIN (DL_GPIO_PIN_14) /* Defines for relay_8: GPIOB.9 with pinCMx 26 on package pin 61 */ #define GPIO_relay_pin_relay_8_PIN (DL_GPIO_PIN_9) /* Defines for relay_9: GPIOB.8 with pinCMx 25 on package pin 60 */ #define GPIO_relay_pin_relay_9_PIN (DL_GPIO_PIN_8) /* Defines for fan_1_relay: GPIOB.24 with pinCMx 52 on package pin 23 */ #define GPIO_relay_pin_fan_1_relay_PIN (DL_GPIO_PIN_24) /* Defines for fan_2_relay: GPIOA.24 with pinCMx 54 on package pin 25 */ #define GPIO_relay_pin_fan_2_relay_PIN (DL_GPIO_PIN_24) /* clang-format off */ #define POWER_STARTUP_DELAY (16) #define GPIO_HFXT_PORT GPIOA #define GPIO_HFXIN_PIN DL_GPIO_PIN_5 #define GPIO_HFXIN_IOMUX (IOMUX_PINCM10) #define GPIO_HFXOUT_PIN DL_GPIO_PIN_6 #define GPIO_HFXOUT_IOMUX (IOMUX_PINCM11) #define CPUCLK_FREQ 24000000 /* Defines for CAPTURE_0 */ #define CAPTURE_0_INST (TIMA1) #define CAPTURE_0_INST_IRQHandler TIMA1_IRQHandler #define CAPTURE_0_INST_INT_IRQN (TIMA1_INT_IRQn) #define CAPTURE_0_INST_LOAD_VALUE (0U) /* GPIO defines for channel 0 */ #define GPIO_CAPTURE_0_C0_PORT GPIOA #define GPIO_CAPTURE_0_C0_PIN DL_GPIO_PIN_10 #define GPIO_CAPTURE_0_C0_IOMUX (IOMUX_PINCM21) #define GPIO_CAPTURE_0_C0_IOMUX_FUNC IOMUX_PINCM21_PF_TIMA1_CCP0 /* Defines for TIMER_0 */ #define TIMER_0_INST (TIMG0) #define TIMER_0_INST_IRQHandler TIMG0_IRQHandler #define TIMER_0_INST_INT_IRQN (TIMG0_INT_IRQn) #define TIMER_0_INST_LOAD_VALUE (495U) /* Defines for TIMER_1 */ #define TIMER_1_INST (TIMA0) #define TIMER_1_INST_IRQHandler TIMA0_IRQHandler #define TIMER_1_INST_INT_IRQN (TIMA0_INT_IRQn) #define TIMER_1_INST_LOAD_VALUE (1091U) ///* Defines for UART_0 */ //#define UART_0_INST UART2 //#define UART_0_INST_FREQUENCY 24000000 //#define UART_0_INST_IRQHandler UART2_IRQHandler //#define UART_0_INST_INT_IRQN UART2_INT_IRQn //#define GPIO_UART_0_RX_PORT GPIOB //#define GPIO_UART_0_TX_PORT GPIOB //#define GPIO_UART_0_RX_PIN DL_GPIO_PIN_16 //#define GPIO_UART_0_TX_PIN DL_GPIO_PIN_15 //#define GPIO_UART_0_IOMUX_RX (IOMUX_PINCM33) //#define GPIO_UART_0_IOMUX_TX (IOMUX_PINCM32) //#define GPIO_UART_0_IOMUX_RX_FUNC IOMUX_PINCM33_PF_UART2_RX //#define GPIO_UART_0_IOMUX_TX_FUNC IOMUX_PINCM32_PF_UART2_TX //#define UART_0_BAUD_RATE (115200) //#define UART_0_IBRD_24_MHZ_115200_BAUD (13) //#define UART_0_FBRD_24_MHZ_115200_BAUD (1) /* Port definition for Pin Group GPIO_GRP_0 */ #define GPIO_GRP_0_PORT (GPIOB) /* Defines for PIN_0: GPIOB.17 with pinCMx 43 on package pin 36 */ #define GPIO_GRP_0_PIN_0_PIN (DL_GPIO_PIN_17) #define GPIO_GRP_0_PIN_0_IOMUX (IOMUX_PINCM43) /* Defines for MCAN0 */ #define MCAN0_INST CANFD0 #define GPIO_MCAN0_CAN_TX_PORT GPIOA #define GPIO_MCAN0_CAN_TX_PIN DL_GPIO_PIN_26 #define GPIO_MCAN0_IOMUX_CAN_TX (IOMUX_PINCM59) #define GPIO_MCAN0_IOMUX_CAN_TX_FUNC IOMUX_PINCM59_PF_CANFD0_CANTX #define GPIO_MCAN0_CAN_RX_PORT GPIOA #define GPIO_MCAN0_CAN_RX_PIN DL_GPIO_PIN_27 #define GPIO_MCAN0_IOMUX_CAN_RX (IOMUX_PINCM60) #define GPIO_MCAN0_IOMUX_CAN_RX_FUNC IOMUX_PINCM60_PF_CANFD0_CANRX /* Defines for MCAN0 MCAN RAM configuration */ #define MCAN0_INST_MCAN_STD_ID_FILT_START_ADDR (0) #define MCAN0_INST_MCAN_STD_ID_FILTER_NUM (1) #define MCAN0_INST_MCAN_EXT_ID_FILT_START_ADDR (48) #define MCAN0_INST_MCAN_EXT_ID_FILTER_NUM (1) #define MCAN0_INST_MCAN_TX_BUFF_START_ADDR (148) #define MCAN0_INST_MCAN_TX_BUFF_SIZE (2) #define MCAN0_INST_MCAN_FIFO_1_START_ADDR (192) #define MCAN0_INST_MCAN_FIFO_1_NUM (2) #define MCAN0_INST_MCAN_TX_EVENT_START_ADDR (164) #define MCAN0_INST_MCAN_TX_EVENT_SIZE (2) #define MCAN0_INST_MCAN_EXT_ID_AND_MASK (0x1FFFFFFFU) #define MCAN0_INST_MCAN_RX_BUFF_START_ADDR (208) #define MCAN0_INST_MCAN_FIFO_0_START_ADDR (172) #define MCAN0_INST_MCAN_FIFO_0_NUM (3) /* clang-format on */ void SYSCFG_DL_init(void); void SYSCFG_DL_initPower(void); void SYSCFG_DL_GPIO_init(void); void SYSCFG_DL_SYSCTL_init(void); void SYSCFG_DL_SYSCTL_CLK_init(void); void SYSCFG_DL_CAPTURE_0_init(void); void SYSCFG_DL_TIMER_0_init(void); void SYSCFG_DL_TIMER_1_init(void); void SYSCFG_DL_UART_0_init(void); void SYSCFG_DL_MCAN0_init(void); bool SYSCFG_DL_saveConfiguration(void); bool SYSCFG_DL_restoreConfiguration(void); #ifdef __cplusplus } #endif #endif /* ti_msp_dl_config_h */