267 lines
8.7 KiB
C
267 lines
8.7 KiB
C
/*utils.c
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* @Created on: 22-Jan-2024
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* @Author: Vecmocon Technology
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*/
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#include <utils/utils.h>
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#include "../Generated Codes/ti_msp_config.h"
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volatile uint32_t systic_Count;
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volatile uint32_t systic_init_flag =0;
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static volatile uint32_t g_u32VrefInitFalg = 0;
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static const DL_VREF_Config gVREFConfig = {
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.vrefEnable = DL_VREF_ENABLE_DISABLE,
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.bufConfig = DL_VREF_BUFCONFIG_OUTPUT_2_5V,
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.shModeEnable = DL_VREF_SHMODE_DISABLE,
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.holdCycleCount = DL_VREF_HOLD_MIN,
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.shCycleCount = DL_VREF_SH_MIN,
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};
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static const DL_VREF_ClockConfig gVREFClockConfig = {
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.clockSel = DL_VREF_CLOCK_LFCLK,
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.divideRatio = DL_VREF_CLOCK_DIVIDE_1,
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};
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uint8_t u8SysTick_initFlag=0;
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//static const DL_SYSCTL_SYSPLLConfig gSYSPLLConfig = {
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// .inputFreq = DL_SYSCTL_SYSPLL_INPUT_FREQ_16_32_MHZ,
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// .rDivClk2x = 1,
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// .rDivClk1 = 1,
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// .rDivClk0 = 0,
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// .enableCLK2x = DL_SYSCTL_SYSPLL_CLK2X_DISABLE,
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// .enableCLK1 = DL_SYSCTL_SYSPLL_CLK1_ENABLE,
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// .enableCLK0 = DL_SYSCTL_SYSPLL_CLK0_DISABLE,
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// .sysPLLMCLK = DL_SYSCTL_SYSPLL_MCLK_CLK0,
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// .sysPLLRef = DL_SYSCTL_SYSPLL_REF_SYSOSC,
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// .qDiv = 9,
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// .pDiv = DL_SYSCTL_SYSPLL_PDIV_2
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//};
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//static const DL_SYSCTL_SYSPLLConfig gSYSPLLConfig = {
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// .inputFreq = DL_SYSCTL_SYSPLL_INPUT_FREQ_8_16_MHZ,
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// .rDivClk2x = 1,
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// .rDivClk1 = 0,
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// .rDivClk0 = 0,
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// .enableCLK2x = DL_SYSCTL_SYSPLL_CLK2X_DISABLE,
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// .enableCLK1 = DL_SYSCTL_SYSPLL_CLK1_ENABLE,
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// .enableCLK0 = DL_SYSCTL_SYSPLL_CLK0_DISABLE,
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// .sysPLLMCLK = DL_SYSCTL_SYSPLL_MCLK_CLK0,
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// .sysPLLRef = DL_SYSCTL_SYSPLL_REF_SYSOSC,
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// .qDiv = 9,
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// .pDiv = DL_SYSCTL_SYSPLL_PDIV_4
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//};
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void mcuInit(void)
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{
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SYSCFG_DL_initPower();
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/* Module-Specific Initializations*/
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}
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xCoreStatus_t xMCAL_SYSTICK_INIT(xTicks_t tick)
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{
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// if(u8SysTick_initFlag==1)
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// {
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// return STATUS_ERROR;
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// }
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//
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// if(tick!=Period_1ms)
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// {
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// return STATUS_INIT_FAIL;
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// }
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SysTick_Config(tick);
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NVIC_SetPriority(SysTick_IRQn, 0);
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u8SysTick_initFlag=1;
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return STATUS_SUCCESS;
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}
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static const DL_SYSCTL_SYSPLLConfig gSYSPLLConfig = {
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.inputFreq = DL_SYSCTL_SYSPLL_INPUT_FREQ_16_32_MHZ,
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.rDivClk2x = 1,
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.rDivClk1 = 0,
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.rDivClk0 = 0,
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.enableCLK2x = DL_SYSCTL_SYSPLL_CLK2X_DISABLE,
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.enableCLK1 = DL_SYSCTL_SYSPLL_CLK1_ENABLE,
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.enableCLK0 = DL_SYSCTL_SYSPLL_CLK0_ENABLE,
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.sysPLLMCLK = DL_SYSCTL_SYSPLL_MCLK_CLK0,
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.sysPLLRef = DL_SYSCTL_SYSPLL_REF_HFCLK,
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.qDiv = 3,
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.pDiv = DL_SYSCTL_SYSPLL_PDIV_1
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};
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xCoreStatus_t xMCAL_SYSCTL_INIT(uint8_t u8CLK_SRC,uint8_t u8LP_MODE)
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{
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if((u8LP_MODE!=STANDBY0)&&(u8LP_MODE!=SLEEP0))
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return STATUS_INIT_FAIL;
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if((u8CLK_SRC!=HFXT)&&(u8CLK_SRC!=SYSOSC))
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return STATUS_INIT_FAIL;
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if(u8LP_MODE==STANDBY0)
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{
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//Low Power Mode is configured to be STANDBY0
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DL_SYSCTL_setPowerPolicySTANDBY0();
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DL_SYSCTL_setBORThreshold(DL_SYSCTL_BOR_THRESHOLD_LEVEL_0);
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DL_SYSCTL_setFlashWaitState(DL_SYSCTL_FLASH_WAIT_STATE_2);
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}
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else if(u8LP_MODE==SLEEP0)
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{
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DL_SYSCTL_setBORThreshold(DL_SYSCTL_BOR_THRESHOLD_LEVEL_0);
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DL_SYSCTL_setFlashWaitState(DL_SYSCTL_FLASH_WAIT_STATE_2);
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}
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if(u8CLK_SRC==HFXT)
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{
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//Low Power Mode is configured to be SLEEP0
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// DL_SYSCTL_setBORThreshold(DL_SYSCTL_BOR_THRESHOLD_LEVEL_0);
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// DL_SYSCTL_setSYSOSCFreq(DL_SYSCTL_SYSOSC_FREQ_BASE);
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/* Set default configuration */
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// DL_SYSCTL_disableHFXT();
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// DL_SYSCTL_disableSYSPLL();
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// DL_SYSCTL_setHFCLKSourceHFXTParams(DL_SYSCTL_HFXT_RANGE_16_32_MHZ,30, true);
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// DL_SYSCTL_setULPCLKDivider(DL_SYSCTL_ULPCLK_DIV_1);
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//DL_SYSCTL_setMCLKSource(SYSOSC, HSCLK, DL_SYSCTL_HSCLK_SOURCE_HFCLK);
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//Low Power Mode is configured to be SLEEP0
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DL_SYSCTL_setBORThreshold(DL_SYSCTL_BOR_THRESHOLD_LEVEL_0);
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DL_SYSCTL_setFlashWaitState(DL_SYSCTL_FLASH_WAIT_STATE_2);
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DL_SYSCTL_setSYSOSCFreq(DL_SYSCTL_SYSOSC_FREQ_BASE);
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/* Set default configuration */
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DL_SYSCTL_disableHFXT();
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DL_SYSCTL_disableSYSPLL();
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DL_SYSCTL_setHFCLKSourceHFXTParams(DL_SYSCTL_HFXT_RANGE_16_32_MHZ,10, true);
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DL_SYSCTL_configSYSPLL((DL_SYSCTL_SYSPLLConfig *) &gSYSPLLConfig);
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DL_SYSCTL_setULPCLKDivider(DL_SYSCTL_ULPCLK_DIV_2);
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DL_SYSCTL_setMCLKSource(SYSOSC, HSCLK, DL_SYSCTL_HSCLK_SOURCE_SYSPLL);
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}
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else if(u8CLK_SRC==SYSOSC)
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{
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DL_SYSCTL_setSYSOSCFreq(DL_SYSCTL_SYSOSC_FREQ_BASE);
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DL_SYSCTL_disableHFXT();
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DL_SYSCTL_disableSYSPLL();
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DL_SYSCTL_setHFCLKSourceHFXTParams(DL_SYSCTL_HFXT_RANGE_16_32_MHZ,50, true);
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DL_SYSCTL_configSYSPLL((DL_SYSCTL_SYSPLLConfig *) &gSYSPLLConfig);
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DL_SYSCTL_setHFCLKDividerForMFPCLK(DL_SYSCTL_HFCLK_MFPCLK_DIVIDER_6);
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DL_SYSCTL_enableMFCLK();
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DL_SYSCTL_enableMFPCLK();
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DL_SYSCTL_setMFPCLKSource(DL_SYSCTL_MFPCLK_SOURCE_SYSOSC);
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}
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// if(u8CLK_SRC==HFXT)
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// {
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//
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//
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//
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// DL_SYSCTL_setSYSOSCFreq(DL_SYSCTL_SYSOSC_FREQ_BASE);
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// /* Set default configuration */
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// DL_SYSCTL_disableHFXT();
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// DL_SYSCTL_disableSYSPLL();
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// DL_SYSCTL_setHFCLKSourceHFXTParams(DL_SYSCTL_HFXT_RANGE_16_32_MHZ,10, true);
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// DL_SYSCTL_configSYSPLL((DL_SYSCTL_SYSPLLConfig *) &gSYSPLLConfig);
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// DL_SYSCTL_setULPCLKDivider(DL_SYSCTL_ULPCLK_DIV_1);
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// DL_SYSCTL_setHFCLKDividerForMFPCLK(DL_SYSCTL_HFCLK_MFPCLK_DIVIDER_6);
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// DL_SYSCTL_enableMFCLK();
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// DL_SYSCTL_enableMFPCLK();
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// DL_SYSCTL_setMFPCLKSource(DL_SYSCTL_MFPCLK_SOURCE_HFCLK);
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// DL_SYSCTL_setMCLKSource(SYSOSC, HSCLK, DL_SYSCTL_HSCLK_SOURCE_HFCLK);
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//// DL_SYSCTL_setHFCLKSourceHFXTParams(DL_SYSCTL_HFXT_RANGE_16_32_MHZ,0, false);
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//// DL_SYSCTL_setULPCLKDivider(DL_SYSCTL_ULPCLK_DIV_1);
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//// DL_SYSCTL_setMCLKSource(SYSOSC, HSCLK, DL_SYSCTL_HSCLK_SOURCE_HFCLK);
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//
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//
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// //DL_SYSCTL_setHFCLKSourceHFXTParams(DL_SYSCTL_HFXT_RANGE_32_48_MHZ,0, false);
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//// DL_SYSCTL_setHFCLKSourceHFXTParams(DL_SYSCTL_HFXT_RANGE_16_32_MHZ,0, false);
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//// DL_SYSCTL_setULPCLKDivider(DL_SYSCTL_ULPCLK_DIV_1);
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//// DL_SYSCTL_setMCLKSource(SYSOSC, HSCLK, DL_SYSCTL_HSCLK_SOURCE_HFCLK);
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// }
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//
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// else if(u8CLK_SRC==SYSOSC)
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// {
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//// DL_SYSCTL_setSYSOSCFreq(DL_SYSCTL_SYSOSC_FREQ_BASE);
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//// /* Set default configuration */
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//// DL_SYSCTL_disableHFXT();
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//// DL_SYSCTL_disableSYSPLL();
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//// DL_SYSCTL_configSYSPLL((DL_SYSCTL_SYSPLLConfig *) &gSYSPLLConfig);
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// DL_SYSCTL_setSYSOSCFreq(DL_SYSCTL_SYSOSC_FREQ_BASE);
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// DL_SYSCTL_disableHFXT();
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// DL_SYSCTL_disableSYSPLL();
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// DL_SYSCTL_configSYSPLL((DL_SYSCTL_SYSPLLConfig *) &gSYSPLLConfig);
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// DL_SYSCTL_setHFCLKDividerForMFPCLK(DL_SYSCTL_HFCLK_MFPCLK_DIVIDER_6);
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// DL_SYSCTL_enableMFCLK();
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// DL_SYSCTL_enableMFPCLK();
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// DL_SYSCTL_setMFPCLKSource(DL_SYSCTL_MFPCLK_SOURCE_SYSOSC);
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// }
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return STATUS_SUCCESS;
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}
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void SysTick_Handler(void)
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{
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i32TickCnt++;
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}
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int i32MCAL_getTicks()
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{
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return i32TickCnt;
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}
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void vMCAL_DelayTicks(int i32Delay_ms)
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{
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int curr_tick;
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curr_tick=i32MCAL_getTicks();
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while((i32MCAL_getTicks()-curr_tick)<i32Delay_ms);
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return;
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}
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void xMCAL_McuInit()
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{
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SYSCFG_DL_initPower();
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// DL_UART_Main_reset(UART1);
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// DL_UART_Main_enablePower(UART1);
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SYSCFG_DL_GPIO_init();
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}
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void delay(uint32_t us)
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{
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delay_cycles((32*us));
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}
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IVEC_McalStatus_e xMCAL_VrefInit(void)
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{
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if(g_u32VrefInitFalg == 0)
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{
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DL_VREF_setClockConfig(VREF, (DL_VREF_ClockConfig *) &gVREFClockConfig);
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DL_VREF_configReference(VREF,(DL_VREF_Config *) &gVREFConfig);
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delay_cycles(320);
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g_u32VrefInitFalg =1;
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return IVEC_MCAL_STATUS_SUCCESS;
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}
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else
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return IVEC_MCAL_STATUS_INIT_FAIL;
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}
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void xMCAL_SoftReset(void)
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{
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DL_SYSCTL_resetDevice(DL_SYSCTL_RESET_CPU);
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}
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