718 lines
30 KiB
C
718 lines
30 KiB
C
/**
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******************************************************************************
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* @file ivec_mcal_mcan.c
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* @brief This file provides APIs for MCAN peripheral.
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* @date 15-feb-2024
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* @Author Vecmocon Technology
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******************************************************************************
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*/
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#include <../Core/Include/ivec_mcal_mcan.h>
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#include "string.h"
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volatile bool b_MCAN_InitFlag = 0; /*!< CAN initialization flag */
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volatile uint8_t u8_MCAN_StatusFlag = IVEC_MCAL_STATUS_ERROR;
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volatile bool b_ServiceInt=true;
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volatile uint32_t u32InterruptLine1Status;
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volatile char u8ErrorInterruptStatus[50];
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volatile DL_MCAN_RxFIFOStatus rxFS;
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volatile DL_MCAN_RxBufElement TempRxMsg;
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volatile uint8_t TempRxBuffer[8];
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volatile uint32_t TempRxID;
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volatile uint32_t id;
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DL_MCAN_ProtocolStatus HeaderStat;
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volatile uint32_t l_canTransmitTimeout;
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volatile uint8_t u8CallBack_buff[8]={0};
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volatile IVEC_McalStatus_e l_statusFlag = IVEC_MCAL_STATUS_SUCCESS;
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extern volatile uint8_t u8CANDataAct;
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#define MCAN_FILTER_SIZE 0u
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/*REQUIRED MCAN CONFIGS*/
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__attribute__((weak)) void mcu_FDCAN_RxFifo_Callback(uint32_t Identifier, uint8_t *data, uint16_t DataLength)
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{
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}
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/*=======================================================================================PRIVATE_MEMBERS======================================================================================*/
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static const DL_MCAN_ClockConfig gMCAN0ClockConf = {
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.clockSel = DL_MCAN_FCLK_HFCLK,////DL_MCAN_FCLK_SYSPLLCLK1,DL_MCAN_FCLK_HFCLK,
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.divider = DL_MCAN_FCLK_DIV_1,
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};
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static DL_MCAN_InitParams gMCAN0InitParams= {
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/* Initialize MCAN Init parameters. */
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.fdMode = false,
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.brsEnable = false,
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.txpEnable = false,
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.efbi = false,
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.pxhddisable = false,
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.darEnable = false,
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.wkupReqEnable = false,
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.autoWkupEnable = false,
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.emulationEnable = true,
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.tdcEnable = true,
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.wdcPreload = 255,
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/* Transmitter Delay Compensation parameters. */
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.tdcConfig.tdcf = 10,
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.tdcConfig.tdco = 6,
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};
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static DL_MCAN_ConfigParams gMCAN0ConfigParams={
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/* Initialize MCAN Config parameters. */
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.monEnable = false,
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.asmEnable = false,
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.tsPrescalar = 15,
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.tsSelect = 0,
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.timeoutSelect = DL_MCAN_TIMEOUT_SELECT_CONT,
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.timeoutPreload = 65535,
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.timeoutCntEnable = false,
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.filterConfig.rrfs = false,
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.filterConfig.rrfe = false,
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.filterConfig.anfe = 0,
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.filterConfig.anfs = 0,
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// .filterConfig.anfe = 3,
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// .filterConfig.anfs = 3,
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};
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//static DL_MCAN_MsgRAMConfigParams gMCAN0MsgRAMConfigParams ={
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//
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// /* Standard ID Filter List Start Address. */
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// .flssa = 0 ,
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// /* List Size: Standard ID. */
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// .lss = 0 ,
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// /* Extended ID Filter List Start Address. */
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// .flesa = 0 ,
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// /* List Size: Extended ID. */
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// .lse = 0 ,
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// /* Tx Buffers Start Address. */
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// .txStartAddr = 10 ,
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// /* Number of Dedicated Transmit Buffers. */
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// .txBufNum = 10 ,
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// .txFIFOSize = 10,
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// /* Tx Buffer Element Size. */
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// .txBufMode = 0,
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// .txBufElemSize = DL_MCAN_ELEM_SIZE_8BYTES,
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// /* Tx Event FIFO Start Address. */
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// .txEventFIFOStartAddr = 640 ,
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// /* Event FIFO Size. */
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// .txEventFIFOSize = 10 ,
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// /* Level for Tx Event FIFO watermark interrupt. */
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// .txEventFIFOWaterMark = 0,
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// /* Rx FIFO0 Start Address. */
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// .rxFIFO0startAddr = 170 ,
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// /* Number of Rx FIFO elements. */
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// .rxFIFO0size = 10 ,
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// /* Rx FIFO0 Watermark. */
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// .rxFIFO0waterMark = 0,
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// .rxFIFO0OpMode = 0,
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// /* Rx FIFO1 Start Address. */
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// .rxFIFO1startAddr = 190 ,
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// /* Number of Rx FIFO elements. */
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// .rxFIFO1size = 10 ,
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// /* Level for Rx FIFO 1 watermark interrupt. */
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// .rxFIFO1waterMark = 10,
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// /* FIFO blocking mode. */
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// .rxFIFO1OpMode = 0,
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// /* Rx Buffer Start Address. */
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// .rxBufStartAddr = 208 ,
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// /* Rx Buffer Element Size. */
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// .rxBufElemSize = DL_MCAN_ELEM_SIZE_8BYTES,
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// /* Rx FIFO0 Element Size. */
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// .rxFIFO0ElemSize = DL_MCAN_ELEM_SIZE_8BYTES,
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// /* Rx FIFO1 Element Size. */
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// .rxFIFO1ElemSize = DL_MCAN_ELEM_SIZE_8BYTES,
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//};
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static DL_MCAN_MsgRAMConfigParams gMCAN0MsgRAMConfigParams ={
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/* Standard ID Filter List Start Address. */
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.flssa = 1,
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/* List Size: Standard ID. */
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.lss = MCAN_FILTER_SIZE,
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/* Extended ID Filter List Start Address. */
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.flesa = 48 ,
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/* List Size: Extended ID. */
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.lse = 0,
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/* Tx Buffers Start Address. */
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.txStartAddr = 10 ,
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/* Number of Dedicated Transmit Buffers. */
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.txBufNum = 10 ,
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.txFIFOSize = 10,
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/* Tx Buffer Element Size. */
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.txBufMode = 0,
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.txBufElemSize = DL_MCAN_ELEM_SIZE_8BYTES,
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/* Tx Event FIFO Start Address. */
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.txEventFIFOStartAddr = 640 ,
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/* Event FIFO Size. */
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.txEventFIFOSize = 10 ,
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/* Level for Tx Event FIFO watermark interrupt. */
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.txEventFIFOWaterMark = 0,
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/* Rx FIFO0 Start Address. */
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.rxFIFO0startAddr = 170 ,
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/* Number of Rx FIFO elements. */
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.rxFIFO0size = 10 ,
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/* Rx FIFO0 Watermark. */
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.rxFIFO0waterMark = 0,
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.rxFIFO0OpMode = 0,
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/* Rx FIFO1 Start Address. */
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.rxFIFO1startAddr = 190 ,
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/* Number of Rx FIFO elements. */
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.rxFIFO1size = 10 ,
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/* Level for Rx FIFO 1 watermark interrupt. */
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.rxFIFO1waterMark = 10,
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/* FIFO blocking mode. */
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.rxFIFO1OpMode = 0,
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/* Rx Buffer Start Address. */
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.rxBufStartAddr = 208 ,
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/* Rx Buffer Element Size. */
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.rxBufElemSize = DL_MCAN_ELEM_SIZE_8BYTES,
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/* Rx FIFO0 Element Size. */
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.rxFIFO0ElemSize = DL_MCAN_ELEM_SIZE_8BYTES,
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/* Rx FIFO1 Element Size. */
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.rxFIFO1ElemSize = DL_MCAN_ELEM_SIZE_8BYTES,
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};
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static DL_MCAN_BitTimingParams gMCAN0BitTimes_500 = {
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/* Arbitration Baud Rate Pre-scaler. */
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.nomRatePrescalar = 0,
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/* Arbitration Time segment before sample point. */
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.nomTimeSeg1 = 41,
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/* Arbitration Time segment after sample point. */
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.nomTimeSeg2 = 4,
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/* Arbitration (Re)Synchronization Jump Width Range. */
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.nomSynchJumpWidth = 4,
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/* Data Baud Rate Pre-scaler. */
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.dataRatePrescalar = 0,
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/* Data Time segment before sample point. */
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.dataTimeSeg1 = 0,
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/* Data Time segment after sample point. */
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.dataTimeSeg2 = 0,
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/* Data (Re)Synchronization Jump Width. */
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.dataSynchJumpWidth = 0,
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};
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static DL_MCAN_BitTimingParams gMCAN0BitTimes_250 = {
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/* Arbitration Baud Rate Pre-scaler. */
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.nomRatePrescalar = 0,
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/* Arbitration Time segment before sample point. */
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.nomTimeSeg1 = 138,
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/* Arbitration Time segment after sample point. */
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.nomTimeSeg2 = 19,
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/* Arbitration (Re)Synchronization Jump Width Range. */
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.nomSynchJumpWidth = 19,
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/* Data Baud Rate Pre-scaler. */
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.dataRatePrescalar = 0,
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/* Data Time segment before sample point. */
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.dataTimeSeg1 = 0,
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/* Data Time segment after sample point. */
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.dataTimeSeg2 = 0,
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/* Data (Re)Synchronization Jump Width. */
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.dataSynchJumpWidth = 0,
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};
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static const DL_MCAN_StdMsgIDFilterElement gMCAN0StdFiltelem1 = {
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.sfec = 001,
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.sft = 0x00,
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.sfid1 = 0x1,
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.sfid2 = 0x539,
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};
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//static const DL_MCAN_StdMsgIDFilterElement gMCAN0StdFiltelem1 = {
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// .sfec = 001,
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// .sft = 10,
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// .sfid1 = 0xc8,
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// .sfid2 = 0x7fe,
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//}; // apply mask pass only 200 and 201 id
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static const DL_MCAN_StdMsgIDFilterElement gMCAN0StdFiltelem2 = {
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.sfec = 0x1,
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.sft = 0x00,
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.sfid1 = 0x541,
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.sfid2 = 0x2046,
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};
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static const DL_MCAN_StdMsgIDFilterElement gMCAN0StdFiltelem3 = {
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.sfec = 0x1,
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.sft = 0x00,
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.sfid1 = 0x1A4,
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.sfid2 = 0x1A4,
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};
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static const DL_MCAN_StdMsgIDFilterElement gMCAN0StdFiltelem4 = {
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.sfec = 0x1,
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.sft = 0x00,
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.sfid1 = 0x521,
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.sfid2 = 0x521,
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};
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static const DL_MCAN_StdMsgIDFilterElement gMCAN0StdFiltelem5 = {
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.sfec = 0x1,
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.sft = 0x00,
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.sfid1 = 0x16,
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.sfid2 = 0x16,
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};
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static const DL_MCAN_ExtMsgIDFilterElement gMCAN0ExtFiltelem1 = {
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.efec = 0x1,
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.eft = 0x0,
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.efid1 = 2047,
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.efid2 = 0x1FFFFFFF,
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};
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static const DL_MCAN_ExtMsgIDFilterElement gMCAN0ExtFiltelem2 = {
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.efec = 0x1,
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.eft = 0x0,
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.efid1 = 4000,
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.efid2 = 4500,
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};
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static const DL_MCAN_ExtMsgIDFilterElement gMCAN0ExtFiltelem3 = {
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.efec = 0x1,
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.eft = 0x0,
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.efid1 = 0x1CEBFF23,
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.efid2 = 0x1CEBFF23,
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};
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volatile DL_MCAN_TxBufElement txMsg = {
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.id = ((uint32_t)(0x00)) << 18U,
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.rtr = 0U,
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.xtd = 0U,
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.esi = 0U,
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.dlc = 8U,
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.brs = 1U,
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.fdf = 1U,
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.efc = 1U,
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.mm = 0xAAU,
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.data = 0U,
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};
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/*____________________________________________________________________________________________________________________________________________________________________________________________*/
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/*=============================================================================================================================================================================================
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PRIVATE_DECLARATIONS
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==============================================================================================================================================================================================*/
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/**
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* @brief Static Function to store RX data in a static buffer
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* @retval void
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*/
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static void _prv_vGetRxMsg(DL_MCAN_RxBufElement *rxMsg,uint32_t *ID,uint8_t *RxData,int DLC)
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{
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for (int i =0 ; i < DLC ; i++)
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{
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RxData[i] = (rxMsg->data[i] & 0xFF);
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}
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}
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/**
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* @brief Default Interrupt Handler for MCAN
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*
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*/
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void CANFD0_IRQHandler(void)
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{
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uint32_t IntrStatus = DL_MCAN_getIntrStatus(CANFD0);
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DL_MCAN_getProtocolStatus(CANFD0, &HeaderStat);
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if (IntrStatus & DL_MCAN_INTERRUPT_TC){
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__asm("nop");
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DL_MCAN_clearIntrStatus(CANFD0, IntrStatus,DL_MCAN_INTR_SRC_MCAN_LINE_1);
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b_ServiceInt = true;
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u8_MCAN_StatusFlag = IVEC_MCAL_STATUS_SUCCESS;
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__asm("nop");
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}
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else if(IntrStatus & DL_MCAN_INTERRUPT_RF0N){
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while (false == b_ServiceInt);
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b_ServiceInt = false;
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rxFS.fillLvl = 0;
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rxFS.num = DL_MCAN_RX_FIFO_NUM_0;
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while ((rxFS.fillLvl) == 0)
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{
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DL_MCAN_getRxFIFOStatus(CANFD0, &rxFS);
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}
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DL_MCAN_readMsgRam(CANFD0, DL_MCAN_MEM_TYPE_FIFO, 0, rxFS.num, &TempRxMsg);
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DL_MCAN_writeRxFIFOAck(CANFD0, rxFS.num, rxFS.getIdx);
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xCanIdType_t idType = ERROR;
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// if (TempRxMsg.id >= 0 && TempRxMsg.id <= 0x7FF)
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// {
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// idType = STD_ID;
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// } else if (TempRxMsg.id <= 0x1FFFFFFF)
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// {
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// idType = EXT_ID;
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// }
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//
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// for(int i=0;i<8;i++)
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// {
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// u8CallBack_buff[i]=(TempRxMsg.data[i] & 0xFF);
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// }
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uint64_t idx = 0;
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idx = TempRxMsg.id;
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uint32_t value = ((TempRxMsg.id & (uint32_t) 0x1FFC0000) >> (uint32_t) 18);
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if ((value > 0) && (value <= 0x7FF))
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if(TempRxMsg.xtd == 0)
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{
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idType = STD_ID;
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idx = value;
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idx = ((TempRxMsg.id & (uint32_t) 0x1FFC0000) >> (uint32_t) 18);
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}
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__asm("nop");
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TempRxID = idx;
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_prv_vGetRxMsg(&TempRxMsg,&TempRxID ,TempRxBuffer,TempRxMsg.dlc);
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DL_MCAN_clearIntrStatus(CANFD0, IntrStatus,DL_MCAN_INTR_SRC_MCAN_LINE_1);
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b_ServiceInt = true;
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if(HeaderStat.busOffStatus==1)
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{
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DL_MCAN_setOpMode(CANFD0, DL_MCAN_OPERATION_MODE_NORMAL);
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}
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uint32_t u32RxCANID = 0;
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uint8_t u8RxData[8] = {0};
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xMCAL_MCANRx(CANFD0,&u32RxCANID,u8RxData,8);
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// vSOC_MeterCallback(u32RxCANID, &u8RxData[0]);
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mcu_FDCAN_RxFifo_Callback(u32RxCANID, &u8RxData[0], TempRxMsg.dlc);
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}
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else if(IntrStatus & MCAN_IR_PEA_MASK)
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{
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__asm("nop");
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DL_MCAN_clearIntrStatus(CANFD0, IntrStatus,DL_MCAN_INTR_SRC_MCAN_LINE_1);
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}
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else if(IntrStatus & MCAN_IR_BO_MASK)
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{
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DL_MCAN_clearIntrStatus(CANFD0, IntrStatus,DL_MCAN_INTR_SRC_MCAN_LINE_1);
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}
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else{
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DL_MCAN_clearIntrStatus(CANFD0, IntrStatus,DL_MCAN_INTR_SRC_MCAN_LINE_1);
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}
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}
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/*=============================================================================================================================================================================================
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API
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==============================================================================================================================================================================================*/
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/**
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* @brief Function to initialize MCAN Peripheral
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* @note Interrupts are enabled in this function itself
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* @param MCAN Pointer to the register overlay for the peripheral
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* @param BAUD Param to set Baud rate of MCAN
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* @retval IVEC_McalStatus_e
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*/
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IVEC_McalStatus_e xMCAL_MCANInit(MCAN_Regs* MCAN, xCAN_baud_t BAUD)
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{
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assert(MCAN == CANFD0);
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assert(BAUD == BAUD_500 || BAUD == BAUD_250);
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assert(b_MCAN_InitFlag == 0);
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DL_MCAN_RevisionId revid_MCAN0;
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DL_MCAN_enableModuleClock(MCAN);
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DL_MCAN_setClockConfig(MCAN, (DL_MCAN_ClockConfig *) &gMCAN0ClockConf);
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/* Get MCANSS Revision ID. */
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DL_MCAN_getRevisionId(MCAN, &revid_MCAN0);
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/* Wait for Memory initialization to be completed. */
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while(false == DL_MCAN_isMemInitDone(MCAN));
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/* Put MCAN in SW initialization mode. */
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DL_MCAN_setOpMode(MCAN, DL_MCAN_OPERATION_MODE_SW_INIT);
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/* Wait till MCAN is not initialized. */
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while (DL_MCAN_OPERATION_MODE_SW_INIT != DL_MCAN_getOpMode(MCAN));
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/* Initialize MCAN module. */
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DL_MCAN_init(MCAN, (DL_MCAN_InitParams *) &gMCAN0InitParams);
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/* Configure MCAN module. */
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DL_MCAN_config(MCAN, (DL_MCAN_ConfigParams*) &gMCAN0ConfigParams);
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/* Configure Bit timings. */
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if(BAUD==BAUD_500)
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{
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DL_MCAN_setBitTime(MCAN, (DL_MCAN_BitTimingParams*) &gMCAN0BitTimes_500);
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}
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else if(BAUD==BAUD_250)
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{
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DL_MCAN_setBitTime(MCAN, (DL_MCAN_BitTimingParams*) &gMCAN0BitTimes_250);
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}
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/* Configure Message RAM Sections */
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DL_MCAN_msgRAMConfig(MCAN, (DL_MCAN_MsgRAMConfigParams*) &gMCAN0MsgRAMConfigParams);
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/* Configure Standard ID filter element */
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// DL_MCAN_addStdMsgIDFilter(MCAN, 0U, (DL_MCAN_StdMsgIDFilterElement *) &gMCAN0StdFiltelem1);
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//
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///DL_MCAN_addStdMsgIDFilter(MCAN, 1U, (DL_MCAN_StdMsgIDFilterElement *) &gMCAN0StdFiltelem2);
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//
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// DL_MCAN_addStdMsgIDFilter(MCAN, 2U, (DL_MCAN_StdMsgIDFilterElement *) &gMCAN0StdFiltelem3);
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//
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// DL_MCAN_addStdMsgIDFilter(MCAN, 3U, (DL_MCAN_StdMsgIDFilterElement *) &gMCAN0StdFiltelem4);
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//
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// DL_MCAN_addStdMsgIDFilter(MCAN, 4U, (DL_MCAN_StdMsgIDFilterElement *) &gMCAN0StdFiltelem5);
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//
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// DL_MCAN_addExtMsgIDFilter(MCAN, 0U,(DL_MCAN_ExtMsgIDFilterElement *)&gMCAN0ExtFiltelem1);
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//
|
|
// DL_MCAN_addExtMsgIDFilter(MCAN, 1U,(DL_MCAN_ExtMsgIDFilterElement *)&gMCAN0ExtFiltelem2);
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//
|
|
// DL_MCAN_addExtMsgIDFilter(MCAN, 2U,(DL_MCAN_ExtMsgIDFilterElement *)&gMCAN0ExtFiltelem3);
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|
|
|
|
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/* Set Extended ID Mask. */
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DL_MCAN_setExtIDAndMask(MCAN, (0x1FFFFFFFU));
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|
|
|
/* Take MCAN out of the SW initialization mode */
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DL_MCAN_setOpMode(MCAN, DL_MCAN_OPERATION_MODE_NORMAL);
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|
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while (DL_MCAN_OPERATION_MODE_NORMAL != DL_MCAN_getOpMode(MCAN));
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|
|
|
/* Enable MCAN mopdule Interrupts */
|
|
DL_MCAN_enableIntr(MCAN, (DL_MCAN_INTERRUPT_BEU | \
|
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DL_MCAN_INTERRUPT_BO | \
|
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DL_MCAN_INTERRUPT_ELO | \
|
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DL_MCAN_INTERRUPT_EP | \
|
|
DL_MCAN_INTERRUPT_EW | \
|
|
DL_MCAN_INTERRUPT_PEA | \
|
|
DL_MCAN_INTERRUPT_PED | \
|
|
DL_MCAN_INTERRUPT_RF0N | \
|
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DL_MCAN_INTERRUPT_TC | \
|
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DL_MCAN_INTERRUPT_TOO), 1U);
|
|
|
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DL_MCAN_selectIntrLine(MCAN, (DL_MCAN_INTERRUPT_BEU | \
|
|
DL_MCAN_INTERRUPT_BO | \
|
|
DL_MCAN_INTERRUPT_ELO | \
|
|
DL_MCAN_INTERRUPT_EP | \
|
|
DL_MCAN_INTERRUPT_EW | \
|
|
DL_MCAN_INTERRUPT_PEA | \
|
|
DL_MCAN_INTERRUPT_PED | \
|
|
DL_MCAN_INTERRUPT_RF0N | \
|
|
DL_MCAN_INTERRUPT_TC | \
|
|
DL_MCAN_INTERRUPT_TOO), DL_MCAN_INTR_LINE_NUM_1);
|
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DL_MCAN_enableIntrLine(MCAN, DL_MCAN_INTR_LINE_NUM_1, 1U);
|
|
|
|
/* Enable MSPM0 MCAN interrupt */
|
|
DL_MCAN_clearInterruptStatus(MCAN,(DL_MCAN_MSP_INTERRUPT_LINE1));
|
|
DL_MCAN_enableInterrupt(MCAN,(DL_MCAN_MSP_INTERRUPT_LINE1));
|
|
NVIC_SetPriority(CANFD0_INT_IRQn, 1);
|
|
NVIC_EnableIRQ(CANFD0_INT_IRQn);
|
|
b_MCAN_InitFlag = 1;
|
|
|
|
return IVEC_MCAL_STATUS_SUCCESS;
|
|
|
|
}
|
|
|
|
|
|
/**
|
|
* @brief Function to De-Initialize MCAN peripheral
|
|
* @param MCAN Pointer to the register overlay for the peripheral
|
|
* @retval IVEC MCAL status
|
|
*/
|
|
//IVEC_McalStatus_e xMCAL_MCANDeInit(MCAN_Regs* MCAN)
|
|
//{
|
|
// assert(MCAN == CANFD0);
|
|
// assert(b_MCAN_InitFlag != 0);
|
|
//
|
|
// NVIC_DisableIRQ(CANFD0_INT_IRQn);
|
|
// DL_MCAN_disablePower(MCAN);
|
|
// b_MCAN_InitFlag = 0;
|
|
//
|
|
// return IVEC_MCAL_STATUS_SUCCESS;
|
|
//
|
|
//}
|
|
IVEC_McalStatus_e xMCAL_MCANDeInit(MCAN_Regs* MCAN)
|
|
{
|
|
assert(MCAN == CANFD0);
|
|
assert(b_MCAN_InitFlag != 0); // Ensure the module was initialized before deinitializing.
|
|
|
|
/* Disable MSPM0 MCAN interrupt */
|
|
NVIC_DisableIRQ(CANFD0_INT_IRQn);
|
|
DL_MCAN_disableInterrupt(MCAN, DL_MCAN_MSP_INTERRUPT_LINE1);
|
|
|
|
DL_MCAN_setOpMode(MCAN, DL_MCAN_OPERATION_MODE_SW_INIT);
|
|
|
|
/* Wait till MCAN is in SW initialization mode */
|
|
while (DL_MCAN_OPERATION_MODE_SW_INIT != DL_MCAN_getOpMode(MCAN));
|
|
|
|
/* Disable the MCAN clock */
|
|
DL_MCAN_disableModuleClock(MCAN);
|
|
|
|
/* Clear initialization flag */
|
|
b_MCAN_InitFlag = 0;
|
|
|
|
return IVEC_MCAL_STATUS_SUCCESS;
|
|
}
|
|
|
|
/**
|
|
* @brief Function to Transmit CAN message
|
|
* @param MCAN Pointer to the register overlay for the peripheral
|
|
* @param ID Message ID for TxMsg Object.
|
|
* @param TxData Array of Data to be transmitted
|
|
* @param BufNum Tx Buffer Number
|
|
* @param Bytes Number of bytes to be transmitted
|
|
* @retval IVEC_McalStatus_e
|
|
*/
|
|
IVEC_McalStatus_e xMCAL_MCANTx(MCAN_Regs *MCAN, uint32_t u32ID ,uint16_t *TxData, uint32_t BufNum, uint32_t Bytes)
|
|
{
|
|
// xMCAL_MCANTx(CANFD0,0x14FFFC23, timerTxData , 0, 8);
|
|
|
|
assert(MCAN == CANFD0);
|
|
assert(b_MCAN_InitFlag != 0);
|
|
assert(Bytes<=8);
|
|
|
|
if (u32ID>0x7FF){
|
|
txMsg.xtd = 1;
|
|
txMsg.id = u32ID;
|
|
}
|
|
else{
|
|
txMsg.xtd = 0;
|
|
txMsg.id = ((uint32_t)(u32ID)) << 18U;
|
|
}
|
|
|
|
for(int i=0;i<Bytes;i++)
|
|
{
|
|
txMsg.data[i]=TxData[i];
|
|
}
|
|
|
|
// memcpy(txMsg.data,TxData,Bytes);
|
|
__asm("nop");
|
|
|
|
DL_MCAN_writeMsgRam(MCAN, DL_MCAN_MEM_TYPE_BUF, BufNum , &txMsg);
|
|
|
|
DL_MCAN_TXBufTransIntrEnable(MCAN, BufNum, 1U);
|
|
|
|
DL_MCAN_TXBufAddReq(MCAN, BufNum);
|
|
|
|
l_canTransmitTimeout = i32MCAL_getTicks();
|
|
u8_MCAN_StatusFlag = IVEC_MCAL_STATUS_BUSY;
|
|
|
|
while(1){
|
|
|
|
if (u8_MCAN_StatusFlag == IVEC_MCAL_STATUS_SUCCESS || u8_MCAN_StatusFlag == IVEC_MCAL_STATUS_ERROR){
|
|
__asm("nop");
|
|
return u8_MCAN_StatusFlag;
|
|
}
|
|
else if((i32MCAL_getTicks() - l_canTransmitTimeout) > 2){
|
|
__asm("nop");
|
|
return IVEC_MCAL_STATUS_TIMEOUT;
|
|
}
|
|
}
|
|
if(HeaderStat.busOffStatus==1)
|
|
{
|
|
DL_MCAN_setOpMode(CANFD0, DL_MCAN_OPERATION_MODE_NORMAL);
|
|
}
|
|
|
|
|
|
b_ServiceInt = true;
|
|
return IVEC_MCAL_STATUS_SUCCESS;
|
|
}
|
|
|
|
/**
|
|
* @brief Function to Receive CAN message
|
|
* @param MCAN Pointer to the register overlay for the peripheral
|
|
* @param RxMsg Message Object.
|
|
* @param FifoNum Fifo Number to be used
|
|
* @param RxData Array where received data is to be stored
|
|
* @param DLC length of received data
|
|
* @retval IVEC_McalStatus_e
|
|
*/
|
|
IVEC_McalStatus_e xMCAL_MCANRx(MCAN_Regs *MCAN,uint32_t *ID ,uint8_t *RxData, int DLC)
|
|
{
|
|
assert(MCAN == CANFD0);
|
|
assert(b_MCAN_InitFlag != 0);
|
|
|
|
if(HeaderStat.busOffStatus==1)
|
|
{
|
|
DL_MCAN_setOpMode(CANFD0, DL_MCAN_OPERATION_MODE_NORMAL);
|
|
}
|
|
|
|
if((((TempRxID&0xFFF)>>1)==0x16))
|
|
{
|
|
xMCAL_SoftReset();
|
|
}
|
|
if((((TempRxID&0xFFF)>>1)==0x1AE)||(((TempRxID&0xFFF)>>1)==0x520)||(((TempRxID&0xFFF)>>1)==0xBB)||(((TempRxID&0xFFF)>>1)==0x1A4)||(((TempRxID&0xFFF)>>1)==0x521))//TODO: CHANGE ID CHECKS AFTER UPDATED CAN MATRIX
|
|
{
|
|
*ID=((TempRxID&0xFFF)>>1);
|
|
}
|
|
else
|
|
{
|
|
*ID=TempRxID;
|
|
}
|
|
|
|
for(int i=0;i<DLC;i++)
|
|
{
|
|
RxData[i]=TempRxMsg.data[i];
|
|
}
|
|
|
|
return IVEC_MCAL_STATUS_SUCCESS;
|
|
}
|
|
|
|
/**
|
|
* @brief Function to check current Error Status of MCAN peripheral
|
|
* @param ErrorStatus Pointer to array where current status will be stored
|
|
* @retval IVEC_McalStatus_e
|
|
*/
|
|
IVEC_McalStatus_e xMCAL_getMCAN_ErrorStatus(char *ErrorStatus)
|
|
{
|
|
assert(b_MCAN_InitFlag != 0);
|
|
|
|
strcpy(ErrorStatus,u8ErrorInterruptStatus);
|
|
|
|
return IVEC_MCAL_STATUS_SUCCESS;
|
|
}
|
|
|
|
/**
|
|
* @brief Function to check Interrupt Line1 Status of MCAN peripheral
|
|
* @param Interrupt_Status Pointer to variable where current status will be stored
|
|
* @retval IVEC_McalStatus_e
|
|
*/
|
|
IVEC_McalStatus_e xMCAL_getMCAN_InterruptLine1Status(uint32_t *Interrupt_Status)
|
|
{
|
|
// assert(b_MCAN_InitFlag != 0);
|
|
|
|
*Interrupt_Status=u32InterruptLine1Status;
|
|
|
|
return IVEC_MCAL_STATUS_SUCCESS;
|
|
}
|
|
|
|
IVEC_McalStatus_e xMCAL_resetMCAN(MCAN_Regs* const mcan, xCAN_baud_t BAUD)
|
|
{
|
|
assert(b_MCAN_InitFlag != 0);
|
|
assert(mcan == CANFD0);
|
|
|
|
//DL_MCAN_reset(CANFD0);
|
|
xMCAL_MCANDeInit(mcan);
|
|
xMCAL_MCANInit(mcan,BAUD);
|
|
|
|
return IVEC_MCAL_STATUS_SUCCESS;
|
|
|
|
}
|
|
|
|
|
|
/*____________________________________________________________________________________________________________________________________________________________________________________________*/
|