Add all-type Description Format reference (RES/CAP/diode/transistor/... per Altium SOP); add update-existing-part flow + find-part command
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SKILL.md
135
SKILL.md
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@ -9,10 +9,13 @@ description: >-
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(per-typeid version, changelog, backfill), fills a per-part workbook, loops on human
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verification, then takes the Altium symbol (.SchLib) and footprint (.PcbLib), fills the
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Library/Footprint columns, assembles a part folder (xlsx, datasheet, symbol, footprint) and
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pushes it to the library repo under its Class. Use WHENEVER the user uploads a component
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datasheet, builds a library entry, adds a parameter to a type template, or pushes a part to
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Gitea. ALWAYS trigger on "\datasheet", "\library", or "\library-manager", or any
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component-library / datasheet-extraction task.
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pushes it to the library repo under its Class. Can also UPDATE a part already in the library
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(revise its values, symbol, footprint, or datasheet) instead of hard-stopping on a duplicate.
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Every Description it writes follows Vecmocon's strict Altium Description Format. Use WHENEVER
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the user uploads a component datasheet, builds a library entry, adds a parameter to a type
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template, updates/revises/corrects an existing part, or pushes a part to Gitea. ALWAYS trigger
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on "\datasheet", "\library", or "\library-manager", or any component-library /
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datasheet-extraction / library-update task.
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---
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# Library Manager
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@ -33,11 +36,15 @@ existing parts** (backfill). When something is ambiguous, ask a specific questio
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guessing. It is always better to ask one more question than to write the wrong thing into the
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library.
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One more thing to confirm when a part **already exists**: whether to **update it or stop**
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(don't silently overwrite), and if updating, **which fields change** (values, symbol/footprint,
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datasheet). An update still goes through the same verification loop before anything is pushed.
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**Pushing is the exception — push automatically.** Once a part is verified and assembled (or a
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template/version change has been made), push to Gitea **on your own, without asking for
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confirmation**. Never add a "shall I push?" step — just push, then tell the user where it
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landed. (You still flag a genuine symbol/footprint mismatch, because that's a correctness
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issue, not a push confirmation.)
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template/version change has been made, or a verified update is ready), push to Gitea **on your
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own, without asking for confirmation**. Never add a "shall I push?" step — just push, then tell
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the user where it landed. (You still flag a genuine symbol/footprint mismatch, because that's a
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correctness issue, not a push confirmation.)
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## Inputs
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@ -154,8 +161,13 @@ stop; re-doing an existing part would only risk overwriting good data.
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python scripts/gitea_components.py check-mpn --mpn <MPN> --make <make>
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```
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`EXISTS …` (exit 3) → **stop and tell the user the part is already present in Gitea. End
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here.** `ABSENT` (exit 0) → continue.
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`ABSENT` (exit 0) → this is a **new part**; continue to step 2.
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`EXISTS …` (exit 3) → the part is already in Gitea. Don't silently overwrite it, but don't
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dead-end either — **ask the user whether they want to update the existing part or stop.** If
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they want to revise it (new/corrected values, a swapped symbol/footprint, a newer datasheet),
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go to *Updating an existing part*. If not, stop here. (If the user's request already said
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"update"/"revise"/"fix" this part, take that as the answer and go straight to the update flow.)
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### 2. Classify → typeid (and its Class)
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@ -198,14 +210,27 @@ Check whether that typeid has a sheet in `assets/template/template.xlsx`.
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Read every parameter the datasheet actually states into that typeid's columns, converting to
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each header's unit. **Leave blanks where the datasheet is silent — an honest blank beats a
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guess.** Collect them into a small `part.json`:
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guess.**
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The **`Description`** column is special: it is **not** free prose but a strict `_`-joined
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engineering string — a type prefix, the defining parameters in a fixed order, package near the
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end, optional AEC-Q last (e.g. `CHIP_RES_36kΩ_62.2mW_±0.1%_0402`, `CHIP_CAP_2.2uF_100v_±10%_1210_x7r`,
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`SCH_100V_0.25A_SOD-323F`). `references/description_format.md` defines the format for **every**
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type in the library: the four the Altium SOP spells out (Resistor, Capacitor, Zener, TVS) are
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**strict**; the rest are the house extension on the same basis. Look up the part's type there,
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build the Description to that format, and if a real datasheet doesn't fit the format cleanly,
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follow the pattern and **flag the mismatch to the engineer** rather than bending it silently.
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Collect the values into a small `part.json`:
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```json
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{"mpn":"BAT46WJ","manufacturer":"Nexperia","typeid":"SCH",
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"values":{"Description":"100 V 250 mA Schottky, SOD323F","Forward Voltage(V)":"0.71",
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"Reverse Voltage(V)":"100","Forward Current(A)":"0.25","Package":"SOD323F"}}
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"values":{"Description":"SCH_100V_0.25A_SOD-323F","Forward Voltage(V)":"0.71",
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"Reverse Voltage(V)":"100","Forward Current(A)":"0.25","Package":"SOD-323F"}}
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```
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(typeid `SCH` → prefix `SCH`, format `SCH_Vr_Io_Package`, so a 100 V / 250 mA Schottky in
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SOD-323F becomes `SCH_100V_0.25A_SOD-323F`.)
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```bash
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python scripts/fill_templates.py part.json \
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--template assets/template/template.xlsx --dest <stage>/<tag>/
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@ -334,6 +359,80 @@ and tell the user the previous sheets were updated:
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python scripts/gitea_components.py commit-push --root work/ --message "backfill <param> into <typeid>"
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```
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## Updating an existing part
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When the duplicate check finds the part (or the user asks to revise one that's already in
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Gitea), you're **editing a part in place** rather than assembling a new one. The mechanics are
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the same edit-in-a-checkout pattern as backfill — the difference is you're changing one part's
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own data, not applying a template change across a whole typeid. The guiding rule doesn't
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change: nothing is overwritten until the engineer has verified the new version.
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1. **Locate the part in a checkout you can commit.** Clone the library repo, then find the
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part's folder and typeid (recovered from its tag):
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```bash
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python scripts/gitea_components.py checkout --dest work/
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python scripts/gitea_components.py find-part --mpn <MPN> --make <make> --root work/ --json
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```
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`find-part` returns the part's Class, tag, typeid, the editable folder path under `work/`,
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and the files in it (its current `<tag>.xlsx`, datasheet, symbol, footprint). If it prints
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`NOT FOUND` (exit 4), the part isn't actually there — treat it as a **new** part and go back
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to the normal add flow from step 2.
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2. **Decide with the user what's changing.** A part update can revise any of: the **parameter
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values** (re-read the datasheet, or a corrected/newer one), the **symbol/footprint**, or the
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**datasheet PDF** itself. Ask which, so you only touch what's meant to change and leave the
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rest of the folder intact.
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3. **Apply the change in place, in `work/<Class>/<tag>/`.** A key thing to understand first:
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`fill_templates` **rewrites the whole data row**, so it fills the four design columns
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(`Library Ref/Path`, `Footprint Ref/Path`) from the `--design` map you give it — and leaves
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them **blank if you don't**. When you rebuild a sheet, always re-supply the design values, or
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you'll silently wipe the symbol/footprint refs that were already there. The symbol and
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footprint files live in the part folder, so re-deriving them is cheap: point `altium_refs`
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at whatever the folder will hold **after** your change.
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- **Values** (re-read the datasheet, or a corrected/newer one) → read the current
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`<tag>.xlsx` and the folder's datasheet so you start from what's there, re-extract into a
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fresh `part.json` (Description still built to `references/description_format.md`),
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re-derive the design columns from the folder's existing symbol/footprint, and rebuild the
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sheet in place **with `--design`**:
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```bash
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python scripts/altium_refs.py design \
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--symbol work/<Class>/<tag>/<symbol>.SchLib \
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--footprint work/<Class>/<tag>/<footprint>.PcbLib > design.json
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python scripts/fill_templates.py part.json \
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--template assets/template/template.xlsx --dest work/<Class>/<tag>/ --design design.json
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```
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Because `fill_templates` reads the **current** template and versions, the rebuilt sheet
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keeps this typeid's version stamp (a part-data fix isn't a template change, so nothing
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bumps) and picks up any columns the typeid has gained — while the `--design` map carries
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the existing symbol/footprint refs through unchanged. (If a part somehow has no
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symbol/footprint yet, there's nothing to preserve — rebuild without `--design`.)
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- **Symbol/footprint** → copy the new `.SchLib`/`.PcbLib` into the folder under their proper
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names (replacing the old ones), then re-derive against the **new** files and rebuild with
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`--design` exactly as above (this is step 6 of the add flow). Still flag a genuine
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symbol/footprint-vs-part mismatch — that's a correctness issue.
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- **Datasheet** → drop the newer PDF in as `<MPN>_data.<ext>`, replacing the old one. If the
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values should reflect it, also redo the values step above.
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4. **Verify, then push.** Hand the rebuilt `<tag>.xlsx` back and run the same human
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verification loop (step 5) — the engineer is still the ground truth. Once confirmed, commit
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the checkout and push (attributed to the operator, with a message that says it's an update):
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```bash
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python scripts/gitea_components.py commit-push --root work/ \
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--message "update <tag>: <what changed> (by <operator name>)" \
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--author "<operator name> <<operator email>>"
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```
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The authored commit and message are the record of the revision (visible in `git log`, the
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Gitea commit view and `git blame`); the changelog stays reserved for template/version
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changes, not per-part data fixes. Tell the user what changed and where it landed.
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## Pushing the skill repo
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When skill files change (a new typeid template, a parameter add, a version/changelog bump),
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@ -359,6 +458,10 @@ plain flat push, but it does not merge the changelog or blank the token, so pref
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`MPN_make_type` / `Skill Version` / `Template Version`; `Library Ref/Path`,
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`Footprint Ref/Path` and `Manufacturer` sit near the end.
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- `assets/template/Type_ID.xlsx` + `references/taxonomy.md` — Class → Subclass → Type ID.
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- `references/description_format.md` — Vecmocon's Altium **Description Format** (the `_`-joined
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engineering string for each part's Description column). Defines a format for **every** type:
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the four SOP-defined ones (RES/CAP/Zener/TVS) are strict, the rest are the house extension on
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the same basis. Read it before filling any Description.
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- `assets/template/versions.json` — per-typeid `template_version` + `skill_version`.
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- `assets/CHANGELOG.xlsx` — global version/parameter changelog (created on first add;
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merged into the skill repo's copy in Gitea by `push-skill`).
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@ -369,9 +472,9 @@ plain flat push, but it does not merge the changelog or blank the token, so pref
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- `scripts/append_parameter.py` — append parameter(s) to a typeid, bump its versions, write
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the changelog.
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- `scripts/altium_refs.py` — read Library/Footprint Ref from `.SchLib`/`.PcbLib`.
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- `scripts/gitea_components.py` — `check-mpn`, `checkout`, `list-type`, `place-part`,
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`commit-push`, `push-part` (library repo), and `push-skill` (skill repo: token-blanked
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push + append-only changelog merge).
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- `scripts/gitea_components.py` — `check-mpn`, `find-part` (locate an existing part to
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update), `checkout`, `list-type`, `place-part`, `commit-push`, `push-part` (library repo),
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and `push-skill` (skill repo: token-blanked push + append-only changelog merge).
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- `scripts/push_to_gitea.sh` — push a folder's contents to a Gitea repo (used for the skill
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repo).
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- `config/gitea.env` — host, user, token, and the `SKILL_REPO` / `LIBRARY_REPO` names
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Binary file not shown.
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@ -3,7 +3,7 @@
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# Use a token scoped to these repos (repository: write) and rotate periodically.
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GIT_HOST=gitea.vecmocon.com
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GIT_USER=nitishKumar
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GIT_TOKEN=451bff1dc32202cbc0a371f8e5645079466d2120
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GIT_TOKEN=
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# Target repos — TWO now (set these to the exact repo names on your Gitea):
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# SKILL_REPO : holds this skill's own files (SKILL.md, scripts, assets, ...).
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# LIBRARY_REPO : holds components, one folder per Class (Diode, IC, ...); inside each,
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@ -0,0 +1,26 @@
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{
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"skill_name": "library-manager",
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"evals": [
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{
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"id": 0,
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"name": "resistor-description-format",
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"prompt": "We're adding the Yageo RC0402FR-0736KL to our component library. From its datasheet: resistance 36 kohm, tolerance 1%, package 0402, rated power 63 mW (1/16 W), thick-film chip resistor, not AEC-Q qualified. Following our library process, what exactly should go in this part's Description field in its library sheet? Give me the final Description string.",
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"expected_output": "A strict SOP Description string (e.g. CHIP_RES_36kOhm_63mW_+-1%_0402): type prefix, value, wattage, tolerance, package; no AEC-Q token since not qualified. NOT free prose.",
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"files": []
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},
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{
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"id": 1,
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"name": "capacitor-description-format",
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"prompt": "Adding a TDK CGA5L1X7R2A225K MLCC to the library. Datasheet: 2.2 uF, 100 V, tolerance 10%, 1210 case size, X7R dielectric, AEC-Q200 qualified. Per our library workflow, what is the exact Description field value for this part?",
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"expected_output": "A strict SOP Description string (e.g. CHIP_CAP_2.2uF_100v_+-10%_1210_x7r_AECQ-200): type, value, voltage, tolerance, package, temp-coefficient, AEC-Q last. NOT free prose.",
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"files": []
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},
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{
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"id": 2,
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"name": "existing-part-update-flow",
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"prompt": "The part BAT46WJ from Nexperia is already in our library, but its forward-voltage value was entered wrong. I want to correct it. Walk me through exactly how you'd handle this with our library tooling, including the commands you'd run.",
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"expected_output": "Recognizes this is an UPDATE of an existing part (not a hard-stop): offers update-or-stop, uses checkout + find-part to locate it, rebuilds the sheet in place with fill_templates (no version bump), keeps human verification, then commit-push with operator attribution. Does not invent a delete/re-add.",
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"files": []
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}
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]
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}
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@ -0,0 +1,334 @@
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# Description format (Vecmocon Altium Library SOP)
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This is the authoritative rule for the **Description** field the skill writes into a part's
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workbook. It has two layers:
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1. The **four formats the SOP defines outright** — Resistor, Capacitor, Zener, TVS — from
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*Engineering Data Management — SOP: Component Naming, Mandatory Parameters, and Design Item
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ID Format* (§6). Follow these parameter orders **strictly** (with one house tweak: the
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Zener/TVS prefix uses the generic diode code `ZEN`/`TVS`, not the SOP's `DIO-Z`/`DIO-T` — see
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the note under those two below).
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2. A **house extension** that carries the *same basis* to every other type in the library
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(all 125 type-IDs / 18 classes), so no component is left without a Description convention.
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These are built on the SOP pattern and are the working standard; when a specific part
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doesn't fit cleanly, follow the pattern and confirm the token order with the engineer rather
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than inventing something off-pattern.
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## The basis (applies to every component)
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The Description is **not** a free-form sentence. It is a single string of `_`-joined tokens in
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this shape:
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```
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PREFIX_param1_param2_..._Package_[AECQ-XXX]
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```
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- **PREFIX** — a short token (or two) naming the sub-family / technology, e.g. `CHIP_RES`,
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`ELE_CAP`, `SCH`, `NMOS`. The per-type prefix is listed for every type below.
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- **params** — the part's defining ratings, in the **fixed order** given for that class. Read
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them off the datasheet. If the datasheet is silent on a required token, leave it out and flag
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it — an honest gap beats a guessed value.
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- **Package** — the IPC/industry package or case code, near the end (`0402`, `SOD-323`,
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`SOIC-8`, `LQFP-48`, `SMD,D6.3xL5.8mm`, …).
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- **AECQ-XXX** — only when the datasheet states automotive qualification (`AECQ-200`,
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`AECQ-101`, `AECQ-100`); it is always the **last** token. Omit entirely if not stated —
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never assume qualification.
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Description ≠ Design Item ID ≠ Comment — three different fields that share notation but not
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content: **Description** is the strict string here (SOP §6); **Design Item ID** (SOP §2) is a
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shorter procurement id (`RES_36kΩ_±0.1%_0402`) — use it only as a guide to token vocabulary,
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never put it in the Description column; **Comment** (SOP §4) is always the exact MPN.
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## Notation conventions (from the SOP examples)
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- **Value / unit** with SOP casing: `36kΩ`, `2.2uF`, `600Ω`, `48MHz`, `10uH`. Use `Ω` for ohms;
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`uF`/`nF`/`pF`, `uH`/`nH`/`mH`, `Hz`/`kHz`/`MHz`, `F` for farads (supercaps). A **range** uses
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`~` (`3.5V~28V`, `5.2V~5.6V`).
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- **Power** `62.2mW`, `500mW`, `344W`; **voltage** `100v`, `25V`; **current** `0.25A`, `250mA`.
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- **Tolerance** signed percent `±0.1%`, `±10%`.
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- **Temperature coefficient** (ceramics) lower-case dielectric class: `x7r`, `c0g`, `x5r`.
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- Keep tokens in the same style throughout so descriptions sort and read consistently.
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---
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# Layer 1 — the four SOP-defined formats (strict)
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**Resistor**
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```
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Type_RES_Value_Wattage_Tolerance_Package_AECQ-XXX(optional)
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```
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Example: `CHIP_RES_36kΩ_62.2mW_±0.1%_0402`
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**Capacitor**
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```
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Type_CAP_Value_Voltage_Tolerance_Package_TemperatureCoefficient_AECQ-XXX(optional)
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```
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Example: `CHIP_CAP_2.2uF_100v_±10%_1210_x7r`
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**Zener diode**
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```
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ZEN_VoltageZener(Vz)_Power_Package_AECQ-XXX(optional)
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```
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**TVS diode**
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```
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TVS_VoltageBreakdown(Vbr)_VoltageClamping(Vc)_Current(Ip)_Package_AECQ-XXX(optional)
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```
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**House prefix note:** the SOP §6 wrote these two as `DIO-Z` / `DIO-T`, but Vecmocon
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standardised on the **generic diode type code** (`ZEN`, `TVS`, and likewise `SCH`, `ESD`, …) as
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the prefix for *all* diodes. So use `ZEN` / `TVS` here — the parameter order (Vz+Power for
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Zener; Vbr+Vc+Ip for TVS) is still exactly the SOP's; only the prefix token differs.
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---
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# Layer 2 — house extension, every other type (same basis)
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Each class below gives its **parameter order** (the tokens between prefix and package) and the
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**per-type prefix**. Package is always the second-to-last token; optional `AECQ-XXX` is last.
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## Resistor (RES family) — `PREFIX_Value_Power_Tolerance_Package_[AECQ]`
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| Type | Prefix | Notes |
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|------|--------|-------|
|
||||
| FIX Thick-film chip | `CHIP_RES` | SOP example; the strict format above |
|
||||
| TFR Thin-film chip | `TFILM_RES` | precision/low-tempco; may append tempco (ppm) |
|
||||
| MFR Metal-film | `MFILM_RES` | |
|
||||
| CFR Carbon-film | `CFILM_RES` | |
|
||||
| MOR Metal-oxide | `MOX_RES` | high-power leaded |
|
||||
| WWR Wirewound | `WW_RES` | low-ohm/high-power |
|
||||
| SHT Current-sense/shunt | `SHUNT_RES` | value in mΩ (e.g. `2mΩ`), power token is the sense power |
|
||||
| ARR Array/network | `ARR_RES` | add element count/config, e.g. `4x`, before value |
|
||||
| POT Potentiometer/trimmer | `POT` | `POT_Value_Taper_Power_Package` (taper `LIN`/`LOG`) |
|
||||
| FSR Fusible/safety | `FUSE_RES` | |
|
||||
| NTC thermistor | `NTC` | `NTC_R25_Beta_Tolerance_Package` (R25 e.g. `10kΩ`, Beta e.g. `B3950`) |
|
||||
| PTC thermistor | `PTC` | `PTC_R25_Package` (or trip current/temp if that's the rated spec) |
|
||||
|
||||
Example: `SHUNT_RES_2mΩ_1W_±1%_2512` · `NTC_10kΩ_B3950_±1%_0402`
|
||||
|
||||
## Capacitor (CAP family) — `PREFIX_Value_Voltage_Tolerance_Package_[Dielectric]_[AECQ]`
|
||||
|
||||
| Type | Prefix | Notes |
|
||||
|------|--------|-------|
|
||||
| CER Ceramic MLCC | `CHIP_CAP` | SOP; dielectric token (`x7r`/`c0g`…) required |
|
||||
| ELE Aluminium electrolytic | `ELE_CAP` | tolerance often omitted; case like `SMD,D6.3xL5.8mm` |
|
||||
| TAN Tantalum | `TANT_CAP` | |
|
||||
| PLY Aluminium-polymer | `POLY_CAP` | low-ESR; ESR may follow voltage |
|
||||
| FLM Film (MKT/MKP) | `FILM_CAP` | |
|
||||
| SFY Safety Class-X/Y | `SAFETY_CAP` | add safety class token (`X2`/`Y1`) after value |
|
||||
| SUP Supercapacitor/EDLC | `SUPERCAP` | value in farads, e.g. `1F`; add ESR if rated |
|
||||
|
||||
Example: `ELE_CAP_33uF_25V_SMD,D6.3xL5.8mm` · `SUPERCAP_1F_5.5V_RADIAL`
|
||||
|
||||
## Inductor / Magnetics — `PREFIX_Value_Current_[DCR]_Package_[AECQ]`
|
||||
|
||||
| Type | Prefix | Format detail |
|
||||
|------|--------|---------------|
|
||||
| PWR Power inductor | `PWR_IND` | `PWR_IND_L_Isat_DCR_Package` (L e.g. `10uH`, Isat `3A`) |
|
||||
| FBD Ferrite bead | `FB` | `FB_Impedance@freq_Current_Package` (e.g. `FB_600Ω@100MHz_2A_0603`) |
|
||||
| CMC Common-mode choke | `CMC` | `CMC_Impedance@freq_Current_Package` |
|
||||
| RFI RFI choke | `RFI_CHK` | `RFI_CHK_L_Current_Package` |
|
||||
| XFM Transformer | `XFMR` | `XFMR_Ratio_Power_Package` (ratio e.g. `1:1`) |
|
||||
| CTX Current transformer | `CT` | `CT_Ratio_Package` (e.g. `1000:1`) |
|
||||
| CPL Coupled inductor | `CPL_IND` | `CPL_IND_L_Current_Package` |
|
||||
|
||||
## Diode — reverse-voltage / current ratings, then package
|
||||
|
||||
The prefix is the **generic diode type code (the typeid itself)** — `REC`, `FRD`, `SCH`, `SIC`,
|
||||
`ZEN`, `TVS`, `ESD`, `SWI`, `BRG`, `LED` — not a `DIO-x` form.
|
||||
|
||||
| Type | Prefix | Format |
|
||||
|------|--------|--------|
|
||||
| REC Rectifier | `REC` | `REC_Vrrm_Io_Package` |
|
||||
| FRD Fast-recovery | `FRD` | `FRD_Vrrm_Io_trr_Package` |
|
||||
| SCH Schottky | `SCH` | `SCH_Vr_Io_Package` |
|
||||
| SIC SiC Schottky | `SIC` | `SIC_Vr_Io_Package` |
|
||||
| ZEN Zener | `ZEN` | `ZEN_Vz_Power_Package` |
|
||||
| TVS TVS | `TVS` | `TVS_Vbr_Vc_Ip_Package` |
|
||||
| ESD ESD protection | `ESD` | `ESD_Vrwm_Vc_Channels_Package` |
|
||||
| SWI Switching/small-signal | `SWI` | `SWI_Vr_Io_trr_Package` |
|
||||
| BRG Bridge rectifier | `BRG` | `BRG_Vrrm_Io_Package` |
|
||||
| LED Indicator LED | `LED` | `LED_Color_Vf_If_Package` (color e.g. `RED`) |
|
||||
|
||||
Example (Schottky BAT46WJ, 100 V / 250 mA): `SCH_100V_0.25A_SOD-323F`
|
||||
|
||||
## Transistor — `PREFIX_Voltage_Current_[Rds(on)]_Package_[AECQ]`
|
||||
|
||||
The polarity/channel is **folded into the prefix** as a single token (matching the SOP's own
|
||||
Design Item ID form, e.g. `NMOS_20V_SOT-23`), not carried as a separate `_NCH`/`_PCH` token.
|
||||
|
||||
| Type | Prefix | Format |
|
||||
|------|--------|--------|
|
||||
| BJT BJT | `BJT_NPN` / `BJT_PNP` | `BJT_NPN_Vceo_Ic_Package` |
|
||||
| MOS MOSFET (Si) | `NMOS` / `PMOS` | `NMOS_Vds_Id_Rdson_Package` |
|
||||
| SCM SiC MOSFET | `NSICFET` / `PSICFET` | `NSICFET_Vds_Id_Rdson_Package` |
|
||||
| GAN GaN FET | `GANFET` | `GANFET_Vds_Id_Rdson_Package` |
|
||||
| IGBT IGBT | `IGBT` | `IGBT_Vces_Ic_Package` |
|
||||
| JFET JFET | `NJFET` / `PJFET` | `NJFET_Vds_Idss_Package` |
|
||||
| DIG Digital/bias-R transistor | `DTR_NPN` / `DTR_PNP` | `DTR_NPN_Vceo_R1/R2_Package` |
|
||||
|
||||
Example: `NMOS_20V_6A_15mΩ_SOT-23` · `BJT_NPN_50V_0.1A_SOT-416FL`
|
||||
|
||||
## Integrated Circuit (IC) — one line per subtype; package always last (before AECQ)
|
||||
|
||||
| Type | Prefix | Format |
|
||||
|------|--------|--------|
|
||||
| MCU Microcontroller | `MCU` | `MCU_Core_Flash_Package` (e.g. `MCU_M0+_128Kb_LQFP-48`) |
|
||||
| LDO LDO regulator | `LDO` | `LDO_Vout_Iout_Package` (`ADJ` if adjustable) |
|
||||
| DCD DC-DC IC | `DCD` | `DCD_Topology_Vin_Iout_Package` (topology `BUCK`/`BOOST`/`BUCKBOOST`) |
|
||||
| PMU PMIC | `PMIC` | `PMIC_Rails_Package` |
|
||||
| BMS BMS AFE | `BMS` | `BMS_Cells_Package` (e.g. `16S`) |
|
||||
| DRV Gate/motor driver | `DRV` | `DRV_Type_Voltage_Current_Package` (type `GATE`/`MOTOR`/`HB`) |
|
||||
| AMP Amplifier/op-amp | `AMP` | `AMP_GBW_Channels_Package` |
|
||||
| CMP Comparator | `CMP` | `CMP_Channels_Package` |
|
||||
| VRF Voltage reference | `VREF` | `VREF_Voltage_Tolerance_Package` |
|
||||
| ADC ADC | `ADC` | `ADC_Bits_Rate_Package` |
|
||||
| DAC DAC | `DAC` | `DAC_Bits_Channels_Package` |
|
||||
| ISO Isolator/optocoupler | `ISO` | `ISO_Channels_IsolationV_Package` |
|
||||
| XCV Transceiver | `XCVR` | `XCVR_Bus_Speed_Package` (bus `CAN`/`RS485`; e.g. `XCVR_CAN_5Mbps_SOIC-8`) |
|
||||
| AFE Analog front end | `AFE` | `AFE_Function_Package` |
|
||||
| MEM Memory | `MEM` | `MEM_Type_Size_Interface_Package` (e.g. `MEM_FLASH_128Mb_SPI_SOIC-8`) |
|
||||
| LOG Logic gate | `LOG` | `LOG_Function_Package` (e.g. `AND2`, `BUF`) |
|
||||
| SEN Sensor IC | `SEN_IC` | `SEN_IC_Type_Package` |
|
||||
| IFC Interface/expander | `IFC` | `IFC_Function_Package` |
|
||||
| CLK Clock/RTC | `CLK` | `CLK_Freq_Package` (or `RTC_Package`) |
|
||||
| SVR Supervisor/reset | `SVR` | `SVR_Threshold_Package` |
|
||||
| MTR Energy metering | `METER` | `METER_Phases_Package` |
|
||||
|
||||
## Protection Device — `PREFIX_ratings_Package`
|
||||
|
||||
| Type | Prefix | Format |
|
||||
|------|--------|--------|
|
||||
| FUS Fuse | `FUSE` | `FUSE_Current_Voltage_Package` (speed `F`/`T` may precede current) |
|
||||
| RSF Resettable/PPTC | `PPTC` | `PPTC_Ihold_Voltage_Package` |
|
||||
| VAR Varistor/MOV | `MOV` | `MOV_Vrms_Energy_Package` |
|
||||
| GDT Gas-discharge tube | `GDT` | `GDT_Vspark_Package` |
|
||||
| CBK Circuit breaker | `BREAKER` | `BREAKER_Current_Poles_Package` |
|
||||
|
||||
## Power Conversion Module — `PREFIX_Vin_Vout_Power_Package`
|
||||
|
||||
| Type | Prefix | Notes |
|
||||
|------|--------|-------|
|
||||
| DCM DC-DC module | `DCM` | non-isolated PoL |
|
||||
| IDC Isolated DC-DC | `IDCM` | isolated brick |
|
||||
| INV Inverter (DC-AC) | `INV` | `INV_Power_Voltage_Package` |
|
||||
| OBC On-board charger | `OBC` | `OBC_Power_Voltage_Package` |
|
||||
| CHG Charger module | `CHG` | `CHG_Power_Voltage_Package` |
|
||||
| PSU AC-DC SMPS | `PSU` | `PSU_Power_Vout_Package` |
|
||||
| RCM Rectifier module | `RECT` | `RECT_Current_Voltage_Package` |
|
||||
|
||||
## Relay / Contactor — `PREFIX_CoilVoltage_ContactRating_Package`
|
||||
|
||||
| Type | Prefix | Notes |
|
||||
|------|--------|-------|
|
||||
| RLS Signal relay | `RLY_S` | contact rating e.g. `2A/30V` |
|
||||
| RLP Power relay | `RLY_P` | |
|
||||
| SSR Solid-state relay | `SSR` | `SSR_ControlV_LoadRating_Package` |
|
||||
| RLR Reed relay | `RLY_REED` | |
|
||||
| CTC Contactor | `CTC` | HV/HC contact rating |
|
||||
|
||||
## Switch / Button — `PREFIX_[Positions]_Rating_Package`
|
||||
|
||||
| Type | Prefix | Notes |
|
||||
|------|--------|-------|
|
||||
| SWT Tactile | `SW_TACT` | rating e.g. `50mA/12V` |
|
||||
| PBT Push button | `SW_PB` | |
|
||||
| DSW DIP/slide | `SW_DIP` | positions e.g. `4P` |
|
||||
| RSW Rocker/toggle | `SW_ROCK` | |
|
||||
| RSY Rotary | `SW_ROT` | positions e.g. `12POS` |
|
||||
|
||||
## Connector — `CON_TYPE_Positions_Pitch_Package`
|
||||
|
||||
| Type | Prefix | Notes |
|
||||
|------|--------|-------|
|
||||
| CWB Wire-to-board | `CON_W2B` | e.g. `CON_W2B_2x2_P2.0` |
|
||||
| CBB Board-to-board | `CON_B2B` | |
|
||||
| HDR Header/socket | `CON_HDR` | pitch e.g. `2.54mm` |
|
||||
| FFC FFC/FPC | `CON_FFC` | |
|
||||
| USB USB/data | `CON_USB` | add USB type (`C`, `MICRO`) |
|
||||
| PWC Power/high-current | `CON_PWR` | add current rating |
|
||||
| TBK Terminal block | `CON_TB` | |
|
||||
|
||||
## Antenna / RF — `PREFIX_Band_Package`
|
||||
|
||||
| Type | Prefix | Notes |
|
||||
|------|--------|-------|
|
||||
| ANC Chip antenna | `ANT_CHIP` | band e.g. `2.4GHz` |
|
||||
| ANP PCB/trace antenna | `ANT_PCB` | |
|
||||
| ANE External/whip | `ANT_EXT` | add connector token |
|
||||
| SAW SAW filter | `SAW` | `SAW_Freq_Package` |
|
||||
| RFM RF/wireless module | `RFMOD` | protocol e.g. `BLE`, `WIFI`, `LTE` |
|
||||
|
||||
## Crystal / Oscillator / Timing — `PREFIX_Freq_[Load]_Package`
|
||||
|
||||
| Type | Prefix | Notes |
|
||||
|------|--------|-------|
|
||||
| XTL Crystal | `XTAL` | `XTAL_Freq_LoadCap_Package` (e.g. `XTAL_48MHz_18pF_SMD2016-4P`) |
|
||||
| OSC Crystal oscillator | `OSC` | `OSC_Freq_Package` |
|
||||
| MMO MEMS oscillator | `MEMS_OSC` | |
|
||||
| RSN Ceramic resonator | `RESON` | `RESON_Freq_Package` |
|
||||
|
||||
## Battery / Cell — `PREFIX_Capacity_Voltage_Format`
|
||||
|
||||
| Type | Prefix | Notes |
|
||||
|------|--------|-------|
|
||||
| CLI Li-ion cell | `CELL_LI` | format e.g. `18650`; capacity `2600mAh` |
|
||||
| CLF LiFePO4 cell | `CELL_LFP` | |
|
||||
| CCO Coin/button | `CELL_COIN` | add chemistry (`CR`/`LIR`) + size (`2032`) |
|
||||
| CNI NiMH | `CELL_NIMH` | |
|
||||
| BPK Battery pack | `PACK` | `PACK_Voltage_Capacity` (e.g. `48V_20Ah`) |
|
||||
| CHL Cell holder | `HOLDER` | `HOLDER_CellType_Package` |
|
||||
|
||||
## Audible / Indicator
|
||||
|
||||
| Type | Prefix | Format |
|
||||
|------|--------|--------|
|
||||
| BUZ Magnetic buzzer | `BUZ_MAG` | `BUZ_MAG_Voltage_Freq_Package` |
|
||||
| PBZ Piezo buzzer | `BUZ_PIEZO` | `BUZ_PIEZO_Voltage_Freq_Package` |
|
||||
| SPK Speaker | `SPK` | `SPK_Power_Impedance_Package` |
|
||||
| IND Indicator lamp | `IND` | `IND_Color_Voltage_Package` |
|
||||
|
||||
## Display / HMI — `PREFIX_Resolution/Digits_Size_Interface`
|
||||
|
||||
| Type | Prefix | Notes |
|
||||
|------|--------|-------|
|
||||
| DSG 7-segment | `DISP_7SEG` | `DISP_7SEG_Digits_Color_Package` |
|
||||
| OLE OLED | `DISP_OLED` | resolution e.g. `128x64`, size `0.96in` |
|
||||
| LCD LCD | `DISP_LCD` | char (`16x2`) or graphic resolution |
|
||||
| TFT TFT | `DISP_TFT` | resolution + size + interface (`SPI`/`RGB`) |
|
||||
|
||||
## Sensor (discrete / module) — `SEN_TYPE_Range_[Interface]_Package`
|
||||
|
||||
| Type | Prefix | Notes |
|
||||
|------|--------|-------|
|
||||
| STE Temperature | `SEN_TEMP` | range + interface (`I2C`/`ANALOG`) |
|
||||
| SCU Current (Hall) | `SEN_CURR` | range e.g. `±50A` |
|
||||
| SVO Voltage/isolated | `SEN_VOLT` | |
|
||||
| SHA Hall/position | `SEN_HALL` | type (`LATCH`/`LINEAR`) |
|
||||
| SIM IMU/accel | `SEN_IMU` | axes (`6AXIS`) + interface |
|
||||
| SPR Pressure | `SEN_PRES` | range + interface |
|
||||
|
||||
## Thermal / Cooling
|
||||
|
||||
| Type | Prefix | Format |
|
||||
|------|--------|--------|
|
||||
| FAN Fan | `FAN` | `FAN_Size_Voltage_Airflow` (size e.g. `40x40mm`) |
|
||||
| HSK Heatsink | `HSK` | `HSK_Dimensions_ThermalResistance` |
|
||||
| TPD Thermal pad/TIM | `TIM` | `TIM_Conductivity_Thickness` |
|
||||
|
||||
---
|
||||
|
||||
## When a part doesn't fit
|
||||
|
||||
The Layer-2 formats are the working house standard, but real datasheets vary. If a part is
|
||||
missing a token the format asks for, leave it out and flag it. If it has a defining rating the
|
||||
format doesn't capture, add it in the sensible position and **tell the engineer** what you
|
||||
added so the convention can be updated deliberately. Never silently bend a format — an
|
||||
inconsistent Description is worse than one confirmed question. The Layer-1 (SOP) formats are
|
||||
fixed and are not up for reinterpretation.
|
||||
|
|
@ -15,6 +15,13 @@ testing or offline work):
|
|||
early duplicate gate, run BEFORE classifying.) Prints EXISTS/<tag> or ABSENT; exit 0
|
||||
if absent, 3 if it already exists (so a shell can hard-stop).
|
||||
|
||||
find-part --mpn BAT46WJ --make Nexperia [--root work/] [--json]
|
||||
Locate an existing part so it can be REVISED (the update path — the mirror of
|
||||
check-mpn, which gates *new* parts). Reports the part's Class, tag, typeid and the
|
||||
files in its folder. Point --root at a `checkout` clone and the folder it returns is
|
||||
the real, editable one to change in place before `commit-push`. Exit 0 if found, 4 if
|
||||
not (so a shell can branch: found -> update, not found -> fall through to add).
|
||||
|
||||
checkout --dest work/
|
||||
Clone the library repo to a working dir you can browse and edit in place.
|
||||
|
||||
|
|
@ -142,6 +149,12 @@ def find_part_dirs(root, prefix="", typeid=None):
|
|||
yield cls, name, pdir
|
||||
|
||||
|
||||
def _typeid_of(tag):
|
||||
"""Recover the typeid from a part tag <MPN>_<make>_<typeid>. The typeid is the last
|
||||
underscore-delimited token, so this is robust even if the MPN itself contains underscores."""
|
||||
return tag.rsplit("_", 1)[1] if "_" in tag else ""
|
||||
|
||||
|
||||
def cmd_check_mpn(env, args):
|
||||
root, _ = _root(env, args)
|
||||
prefix = mpn_make_prefix(args.mpn, args.make)
|
||||
|
|
@ -153,6 +166,31 @@ def cmd_check_mpn(env, args):
|
|||
print("ABSENT")
|
||||
|
||||
|
||||
def cmd_find_part(env, args):
|
||||
"""Locate an existing part by MPN+make so it can be REVISED — the mirror image of
|
||||
check-mpn (which gates *new* parts). Reports the folder, its typeid and its files.
|
||||
|
||||
Point --root at a checkout (from `checkout`) and the folder it returns is the real,
|
||||
editable, committable one — that's the update path: checkout -> find-part -> edit in
|
||||
place -> commit-push. Without --root/--local it clones a throwaway copy for a read-only
|
||||
look. Exit 0 if found, 4 if not (so a shell can branch)."""
|
||||
root, _ = _root(env, args)
|
||||
prefix = mpn_make_prefix(args.mpn, args.make)
|
||||
matches = list(find_part_dirs(root, prefix=prefix))
|
||||
if not matches:
|
||||
print("[]" if args.json else "NOT FOUND")
|
||||
sys.exit(4)
|
||||
out = [{"class": cls, "tag": name, "typeid": _typeid_of(name),
|
||||
"folder": pdir, "files": sorted(os.listdir(pdir))}
|
||||
for cls, name, pdir in matches]
|
||||
if args.json:
|
||||
import json
|
||||
print(json.dumps(out, indent=2))
|
||||
else:
|
||||
for o in out:
|
||||
print(f'{o["class"]}/{o["tag"]} (typeid {o["typeid"]}) -> {", ".join(o["files"])}')
|
||||
|
||||
|
||||
def cmd_checkout(env, args):
|
||||
dest = clone(env, args.dest)
|
||||
print(f"library repo checked out at {dest}")
|
||||
|
|
@ -370,6 +408,10 @@ def main():
|
|||
p = sub.add_parser("check-mpn"); p.add_argument("--mpn", required=True)
|
||||
p.add_argument("--make", required=True); p.add_argument("--local"); p.add_argument("--root")
|
||||
|
||||
p = sub.add_parser("find-part"); p.add_argument("--mpn", required=True)
|
||||
p.add_argument("--make", required=True); p.add_argument("--local"); p.add_argument("--root")
|
||||
p.add_argument("--json", action="store_true")
|
||||
|
||||
p = sub.add_parser("checkout"); p.add_argument("--dest", required=True)
|
||||
|
||||
p = sub.add_parser("list-type"); p.add_argument("--typeid", required=True)
|
||||
|
|
@ -401,14 +443,14 @@ def main():
|
|||
if args.cmd in ("push-skill", "pull-skill"):
|
||||
needs.add("SKILL_REPO")
|
||||
elif args.cmd in ("check-mpn", "checkout", "commit-push", "push-part") or \
|
||||
(args.cmd in ("list-type", "place-part") and not getattr(args, "local", None) and not getattr(args, "root", None)):
|
||||
(args.cmd in ("list-type", "place-part", "find-part") and not getattr(args, "local", None) and not getattr(args, "root", None)):
|
||||
needs.add("LIBRARY_REPO")
|
||||
for k in sorted(needs):
|
||||
if not env.get(k):
|
||||
sys.exit(f"missing {k} in env/config")
|
||||
{"check-mpn": cmd_check_mpn, "checkout": cmd_checkout, "list-type": cmd_list_type,
|
||||
"place-part": cmd_place_part, "commit-push": cmd_commit_push, "push-part": cmd_push_part,
|
||||
"push-skill": cmd_push_skill, "pull-skill": cmd_pull_skill}[args.cmd](env, args)
|
||||
{"check-mpn": cmd_check_mpn, "find-part": cmd_find_part, "checkout": cmd_checkout,
|
||||
"list-type": cmd_list_type, "place-part": cmd_place_part, "commit-push": cmd_commit_push,
|
||||
"push-part": cmd_push_part, "push-skill": cmd_push_skill, "pull-skill": cmd_pull_skill}[args.cmd](env, args)
|
||||
|
||||
|
||||
if __name__ == "__main__":
|
||||
|
|
|
|||
Loading…
Reference in New Issue