51 lines
1.1 KiB
Plaintext
51 lines
1.1 KiB
Plaintext
* C:\Users\User\Documents\LTspice\Conactor Based Low-side design.asc
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* Generated by LTspice 24.1.9 for Windows.
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M1 PFET_bridge PCHG 0 0 BSP89
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D1 N005 N003 MMSD4148
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R1 5V N005 10k
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V1 N001 0 57
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V2 3V3 0 3.3
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R2 N003 To_MCU_2 1Meg
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D2 0 To_MCU_2 3V3Zener
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R3 N003 PFET_bridge 25
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D3 0 PFET_bridge D
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V3 NC_01 0 PULSE(0 5 0 0.1 0.1 1 2 4)
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V4 N006 0 5
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D6 N004 P001 BAT54
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R5 P001 N008 10Meg
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R6 0 N008 500k
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D7 0 N008 EDZV6_8B
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M4 N012 N008 0 0 NMOS
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R7 N012 To_MCU_3 1k
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R8 To_MCU_3 3V3 1Meg
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V7 5V 0 5
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D5 N009 N004 MMSD4148
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R9 3V3 N009 10k
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D4 N004 N003 D
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R4 N001 NC_02 10 pwr=1000
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M2 N007 To_MCU_2 0 0 BSP89
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R11 3V3 N007 10k
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M3 N004 DCHG 0 0 NMOS
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M5 N010 N011 0 0 BSP89
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R10 3V3 N010 10k
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R12 N011 PFET_bridge 10k
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D8 0 N011 BZX84C15L
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.model D D
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.lib C:\Users\User\AppData\Local\LTspice\lib\cmp\standard.dio
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.model NMOS NMOS
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.model PMOS PMOS
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.lib C:\Users\User\AppData\Local\LTspice\lib\cmp\standard.mos
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.tran 10
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.model 3V3Zener D(Ron=0 Roff=100Meg Vfwd=0.7 Vrev 3.3)
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* LOAD DETECT
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* PCHG FET DET
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* THERMAL FUSE DET
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* Contactor Weld DET
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* Bat+
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* Bat-
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* Pack-
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* Load
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.model zeeno D(Ron=0 Roff=1Meg Vfwd=0.7 Vrev 3.3)
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.backanno
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.end
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