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refactor: Standardized naming conventions and improved CAN functionality 

- Updated naming conventions in MCAL, ECU layers for UART and CAN, RTE, utils, and main modules.
- Applied CAN filters directly in the initialization function for better reliability.
- Restricted CAN reinitialization to bus-off errors only.
- Enhanced RX interrupt handling for CAN to improve performance and stability.
- Made updates to the CAN TX function for better data transmission.
- Updated TX functionality to replace buffer usage with queue-based implementation.
stable
Rakshita 2025-01-17 18:00:45 +05:30
parent a6d7b58f3d
commit 1c6fff8d24
17 changed files with 1494 additions and 3063 deletions
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12
Core/Include/ivec_mcal_i2c.h
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@ -17,11 +17,11 @@
#include "../utils/utils.h" #include "../utils/utils.h"
#include "string.h" #include "string.h"
xCoreStatus_t xMCAL_I2C_init(I2C_Regs *I2C_inst, xI2C_baud_t baud); IVEC_CoreStatus_e xMCAL_I2C_init(I2C_Regs *I2C_inst, IVEC_I2cBaud_e baud);
xCoreStatus_t xMCU_i2cWriteMcal(I2C_Regs *I2C_inst,uint8_t u8addr ,uint8_t *u8TxPacket, int len); IVEC_CoreStatus_e xMCU_i2cWriteMcal(I2C_Regs *I2C_inst,uint8_t u8addr ,uint8_t *u8TxPacket, int len);
xCoreStatus_t xMCU_i2cReadMcal(I2C_Regs *I2C_inst, uint8_t u8addr, int len); IVEC_CoreStatus_e xMCU_i2cReadMcal(I2C_Regs *I2C_inst, uint8_t u8addr, int len);
xCoreStatus_t xMCU_i2cDevReadyMcal(I2C_Regs *I2C_inst,uint8_t u8addr); IVEC_CoreStatus_e xMCU_i2cDevReadyMcal(I2C_Regs *I2C_inst,uint8_t u8addr);
xCoreStatus_t xMcal_I2C_getData(I2C_Regs *I2C_inst, uint8_t *u8RxData, uint8_t len); IVEC_CoreStatus_e xMcal_I2C_getData(I2C_Regs *I2C_inst, uint8_t *u8RxData, uint8_t len);
xCoreStatus_t xMCAL_I2C_deinit(I2C_Regs *I2C_inst); IVEC_CoreStatus_e xMCAL_I2C_deinit(I2C_Regs *I2C_inst);
#endif /* CORE_INCLUDE_IVEC_MCAL_I2C_H_ */ #endif /* CORE_INCLUDE_IVEC_MCAL_I2C_H_ */

47
Core/Include/ivec_mcal_mcan.h
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@ -1,23 +1,40 @@
#ifndef CORE_INCLUDE_IVEC_MCAL_MCAN_H_ #ifndef CORE_INCLUDE_IVEc_MCAL_MCAN_H_
#define CORE_INCLUDE_IVEC_MCAL_MCAN_H_ #define CORE_INCLUDE_IVEc_MCAL_MCAN_H_
#include "..\utils\utils.h" #include "..\utils\utils.h"
#include "ti_msp_dl_config.h" #include "ti_msp_dl_config.h"
/* Enum for CAN ID Types */
typedef enum { typedef enum {
STD_ID = 0x00, EXT_ID = 0x01, ERROR = 0x02 IVEC_MCAL_CAN_ID_STD = 0x00, /* Standard ID */
} xCanIdType_t; IVEC_MCAL_CAN_ID_EXT = 0x01, /* Extended ID */
IVEC_MCAL_CAN_ID_ERROR = 0x02 /* Error ID */
} xMCAL_CanIdType_e;
/* Function Prototypes for MCAN MCAL Layer */
IVEC_McalStatus_e xMCAL_MCANInit(MCAN_Regs* const mcan, xCAN_baud_t BAUD); /* Initialize the MCAN module */
IVEC_McalStatus_e xMCAL_MCANDeInit(MCAN_Regs* const mcan); IVEC_McalStatus_e vMCAL_MCAN_Init(MCAN_Regs* pMCAN, IVEC_CanBaud_e eBaudRate);
//IVEC_McalStatus_e xMCAL_MCANTx(MCAN_Regs *MCAN, uint32_t u32ID ,uint16_t *TxData, uint32_t BufNum, uint32_t Bytes);
IVEC_McalStatus_e xMCAL_MCANTx(MCAN_Regs *MCAN, uint32_t u32ID ,uint16_t *TxData, uint32_t BufNum, uint32_t Bytes);
IVEC_McalStatus_e xMCAL_MCANTxBlocking(MCAN_Regs *MCAN, uint32_t u32ID ,uint16_t *TxData, uint32_t BufNum, int Bytes);
IVEC_McalStatus_e xMCAL_MCANRx(MCAN_Regs *MCAN,uint32_t *ID ,uint8_t *RxData, int DLC);
IVEC_McalStatus_e xMCAL_getMCAN_ErrorStatus(char *ErrorStatus);
IVEC_McalStatus_e xMCAL_getMCAN_InterruptLine1Status(uint32_t *Interrupt_Status);
IVEC_McalStatus_e xMCAL_resetMCAN(MCAN_Regs* const mcan, xCAN_baud_t BAUD);
#endif /* CORE_INCLUDE_IVEC_MCAL_MCAN_H_ */ /* Deinitialize the MCAN module */
IVEC_McalStatus_e vMCAL_MCAN_DeInit(MCAN_Regs* const pMCAN);
/* Transmit data via MCAN */
IVEC_McalStatus_e vMCAL_MCAN_Tx(MCAN_Regs* const pMCAN, uint32_t u32Id, uint16_t* pu16TxData, uint32_t u32BufNum, uint32_t u32Bytes);
/* Transmit data via MCAN in blocking mode */
IVEC_McalStatus_e vMCAL_MCAN_TxBlocking(MCAN_Regs* const pMCAN, uint32_t u32Id, uint16_t* pu16TxData, uint32_t u32BufNum, int iBytes);
/* Receive data via MCAN */
IVEC_McalStatus_e vMCAL_MCAN_Rx(MCAN_Regs* const pMCAN, uint32_t* pu32Id, uint8_t* pu8RxData, int iDLC);
/* Get the error status of the MCAN module */
IVEC_McalStatus_e vMCAL_MCAN_GetErrorStatus(char* pcErrorStatus);
/* Get interrupt status of MCAN Interrupt Line 1 */
IVEC_McalStatus_e vMCAL_MCAN_GetInterruptLine1Status(uint32_t* pu32InterruptStatus);
/* Reset the MCAN module */
IVEC_McalStatus_e vMCAL_MCAN_Reset(MCAN_Regs* const pMCAN, IVEC_CanBaud_e eBaudRate);
#endif /* CORE_INCLUDE_IVEc_MCAL_MCAN_H_ */

6
Core/Include/ivec_mcal_spi.h
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@ -17,8 +17,8 @@
#include "ti_msp_dl_config.h" #include "ti_msp_dl_config.h"
#include "../utils/utils.h" #include "../utils/utils.h"
xCoreStatus_t xMCAL_SPI_init(SPI_Regs *SPI_inst, xSPI_CS_t xCS ); IVEC_CoreStatus_e xMCAL_SPI_init(SPI_Regs *SPI_inst, IVEC_SpiCs_e xCS );
xCoreStatus_t xMCAL_SPI_TxData(SPI_Regs *SPI_inst, uint8_t *u8SPI_TxData, uint8_t * u8SPI_RxData,uint8_t size); IVEC_CoreStatus_e xMCAL_SPI_TxData(SPI_Regs *SPI_inst, uint8_t *u8SPI_TxData, uint8_t * u8SPI_RxData,uint8_t size);
xCoreStatus_t xMCAL_SPI_deinit(SPI_Regs *SPI_inst); IVEC_CoreStatus_e xMCAL_SPI_deinit(SPI_Regs *SPI_inst);
#endif /* CORE_INCLUDE_IVEC_MCAL_SPI_H_ */ #endif /* CORE_INCLUDE_IVEC_MCAL_SPI_H_ */

134
Core/Include/ivec_mcal_uart.h
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@ -1,106 +1,104 @@
#ifndef CORE_INCLUDE_IVEC_MCAL_UART_H_ #ifndef CORE_INCLUDE_IVEC_MCAL_UART_H_
#define CORE_INCLUDE_IVEC_MCAL_UART_H_ #define CORE_INCLUDE_IVEC_MCAL_UART_H_
//#include "ivec_mcal_uart.h"
#include "ti_msp_dl_config.h" #include "ti_msp_dl_config.h"
#include "../utils/utils.h" #include "../utils/utils.h"
#include <stdint.h> #include <stdint.h>
//#ifndef IVEC_MCAL_UART_H
//#define IVEC_MCAL_UART_H
#include "ivec_mcal_common.h" #include "ivec_mcal_common.h"
//#include "ql_uart.h"
typedef enum typedef enum
{ {
mcalUART_BAUD_AUTO = 0, eMcalUartBaudAuto = 0,
mcalUART_BAUD_2400 = 2400, eMcalUartBaud2400 = 2400,
mcalUART_BAUD_4800 = 4800, eMcalUartBaud4800 = 4800,
mcalUART_BAUD_9600 = 9600, eMcalUartBaud9600 = 9600,
mcalUART_BAUD_14400 = 14400, eMcalUartBaud14400 = 14400,
mcalUART_BAUD_19200 = 19200, eMcalUartBaud19200 = 19200,
mcalUART_BAUD_28800 = 28800, eMcalUartBaud28800 = 28800,
mcalUART_BAUD_33600 = 33600, eMcalUartBaud33600 = 33600,
mcalUART_BAUD_38400 = 38400, eMcalUartBaud38400 = 38400,
mcalUART_BAUD_57600 = 57600, eMcalUartBaud57600 = 57600,
mcalUART_BAUD_115200 = 115200, eMcalUartBaud115200 = 115200,
mcalUART_BAUD_230400 = 230400, eMcalUartBaud230400 = 230400,
mcalUART_BAUD_460800 = 460800, eMcalUartBaud460800 = 460800,
mcalUART_BAUD_921600 = 921600, eMcalUartBaud921600 = 921600,
mcalUART_BAUD_1000000 = 1000000, eMcalUartBaud1000000 = 1000000,
mcalUART_BAUD_1843200 = 1843200, eMcalUartBaud1843200 = 1843200,
mcalUART_BAUD_2000000 = 2000000, //only support uart2/3 eMcalUartBaud2000000 = 2000000,
mcalUART_BAUD_2100000 = 2100000, eMcalUartBaud2100000 = 2100000,
mcalUART_BAUD_3686400 = 3686400, //only support uart2/3 eMcalUartBaud3686400 = 3686400,
mcalUART_BAUD_4000000 = 4000000, //only support uart2/3 eMcalUartBaud4000000 = 4000000,
mcalUART_BAUD_4468750 = 4468750 //only support uart2/3 eMcalUartBaud4468750 = 4468750
}McalUartBaudRate_e; } eMcalUartBaudRate;
typedef enum typedef enum
{ {
mcalUART_DATABIT_7 = 7, eMcalUartDataBit7 = 7,
mcalUART_DATABIT_8 = 8, //8910 ARM UART hardware only support 8bit Data eMcalUartDataBit8 = 8
}McalUartDataBit_e; } eMcalUartDataBit;
typedef enum typedef enum
{ {
mcalUART_STOP_1 = 1, eMcalUartStopBit1 = 1,
mcalUART_STOP_2 = 2, eMcalUartStopBit2 = 2
}McalUartStopBit_e; } eMcalUartStopBit;
typedef enum typedef enum
{ {
mcalUART_PARITY_NONE, eMcalUartParityNone,
mcalUART_PARITY_ODD, eMcalUartParityOdd,
mcalUART_PARITY_EVEN, eMcalUartParityEven
}McalUartParityBit_e; } eMcalUartParityBit;
typedef enum typedef enum
{ {
mcalUART_FC_NONE = 0, eMcalUartFcNone = 0,
mcalUARTFC_HW, eMcalUartFcHw
}McalUartFlowCtrl_e; } eMcalUartFlowCtrl;
typedef struct typedef struct
{ {
McalUartBaudRate_e eUartBaudrate; eMcalUartBaudRate eUartBaudrate;
McalUartDataBit_e eUartDataBit; eMcalUartDataBit eUartDataBit;
McalUartStopBit_e eUartStopBit; eMcalUartStopBit eUartStopBit;
McalUartParityBit_e eUartParityBit; eMcalUartParityBit eUartParityBit;
McalUartFlowCtrl_e eUartFlowCtrl; eMcalUartFlowCtrl eUartFlowCtrl;
}McalUartConfig_s; } xMcalUartConfig;
typedef enum typedef enum
{ {
mcalUART_PORT1 = 0, eMcalUartPort1 = 0,
mcalUART_PORT2, eMcalUartPort2,
mcalUART_PORT3, eMcalUartPort3,
mcalUART_PORT_MAX eMcalUartPortMax
}McalUartPortNumber_e; } eMcalUartPortNumber;
#define IVEC_MCAL_GNSS_UART mcalUART_PORT3
#define IVEC_MCAL_GNSS_UART eMcalUartPort3
typedef enum typedef enum
{ {
IVEC_MCAL_UART_EVENT_RX_ARRIVED = 1,//(1 << 0), ///< Received new data eIvecMcalUartEventRxArrived = 1, ///< Received new data
IVEC_MCAL_UART_EVENT_RX_OVERFLOW =2 ,//(1 << 1), ///< Rx fifo overflowed eIvecMcalUartEventRxOverflow = 2, ///< Rx FIFO overflowed
IVEC_MCAL_UART_EVENT_TX_COMPLETE = 3//(1 << 2) ///< All data had been sent eIvecMcalUartEventTxComplete = 3 ///< All data had been sent
}IVEC_McalUartEvents_e; } eIvecMcalUartEvents;
typedef struct typedef struct
{ {
McalUartPortNumber_e eUartPortNumber; eMcalUartPortNumber eUartPortNumber;
McalUartConfig_s xUartConfig; xMcalUartConfig xUartConfig;
char* buffer; char* pcBuffer;
uint16_t u16len; uint16_t u16Length;
void (*pvUartRecvCallback)(McalUartPortNumber_e, IVEC_McalUartEvents_e , char *,uint32_t); void (*pvUartRecvCallback)(eMcalUartPortNumber, eIvecMcalUartEvents, char*, uint32_t);
}McalUartHandle_s; } xMcalUartHandle;
#define IVEC_MCAL_UART_MAX_PORT 3 #define IVEC_MCAL_UART_MAX_PORT 3
IVEC_McalCommonErr_e xMCAL_UartDeInit(McalUartHandle_s* pxHandleUart); /* Function Prototypes */
IVEC_McalCommonErr_e xMCAL_UartRead(McalUartHandle_s* pxHandleUart, unsigned char* pucData, unsigned int u32DataLength); IVEC_McalCommonErr_e xMCAL_UartInit(xMcalUartHandle* pxUartHandle);
IVEC_McalCommonErr_e xMCAL_UartWrite(McalUartHandle_s* pxHandleUart, unsigned char* pucData, unsigned int u32DataLength); IVEC_McalCommonErr_e xMCAL_UartDeInit(xMcalUartHandle* pxUartHandle);
IVEC_McalCommonErr_e __prvMCAL_UartPinInit(McalUartHandle_s* pxHandleUart); IVEC_McalCommonErr_e xMCAL_UartRead(xMcalUartHandle* pxUartHandle, uint8_t* pu8Data, uint32_t u32DataLength);
IVEC_McalCommonErr_e xMCAL_UartInit(McalUartHandle_s* pxHandleUart); IVEC_McalCommonErr_e xMCAL_UartWrite(xMcalUartHandle* pxUartHandle, uint8_t* pu8Data, uint32_t u32DataLength);
IVEC_McalCommonErr_e _prvMCAL_UartPinInit(xMcalUartHandle* pxUartHandle);
#endif /* CORE_INCLUDE_IVEC_MCAL_UART_H_ */
#endif /* IVEC_MCAL_UART_H */

66
Core/Source/ivec_mcal_i2c.c
View File

@ -39,7 +39,7 @@ static const DL_I2C_ClockConfig gI2C_0ClockConfig = {
static volatile uint8_t u8GlobalPacket[8]; static volatile uint8_t u8GlobalPacket[8];
static volatile xI2cControllerStatus_t xStatus_i2c = I2C_STATUS_IDLE; static volatile IVEC_I2cControllerStatus_e xStatus_i2c = IVEC_I2C_STATUS_IDLE;
/*____________________________________________________________________________________________________________________________________________________________________________________________*/ /*____________________________________________________________________________________________________________________________________________________________________________________________*/
@ -52,14 +52,14 @@ void _prv_vI2C_Callback()
switch (DL_I2C_getPendingInterrupt(I2C0)) switch (DL_I2C_getPendingInterrupt(I2C0))
{ {
case DL_I2C_IIDX_CONTROLLER_RX_DONE: case DL_I2C_IIDX_CONTROLLER_RX_DONE:
xStatus_i2c = I2C_STATUS_RX_COMPLETE; xStatus_i2c = IVEC_I2C_STATUS_RX_COMPLETE;
break; break;
case DL_I2C_IIDX_CONTROLLER_TX_DONE: case DL_I2C_IIDX_CONTROLLER_TX_DONE:
DL_I2C_disableInterrupt(I2C0, DL_I2C_INTERRUPT_CONTROLLER_TXFIFO_TRIGGER); DL_I2C_disableInterrupt(I2C0, DL_I2C_INTERRUPT_CONTROLLER_TXFIFO_TRIGGER);
xStatus_i2c = I2C_STATUS_TX_COMPLETE; xStatus_i2c = IVEC_I2C_STATUS_TX_COMPLETE;
break; break;
case DL_I2C_IIDX_CONTROLLER_RXFIFO_TRIGGER: case DL_I2C_IIDX_CONTROLLER_RXFIFO_TRIGGER:
xStatus_i2c = I2C_STATUS_RX_INPROGRESS; xStatus_i2c = IVEC_I2C_STATUS_RX_INPROGRESS;
/* Receive all bytes from target */ /* Receive all bytes from target */
while (DL_I2C_isControllerRXFIFOEmpty(I2C0) != true) { while (DL_I2C_isControllerRXFIFOEmpty(I2C0) != true) {
if (i32bufferIdx0 <global_len) if (i32bufferIdx0 <global_len)
@ -75,7 +75,7 @@ void _prv_vI2C_Callback()
break; break;
case DL_I2C_IIDX_CONTROLLER_TXFIFO_TRIGGER: case DL_I2C_IIDX_CONTROLLER_TXFIFO_TRIGGER:
xStatus_i2c = I2C_STATUS_TX_INPROGRESS; xStatus_i2c = IVEC_I2C_STATUS_TX_INPROGRESS;
/* Fill TX FIFO with next bytes to send */ /* Fill TX FIFO with next bytes to send */
if (i32TempCount < global_len) if (i32TempCount < global_len)
{ {
@ -86,9 +86,9 @@ void _prv_vI2C_Callback()
__asm("nop"); __asm("nop");
break; break;
case DL_I2C_IIDX_CONTROLLER_NACK: /* NACK interrupt if I2C Target is disconnected */ case DL_I2C_IIDX_CONTROLLER_NACK: /* NACK interrupt if I2C Target is disconnected */
if ((xStatus_i2c == I2C_STATUS_RX_STARTED) ||(xStatus_i2c == I2C_STATUS_TX_STARTED)) if ((xStatus_i2c == IVEC_I2C_STATUS_RX_STARTED) ||(xStatus_i2c == IVEC_I2C_STATUS_TX_STARTED))
{ {
xStatus_i2c = I2C_STATUS_ERROR; xStatus_i2c = IVEC_I2C_STATUS_ERROR;
} }
break; break;
default: default:
@ -98,14 +98,14 @@ void _prv_vI2C_Callback()
switch (DL_I2C_getPendingInterrupt(I2C1)) switch (DL_I2C_getPendingInterrupt(I2C1))
{ {
case DL_I2C_IIDX_CONTROLLER_RX_DONE: case DL_I2C_IIDX_CONTROLLER_RX_DONE:
xStatus_i2c = I2C_STATUS_RX_COMPLETE; xStatus_i2c = IVEC_I2C_STATUS_RX_COMPLETE;
break; break;
case DL_I2C_IIDX_CONTROLLER_TX_DONE: case DL_I2C_IIDX_CONTROLLER_TX_DONE:
DL_I2C_disableInterrupt(I2C1, DL_I2C_INTERRUPT_CONTROLLER_TXFIFO_TRIGGER); DL_I2C_disableInterrupt(I2C1, DL_I2C_INTERRUPT_CONTROLLER_TXFIFO_TRIGGER);
xStatus_i2c = I2C_STATUS_TX_COMPLETE; xStatus_i2c = IVEC_I2C_STATUS_TX_COMPLETE;
break; break;
case DL_I2C_IIDX_CONTROLLER_RXFIFO_TRIGGER: case DL_I2C_IIDX_CONTROLLER_RXFIFO_TRIGGER:
xStatus_i2c = I2C_STATUS_RX_INPROGRESS; xStatus_i2c = IVEC_I2C_STATUS_RX_INPROGRESS;
/* Receive all bytes from target */ /* Receive all bytes from target */
while (DL_I2C_isControllerRXFIFOEmpty(I2C1) != true) { while (DL_I2C_isControllerRXFIFOEmpty(I2C1) != true) {
if (i32bufferIdx0 <global_len) if (i32bufferIdx0 <global_len)
@ -121,7 +121,7 @@ void _prv_vI2C_Callback()
break; break;
case DL_I2C_IIDX_CONTROLLER_TXFIFO_TRIGGER: case DL_I2C_IIDX_CONTROLLER_TXFIFO_TRIGGER:
xStatus_i2c = I2C_STATUS_TX_INPROGRESS; xStatus_i2c = IVEC_I2C_STATUS_TX_INPROGRESS;
/* Fill TX FIFO with next bytes to send */ /* Fill TX FIFO with next bytes to send */
if (i32TempCount < global_len) if (i32TempCount < global_len)
{ {
@ -132,9 +132,9 @@ void _prv_vI2C_Callback()
__asm("nop"); __asm("nop");
break; break;
case DL_I2C_IIDX_CONTROLLER_NACK: /* NACK interrupt if I2C Target is disconnected */ case DL_I2C_IIDX_CONTROLLER_NACK: /* NACK interrupt if I2C Target is disconnected */
if ((xStatus_i2c == I2C_STATUS_RX_STARTED) ||(xStatus_i2c == I2C_STATUS_TX_STARTED)) if ((xStatus_i2c == IVEC_I2C_STATUS_RX_STARTED) ||(xStatus_i2c == IVEC_I2C_STATUS_TX_STARTED))
{ {
xStatus_i2c = I2C_STATUS_ERROR; xStatus_i2c = IVEC_I2C_STATUS_ERROR;
} }
break; break;
default: default:
@ -165,7 +165,7 @@ void I2C1_IRQHandler()
* @param baud enum to set I2C Baud rate * @param baud enum to set I2C Baud rate
* @return xCoreStatus_t * @return xCoreStatus_t
*/ */
xCoreStatus_t xMCAL_I2C_init(I2C_Regs *I2C_inst, xI2C_baud_t baud) IVEC_CoreStatus_e xMCAL_I2C_init(I2C_Regs *I2C_inst, IVEC_I2cBaud_e baud)
{ {
assert(!(b_I2C0_INIT_FLAG == 1 && b_I2C1_INIT_FLAG == 1)); assert(!(b_I2C0_INIT_FLAG == 1 && b_I2C1_INIT_FLAG == 1));
assert(I2C_inst == I2C0 || I2C_inst == I2C1); assert(I2C_inst == I2C0 || I2C_inst == I2C1);
@ -176,12 +176,12 @@ xCoreStatus_t xMCAL_I2C_init(I2C_Regs *I2C_inst, xI2C_baud_t baud)
/* Configure Controller Mode */ /* Configure Controller Mode */
DL_I2C_resetControllerTransfer(I2C_inst); DL_I2C_resetControllerTransfer(I2C_inst);
if(baud==BAUD_400Khz) if(baud==IVEC_I2C_BAUD_400KHZ)
{ {
/* Set frequency to 400000 Hz*/ /* Set frequency to 400000 Hz*/
DL_I2C_setTimerPeriod(I2C_inst, 9); DL_I2C_setTimerPeriod(I2C_inst, 9);
} }
else if(baud==BAUD_100Khz) else if(baud==IVEC_I2C_BAUD_100KHZ)
{ {
/* Set frequency to 100000 Hz*/ /* Set frequency to 100000 Hz*/
DL_I2C_setTimerPeriod(I2C_inst, 31); DL_I2C_setTimerPeriod(I2C_inst, 31);
@ -212,7 +212,7 @@ xCoreStatus_t xMCAL_I2C_init(I2C_Regs *I2C_inst, xI2C_baud_t baud)
NVIC_EnableIRQ(I2C1_INT_IRQn); NVIC_EnableIRQ(I2C1_INT_IRQn);
b_I2C1_INIT_FLAG=1; b_I2C1_INIT_FLAG=1;
} }
return STATUS_SUCCESS; return IVEC_CORE_STATUS_SUCCESS;
} }
/** /**
@ -224,7 +224,7 @@ xCoreStatus_t xMCAL_I2C_init(I2C_Regs *I2C_inst, xI2C_baud_t baud)
* @param len Number of bytes to be written to target device * @param len Number of bytes to be written to target device
* @return xCoreStatus_t * @return xCoreStatus_t
*/ */
xCoreStatus_t xMCU_i2cWriteMcal(I2C_Regs *I2C_inst,uint8_t u8addr ,uint8_t *u8TxPacket, int len) IVEC_CoreStatus_e xMCU_i2cWriteMcal(I2C_Regs *I2C_inst,uint8_t u8addr ,uint8_t *u8TxPacket, int len)
{ {
@ -265,12 +265,12 @@ xCoreStatus_t xMCU_i2cWriteMcal(I2C_Regs *I2C_inst,uint8_t u8addr ,uint8_t *u8Tx
* This function will send Start + Stop automatically. * This function will send Start + Stop automatically.
* *
*/ */
xStatus_i2c = I2C_STATUS_TX_STARTED; xStatus_i2c = IVEC_I2C_STATUS_TX_STARTED;
while (!(DL_I2C_getControllerStatus(I2C_inst) & DL_I2C_CONTROLLER_STATUS_IDLE)); while (!(DL_I2C_getControllerStatus(I2C_inst) & DL_I2C_CONTROLLER_STATUS_IDLE));
DL_I2C_startControllerTransfer(I2C_inst, u8addr , DL_I2C_CONTROLLER_DIRECTION_TX, global_len); DL_I2C_startControllerTransfer(I2C_inst, u8addr , DL_I2C_CONTROLLER_DIRECTION_TX, global_len);
/* Wait until the Controller sends all bytes */ /* Wait until the Controller sends all bytes */
while ((xStatus_i2c != I2C_STATUS_TX_COMPLETE) && (xStatus_i2c != I2C_STATUS_ERROR)); while ((xStatus_i2c != IVEC_I2C_STATUS_TX_COMPLETE) && (xStatus_i2c != IVEC_I2C_STATUS_ERROR));
while (DL_I2C_getControllerStatus(I2C_inst) & DL_I2C_CONTROLLER_STATUS_BUSY_BUS); while (DL_I2C_getControllerStatus(I2C_inst) & DL_I2C_CONTROLLER_STATUS_BUSY_BUS);
@ -281,7 +281,7 @@ xCoreStatus_t xMCU_i2cWriteMcal(I2C_Regs *I2C_inst,uint8_t u8addr ,uint8_t *u8Tx
global_len=0; global_len=0;
return STATUS_SUCCESS; return IVEC_CORE_STATUS_SUCCESS;
} }
/** /**
@ -292,21 +292,21 @@ xCoreStatus_t xMCU_i2cWriteMcal(I2C_Regs *I2C_inst,uint8_t u8addr ,uint8_t *u8Tx
* @param len Number of bytes to Read from target device * @param len Number of bytes to Read from target device
* @return xCoreStatus_t * @return xCoreStatus_t
*/ */
xCoreStatus_t xMCU_i2cReadMcal(I2C_Regs *I2C_inst, uint8_t u8addr, int len) IVEC_CoreStatus_e xMCU_i2cReadMcal(I2C_Regs *I2C_inst, uint8_t u8addr, int len)
{ {
assert(!(b_I2C0_INIT_FLAG == 1 && b_I2C1_INIT_FLAG == 1)); assert(!(b_I2C0_INIT_FLAG == 1 && b_I2C1_INIT_FLAG == 1));
assert(I2C_inst == I2C0 || I2C_inst == I2C1); assert(I2C_inst == I2C0 || I2C_inst == I2C1);
global_len=len; global_len=len;
xStatus_i2c = I2C_STATUS_RX_STARTED; xStatus_i2c = IVEC_I2C_STATUS_RX_STARTED;
DL_I2C_startControllerTransfer(I2C_inst, u8addr, DL_I2C_CONTROLLER_DIRECTION_RX, len); DL_I2C_startControllerTransfer(I2C_inst, u8addr, DL_I2C_CONTROLLER_DIRECTION_RX, len);
/* Wait for all bytes to be received in interrupt */ /* Wait for all bytes to be received in interrupt */
while (xStatus_i2c != I2C_STATUS_RX_COMPLETE); while (xStatus_i2c != IVEC_I2C_STATUS_RX_COMPLETE);
while (DL_I2C_getControllerStatus(I2C_inst) & DL_I2C_CONTROLLER_STATUS_BUSY_BUS); while (DL_I2C_getControllerStatus(I2C_inst) & DL_I2C_CONTROLLER_STATUS_BUSY_BUS);
return STATUS_SUCCESS; return IVEC_CORE_STATUS_SUCCESS;
} }
/** /**
@ -316,7 +316,7 @@ xCoreStatus_t xMCU_i2cReadMcal(I2C_Regs *I2C_inst, uint8_t u8addr, int len)
* @param u8addr I2C Target Address * @param u8addr I2C Target Address
* @return xCoreStatus_t * @return xCoreStatus_t
*/ */
xCoreStatus_t xMCU_i2cDevReadyMcal(I2C_Regs *I2C_inst,uint8_t u8addr) IVEC_CoreStatus_e xMCU_i2cDevReadyMcal(I2C_Regs *I2C_inst,uint8_t u8addr)
{ {
assert(!(b_I2C0_INIT_FLAG == 1 && b_I2C1_INIT_FLAG == 1)); assert(!(b_I2C0_INIT_FLAG == 1 && b_I2C1_INIT_FLAG == 1));
assert(I2C_inst == I2C0 || I2C_inst == I2C1); assert(I2C_inst == I2C0 || I2C_inst == I2C1);
@ -325,13 +325,13 @@ xCoreStatus_t xMCU_i2cDevReadyMcal(I2C_Regs *I2C_inst,uint8_t u8addr)
xMCU_i2cWriteMcal(I2C_inst, u8addr, &u8DummyData, 1); xMCU_i2cWriteMcal(I2C_inst, u8addr, &u8DummyData, 1);
if(xStatus_i2c!=I2C_STATUS_TX_COMPLETE) if(xStatus_i2c!=IVEC_I2C_STATUS_TX_COMPLETE)
{ {
return STATUS_ERROR; return IVEC_CORE_STATUS_ERROR;
} }
else else
{ {
return STATUS_SUCCESS; return IVEC_CORE_STATUS_SUCCESS;
} }
} }
@ -343,7 +343,7 @@ xCoreStatus_t xMCU_i2cDevReadyMcal(I2C_Regs *I2C_inst,uint8_t u8addr)
* @param len number of bytes to be read from buffer * @param len number of bytes to be read from buffer
* @return xCoreStatus_t * @return xCoreStatus_t
*/ */
xCoreStatus_t xMcal_I2C_getData(I2C_Regs *I2C_inst, uint8_t *u8RxData, uint8_t len) IVEC_CoreStatus_e xMcal_I2C_getData(I2C_Regs *I2C_inst, uint8_t *u8RxData, uint8_t len)
{ {
assert(!(b_I2C0_INIT_FLAG == 1 && b_I2C1_INIT_FLAG == 1)); assert(!(b_I2C0_INIT_FLAG == 1 && b_I2C1_INIT_FLAG == 1));
assert(I2C_inst == I2C0 || I2C_inst == I2C1); assert(I2C_inst == I2C0 || I2C_inst == I2C1);
@ -369,10 +369,10 @@ xCoreStatus_t xMcal_I2C_getData(I2C_Regs *I2C_inst, uint8_t *u8RxData, uint8_t l
} }
return STATUS_SUCCESS; return IVEC_CORE_STATUS_SUCCESS;
} }
xCoreStatus_t xMCAL_I2C_deinit(I2C_Regs *I2C_inst) IVEC_CoreStatus_e xMCAL_I2C_deinit(I2C_Regs *I2C_inst)
{ {
assert(!(b_I2C0_INIT_FLAG == 1 && b_I2C1_INIT_FLAG == 1)); assert(!(b_I2C0_INIT_FLAG == 1 && b_I2C1_INIT_FLAG == 1));
assert(I2C_inst == I2C0 || I2C_inst == I2C1); assert(I2C_inst == I2C0 || I2C_inst == I2C1);
@ -390,7 +390,7 @@ xCoreStatus_t xMCAL_I2C_deinit(I2C_Regs *I2C_inst)
b_I2C1_INIT_FLAG=0; b_I2C1_INIT_FLAG=0;
} }
return STATUS_SUCCESS; return IVEC_CORE_STATUS_SUCCESS;
} }

1657
Core/Source/ivec_mcal_mcan.c
View File

File diff suppressed because it is too large Load Diff

20
Core/Source/ivec_mcal_spi.c
View File

@ -157,7 +157,7 @@ void _prv_vspicallback()
* @param BR enum to set SPI Bit Rate * @param BR enum to set SPI Bit Rate
* @return xCoreStatus_t * @return xCoreStatus_t
*/ */
xCoreStatus_t xMCAL_SPI_init(SPI_Regs *SPI_inst, xSPI_CS_t xCS ) IVEC_CoreStatus_e xMCAL_SPI_init(SPI_Regs *SPI_inst, IVEC_SpiCs_e xCS )
{ {
assert(SPI_inst == SPI0 || SPI_inst == SPI1); assert(SPI_inst == SPI0 || SPI_inst == SPI1);
@ -165,7 +165,7 @@ xCoreStatus_t xMCAL_SPI_init(SPI_Regs *SPI_inst, xSPI_CS_t xCS )
if(xCS!=0) if(xCS!=0)
{ {
return STATUS_INIT_FAIL; return IVEC_CORE_STATUS_INIT_FAIL;
} }
DL_SPI_setClockConfig(SPI_inst, (DL_SPI_ClockConfig *) &gSPI_0_clockConfig); DL_SPI_setClockConfig(SPI_inst, (DL_SPI_ClockConfig *) &gSPI_0_clockConfig);
DL_SPI_init(SPI_inst, (DL_SPI_Config *) &gSPI_0_config); DL_SPI_init(SPI_inst, (DL_SPI_Config *) &gSPI_0_config);
@ -204,7 +204,7 @@ xCoreStatus_t xMCAL_SPI_init(SPI_Regs *SPI_inst, xSPI_CS_t xCS )
NVIC_EnableIRQ(SPI1_INT_IRQn); NVIC_EnableIRQ(SPI1_INT_IRQn);
b_SPI1_INIT_FLAG=1; b_SPI1_INIT_FLAG=1;
} }
return STATUS_SUCCESS; return IVEC_CORE_STATUS_SUCCESS;
} }
/** /**
@ -215,7 +215,7 @@ xCoreStatus_t xMCAL_SPI_init(SPI_Regs *SPI_inst, xSPI_CS_t xCS )
* @param size Number of bytes to read * @param size Number of bytes to read
* @return xCoreStatus_t * @return xCoreStatus_t
*/ */
xCoreStatus_t _prv_xSPI_getData(SPI_Regs *SPI_inst, uint8_t *u8SPI_RxData, uint8_t size ) IVEC_CoreStatus_e _prv_xSPI_getData(SPI_Regs *SPI_inst, uint8_t *u8SPI_RxData, uint8_t size )
{ {
assert(SPI_inst == SPI0 || SPI_inst == SPI1); assert(SPI_inst == SPI0 || SPI_inst == SPI1);
assert(b_SPI0_INIT_FLAG != 0 || b_SPI1_INIT_FLAG != 0); assert(b_SPI0_INIT_FLAG != 0 || b_SPI1_INIT_FLAG != 0);
@ -245,7 +245,7 @@ xCoreStatus_t _prv_xSPI_getData(SPI_Regs *SPI_inst, uint8_t *u8SPI_RxData, uint8
} }
i32bufferIdx0=0; i32bufferIdx0=0;
i32bufferIdx1=0; i32bufferIdx1=0;
return STATUS_SUCCESS; return IVEC_CORE_STATUS_SUCCESS;
} }
/** /**
@ -256,7 +256,7 @@ xCoreStatus_t _prv_xSPI_getData(SPI_Regs *SPI_inst, uint8_t *u8SPI_RxData, uint8
* @param size Number of bytes to transmit * @param size Number of bytes to transmit
* @return xCoreStatus_t * @return xCoreStatus_t
*/ */
xCoreStatus_t xMCAL_SPI_TxData(SPI_Regs *SPI_inst, uint8_t *u8SPI_TxData, uint8_t * u8SPI_RxData,uint8_t size) IVEC_CoreStatus_e xMCAL_SPI_TxData(SPI_Regs *SPI_inst, uint8_t *u8SPI_TxData, uint8_t * u8SPI_RxData,uint8_t size)
{ {
assert(SPI_inst == SPI0 || SPI_inst == SPI1); assert(SPI_inst == SPI0 || SPI_inst == SPI1);
@ -273,7 +273,7 @@ xCoreStatus_t xMCAL_SPI_TxData(SPI_Regs *SPI_inst, uint8_t *u8SPI_TxData, uint8_
} else } else
{ {
return STATUS_ERROR; return IVEC_CORE_STATUS_ERROR;
} }
@ -281,7 +281,7 @@ xCoreStatus_t xMCAL_SPI_TxData(SPI_Regs *SPI_inst, uint8_t *u8SPI_TxData, uint8_
_prv_xSPI_getData(SPI_inst,u8SPI_RxData, size ); _prv_xSPI_getData(SPI_inst,u8SPI_RxData, size );
return STATUS_SUCCESS; return IVEC_CORE_STATUS_SUCCESS;
} }
@ -292,7 +292,7 @@ xCoreStatus_t xMCAL_SPI_TxData(SPI_Regs *SPI_inst, uint8_t *u8SPI_TxData, uint8_
* @param SPI_inst Pointer to SPI config registers * @param SPI_inst Pointer to SPI config registers
* @return xCoreStatus_t * @return xCoreStatus_t
*/ */
xCoreStatus_t xMCAL_SPI_deinit(SPI_Regs *SPI_inst) IVEC_CoreStatus_e xMCAL_SPI_deinit(SPI_Regs *SPI_inst)
{ {
assert(SPI_inst == SPI0 || SPI_inst == SPI1); assert(SPI_inst == SPI0 || SPI_inst == SPI1);
assert(b_SPI0_INIT_FLAG != 0 || b_SPI1_INIT_FLAG != 0); assert(b_SPI0_INIT_FLAG != 0 || b_SPI1_INIT_FLAG != 0);
@ -309,7 +309,7 @@ xCoreStatus_t xMCAL_SPI_deinit(SPI_Regs *SPI_inst)
DL_SPI_disablePower(SPI_inst); DL_SPI_disablePower(SPI_inst);
b_SPI1_INIT_FLAG=0; b_SPI1_INIT_FLAG=0;
} }
return STATUS_SUCCESS; return IVEC_CORE_STATUS_SUCCESS;
} }
/*____________________________________________________________________________________________________________________________________________________________________________________________*/ /*____________________________________________________________________________________________________________________________________________________________________________________________*/

600
Core/Source/ivec_mcal_uart.c
View File

@ -1,49 +1,65 @@
/*
* ivec_mcal_uart.c
*
* Created on: 28-Oct-2024
* Author: altam
*/
#include "../Core/Include/ivec_mcal_uart.h" #include "../Core/Include/ivec_mcal_uart.h"
#include "string.h" #include "string.h"
#include "../../utils/utils.h" #include "../../utils/utils.h"
//#include "ivec_mcal_uart.h"
#define LOG_STRING "ivec-mcal-uart" #define LOG_STRING "ivec-mcal-uart"
/* Global UART Handles Array */
xMcalUartHandle* gpxMcalUartHandles[IVEC_MCAL_UART_MAX_PORT] = { 0 };
/* Static Variables */
static uint32_t prv_u32DataCount = 0; /* Data count for tracking received bytes */
McalUartHandle_s* g_pxUartHandles[IVEC_MCAL_UART_MAX_PORT] = { 0 }; /* Static Function Prototypes */
static uint32_t __gprv_u32DataCount = 0; static eMcalUartPortNumber _prvMCAL_GetUartPort(UART_Regs* pxUartInstance);
static volatile uint8_t u8rxbuffer1 = 0;
static McalUartPortNumber_e GetUartPort(UART_Regs* pxUartInstance);
void UART_ReadCallback(UART_Regs* uart, uint8_t* buf, bool status) void vMCAL_UartReadCallback(UART_Regs* pxUartInstance, uint8_t* pu8Buffer, bool bStatus)
{ {
if (status == true) if (bStatus)
{ {
__gprv_u32DataCount += 1; prv_u32DataCount++;
IVEC_MCAL_LOG(LOG_STRING, "Uart Recv Callback:%d", ind_type); IVEC_MCAL_LOG(LOG_STRING, "UART Receive Callback: %d", prv_u32DataCount);
for (int i = 0;i < IVEC_MCAL_UART_MAX_PORT; i++)
for (uint32_t i = 0; i < IVEC_MCAL_UART_MAX_PORT; i++)
{ {
if (g_pxUartHandles[i] != NULL) if (gpxMcalUartHandles[i] != NULL)
{ {
if (g_pxUartHandles[i]->pvUartRecvCallback != NULL) if (gpxMcalUartHandles[i]->pvUartRecvCallback != NULL)
g_pxUartHandles[i]->pvUartRecvCallback(GetUartPort(uart), IVEC_MCAL_UART_EVENT_RX_ARRIVED, (char*)buf, 1); {
gpxMcalUartHandles[i]->pvUartRecvCallback(_prvMCAL_GetUartPort(pxUartInstance),eIvecMcalUartEventRxArrived,(char*)pu8Buffer,1);
}
break; break;
} }
} }
} }
} }
void _prv_vrxcallback(UART_Regs* pxUartInstance, uint32_t event) void prv_vRxCallback(UART_Regs* pxUartInstance, uint32_t u32Event)
{ {
switch (event) switch (u32Event)
{ {
case DL_UART_MAIN_IIDX_RX: case DL_UART_MAIN_IIDX_RX:
{ {
uint8_t l_pu8Buffer[64] = { 0 }; // Adjust size as needed uint8_t u8RxBuffer[64] = { 0 }; // Adjust size as needed
uint32_t bytesRead; uint32_t u32BytesRead = 0;
// Drain the RX FIFO and store the data in buffer // Drain the RX FIFO and store the data in buffer
bytesRead = DL_UART_drainRXFIFO(pxUartInstance, l_pu8Buffer, sizeof(l_pu8Buffer)); u32BytesRead = DL_UART_drainRXFIFO(pxUartInstance, u8RxBuffer, sizeof(u8RxBuffer));
// Clear the RX interrupt flag
DL_UART_clearInterruptStatus(pxUartInstance, DL_UART_MAIN_IIDX_RX); DL_UART_clearInterruptStatus(pxUartInstance, DL_UART_MAIN_IIDX_RX);
for (int ijk = 0; ijk < bytesRead; ijk++)
UART_ReadCallback(pxUartInstance, &l_pu8Buffer[ijk], true); // Process each byte of received data
for (uint32_t u32Index = 0; u32Index < u32BytesRead; u32Index++)
{
vMCAL_UartReadCallback(pxUartInstance, &u8RxBuffer[u32Index], true);
}
break; break;
} }
case DL_UART_MAIN_IIDX_OVERRUN_ERROR: case DL_UART_MAIN_IIDX_OVERRUN_ERROR:
@ -75,69 +91,85 @@ void _prv_vrxcallback(UART_Regs* pxUartInstance, uint32_t event)
} }
} }
void UART0_IRQHandler() void UART0_IRQHandler()
{ {
_prv_vrxcallback(UART0, DL_UART_Main_getPendingInterrupt(UART0)); prv_vRxCallback(UART0, DL_UART_Main_getPendingInterrupt(UART0));
} }
void UART1_IRQHandler() void UART1_IRQHandler()
{ {
_prv_vrxcallback(UART1, DL_UART_Main_getPendingInterrupt(UART1)); prv_vRxCallback(UART1, DL_UART_Main_getPendingInterrupt(UART1));
} }
void UART2_IRQHandler() void UART2_IRQHandler()
{ {
_prv_vrxcallback(UART2, DL_UART_Main_getPendingInterrupt(UART2)); prv_vRxCallback(UART2, DL_UART_Main_getPendingInterrupt(UART2));
} }
/**
// Get the UART instance based on the enum * @brief Get the UART instance based on the enum.
static UART_Regs* GetUartInstance(McalUartPortNumber_e eUartPortNumber) *
* @param eUartPortNumber UART port number enumeration.
* @return UART_Regs* Pointer to the UART registers.
*/
static UART_Regs* _prvMCAL_GetUartInstance(eMcalUartPortNumber eUartPortNumber)
{ {
switch (eUartPortNumber) switch (eUartPortNumber)
{ {
case mcalUART_PORT1: case eMcalUartPort1:
return UART0; return UART0;
case mcalUART_PORT2: case eMcalUartPort2:
return UART1; return UART1;
case mcalUART_PORT3: case eMcalUartPort3:
return UART2; return UART2;
default: default:
return NULL; // Invalid UART port return NULL; // Invalid UART port
} }
} }
static McalUartPortNumber_e GetUartPort(UART_Regs* pxUartInstance)
/**
* @brief Get the UART port based on the instance.
*
* @param pxUartInstance Pointer to the UART registers.
* @return eMcalUartPortNumber UART port number enumeration.
*/
static eMcalUartPortNumber _prvMCAL_GetUartPort(UART_Regs* pxUartInstance)
{ {
switch ((uint32_t)pxUartInstance) switch ((uint32_t)pxUartInstance)
{ {
case (uint32_t)UART0: case (uint32_t)UART0:
return mcalUART_PORT1; return eMcalUartPort1;
case (uint32_t)UART1: case (uint32_t)UART1:
return mcalUART_PORT2; return eMcalUartPort2;
case (uint32_t)UART2: case (uint32_t)UART2:
return mcalUART_PORT3; return eMcalUartPort3;
default: default:
return mcalUART_PORT_MAX; // Invalid UART port return eMcalUartPortMax; // Invalid UART port
} }
} }
static xCoreStatus_t uart_deinit(McalUartHandle_s* pxUartHandle) /**
* @brief Private function to deinitialize UART instance.
*
* @param pxUartHandle Pointer to \link xMcalUartHandle \endlink.
* @return IVEC_CoreStatus_e Status of the UART deinitialization.
*/
static IVEC_CoreStatus_e _prvMCAL_UartDeInitInstance(xMcalUartHandle* pxUartHandle)
{ {
// Get the UART instance based on the port number in the handle // Get the UART instance based on the port number in the handle
UART_Regs* uart_inst = GetUartInstance(pxUartHandle->eUartPortNumber); UART_Regs* pxUARTInstance = _prvMCAL_GetUartInstance(pxUartHandle->eUartPortNumber);
// Check if the UART instance is valid // Check if the UART instance is valid
if (uart_inst == NULL) if (pxUARTInstance == NULL)
{ {
return STATUS_ERROR; return IVEC_CORE_STATUS_ERROR;
} }
// Disable UART instance // Disable UART instance
DL_UART_Main_disable(uart_inst); DL_UART_Main_disable(pxUARTInstance);
// Disable interrupts for the UART instance // Disable interrupts for the UART instance
DL_UART_Main_disableInterrupt(uart_inst, DL_UART_Main_disableInterrupt(pxUARTInstance,
DL_UART_MAIN_INTERRUPT_BREAK_ERROR | DL_UART_MAIN_INTERRUPT_BREAK_ERROR |
DL_UART_MAIN_INTERRUPT_FRAMING_ERROR | DL_UART_MAIN_INTERRUPT_FRAMING_ERROR |
DL_UART_MAIN_INTERRUPT_NOISE_ERROR | DL_UART_MAIN_INTERRUPT_NOISE_ERROR |
@ -147,19 +179,19 @@ static xCoreStatus_t uart_deinit(McalUartHandle_s* pxUartHandle)
DL_UART_MAIN_INTERRUPT_RX_TIMEOUT_ERROR); DL_UART_MAIN_INTERRUPT_RX_TIMEOUT_ERROR);
// Clear and disable NVIC interrupt requests based on UART instance // Clear and disable NVIC interrupt requests based on UART instance
if (uart_inst == UART0) if (pxUARTInstance == UART0)
{ {
NVIC_DisableIRQ(UART0_INT_IRQn); NVIC_DisableIRQ(UART0_INT_IRQn);
NVIC_ClearPendingIRQ(UART0_INT_IRQn); NVIC_ClearPendingIRQ(UART0_INT_IRQn);
// Reset the UART0 init flag if needed (b_UART0_init_flag = 0) // Reset the UART0 init flag if needed (b_UART0_init_flag = 0)
} }
else if (uart_inst == UART1) else if (pxUARTInstance == UART1)
{ {
NVIC_DisableIRQ(UART1_INT_IRQn); NVIC_DisableIRQ(UART1_INT_IRQn);
NVIC_ClearPendingIRQ(UART1_INT_IRQn); NVIC_ClearPendingIRQ(UART1_INT_IRQn);
// Reset the UART1 init flag if needed (b_UART1_init_flag = 0) // Reset the UART1 init flag if needed (b_UART1_init_flag = 0)
} }
else if (uart_inst == UART2) else if (pxUARTInstance == UART2)
{ {
NVIC_DisableIRQ(UART2_INT_IRQn); NVIC_DisableIRQ(UART2_INT_IRQn);
NVIC_ClearPendingIRQ(UART2_INT_IRQn); NVIC_ClearPendingIRQ(UART2_INT_IRQn);
@ -167,318 +199,347 @@ static xCoreStatus_t uart_deinit(McalUartHandle_s* pxUartHandle)
} }
// Optionally, reset the UART clock configuration if needed // Optionally, reset the UART clock configuration if needed
DL_UART_Main_setClockConfig(uart_inst, NULL); DL_UART_Main_setClockConfig(pxUARTInstance, NULL);
return STATUS_SUCCESS; return IVEC_CORE_STATUS_SUCCESS;
} }
/** /**
* @brief Function to De-init UART Peripheral. * @brief Function to deinitialize the UART peripheral.
* @warning Donot call if UART is not initilized earlier. *
* @param pxUartHandle pointer to \link McalUartHandle_s \endlink * @param pxUartHandle Pointer to \link xMcalUartHandle \endlink.
* @return \link IVEC_McalCommonErr_e \endlink returns a status based on the success or failure of the UART De-Init operation. * @return IVEC_McalCommonErr_e Returns a status based on the success or failure of the UART deinitialization operation.
*/ */
IVEC_McalCommonErr_e xMCAL_UartDeInit(McalUartHandle_s* pxUartHandle) IVEC_McalCommonErr_e xMCAL_UartDeInit(xMcalUartHandle* pxUartHandle)
{ {
int l_i32Ret; IVEC_CoreStatus_e xRetStatus;
IVEC_MCAL_FUNC_ENTRY(LOG_STRING); IVEC_MCAL_FUNC_ENTRY(LOG_STRING);
IVEC_McalCommonErr_e l_xFuncStatus = commonMCAL_SUCCESS; IVEC_McalCommonErr_e eFuncStatus = commonMCAL_SUCCESS;
// Check for null pointer
if (pxUartHandle == NULL) if (pxUartHandle == NULL)
{ {
l_xFuncStatus = commonMCAL_INVALID_PARAM; eFuncStatus = commonMCAL_INVALID_PARAM;
goto exit; goto exit;
} }
l_i32Ret = uart_deinit(pxUartHandle);
IVEC_MCAL_LOG(LOG_STRING, "DeInitilising UART status %d", l_i32Ret); // Call the private deinit function
if (l_i32Ret != STATUS_SUCCESS) xRetStatus = _prvMCAL_UartDeInitInstance(pxUartHandle);
IVEC_MCAL_LOG(LOG_STRING, "Deinitializing UART status: %d", xRetStatus);
// Check the return status
if (xRetStatus != IVEC_CORE_STATUS_SUCCESS)
{ {
l_xFuncStatus = commonMCAL_DEINIT_FAIL; eFuncStatus = commonMCAL_DEINIT_FAIL;
goto exit; goto exit;
} }
exit: exit:
IVEC_MCAL_FUNC_EXIT(LOG_STRING); IVEC_MCAL_FUNC_EXIT(LOG_STRING);
return l_xFuncStatus; return eFuncStatus;
} }
/////////////////////////////////////////////////////////////////////// ///////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////// //////////////////////////////////////////////////////////////////////
/**
* @brief Internal function to read a single byte from UART.
static xCoreStatus_t uart_read(McalUartHandle_s* pxUartHandle, unsigned char* pucData) * @param [in] pxUartHandle Pointer to \link McalUartHandle_t \endlink.
* @param [out] pucData Pointer to store the received byte.
* @return \link CoreStatus_t \endlink Returns CORE_STATUS_SUCCESS on success or CORE_STATUS_ERROR on failure.
*/
static IVEC_McalCommonErr_e prvIvecMcalUart_ReadByte(xMcalUartHandle* pxUartHandle, uint8_t* pucData)
{ {
// Get the UART instance based on the port number in the handle /* Get the UART instance based on the port number in the handle */
UART_Regs* uart_inst = GetUartInstance(pxUartHandle->eUartPortNumber); UART_Regs* pUartInstance = _prvMCAL_GetUartInstance(pxUartHandle->eUartPortNumber);
// Check if the UART instance is valid /* Check if the UART instance is valid */
if (uart_inst == NULL) if (pUartInstance == NULL)
{ {
return STATUS_ERROR; return commonMCAL_FAIL;
} }
bool status = false; bool bDataReceived = false;
uint32_t l_u32Tick = i32MCAL_getTicks(); uint32_t u32StartTick = i32MCAL_GetTicks();
while (!DL_UART_Main_isRXFIFOEmpty(uart_inst) && ((i32MCAL_getTicks() - l_u32Tick) < 50)) {
*pucData = DL_UART_Main_receiveData(uart_inst);
status = true;
}
//*pucData = DL_UART_receiveData(uart_inst); /* Wait until data is received or timeout occurs */
while (!DL_UART_isTXFIFOEmpty(pUartInstance) &&
if (status == false) ((i32MCAL_GetTicks() - u32StartTick) < 50))
{ {
return STATUS_ERROR; *pucData = DL_UART_Main_receiveData(pUartInstance);
bDataReceived = true;
} }
return STATUS_SUCCESS; /* Return error if no data was received */
if (!bDataReceived)
{
return commonMCAL_FAIL;
}
return commonMCAL_SUCCESS;
} }
/** /**
* @brief Function to Read data at from UART Port * @brief Reads data from the UART port.
* @pre UART should be initilized first. * @pre UART should be initialized before calling this function.
* @param [in] pxUartHandle pointer to \link McalUartHandle_s \endlink * @param [in] pxUartHandle Pointer to \link McalUartHandle_t \endlink.
* @param [in] pucData pointer to unsigned char. Used to read data from UART. * @param [out] pucData Pointer to buffer for storing received data.
* @param [in] u32DataLength Length of the data to read. * @param [in] u32DataLength Length of the data to read.
* @return \link IVEC_McalCommonErr_e \endlink returns a status based on the success or failure of the UART Read operation. * @return \link IvecMcalCommonErr_t \endlink Returns the status of the UART read operation.
*/ */
IVEC_McalCommonErr_e xMCAL_UartRead(McalUartHandle_s* pxUartHandle, unsigned char* pucData, unsigned int u32DataLength) IVEC_McalCommonErr_e xIvecMcalUart_Read(xMcalUartHandle* pxUartHandle, uint8_t* pucData, uint32_t u32DataLength)
{ {
int l_i32Ret; int32_t i32RetVal;
IVEC_McalCommonErr_e eFuncStatus = commonMCAL_SUCCESS;
IVEC_MCAL_FUNC_ENTRY(LOG_STRING); IVEC_MCAL_FUNC_ENTRY(LOG_STRING);
IVEC_McalCommonErr_e l_xFuncStatus = commonMCAL_SUCCESS;
/* Validate the UART handle */
if (pxUartHandle == NULL) if (pxUartHandle == NULL)
{ {
l_xFuncStatus = commonMCAL_INVALID_PARAM; eFuncStatus = commonMCAL_INVALID_PARAM;
goto exit; goto exit;
} }
l_i32Ret = uart_read(pxUartHandle, pucData);
IVEC_MCAL_LOG(LOG_STRING, "Reading UART status %d", l_i32Ret); /* Attempt to read a single byte from UART */
if (l_i32Ret == STATUS_ERROR) i32RetVal = prvIvecMcalUart_ReadByte(pxUartHandle, pucData);
/* Log the read operation status */
IVEC_MCAL_LOG(LOG_STRING, "UART read status: %d", i32RetVal);
/* Check if the read operation failed */
if (i32RetVal == commonMCAL_SUCCESS)
{ {
l_xFuncStatus = commonMCAL_READ_FAIL; eFuncStatus = commonMCAL_FAIL;
goto exit; goto exit;
} }
exit: exit:
IVEC_MCAL_FUNC_EXIT(LOG_STRING); IVEC_MCAL_FUNC_EXIT(LOG_STRING);
return l_xFuncStatus; return eFuncStatus;
} }
/////////////////////////////////////////////////////////////////////////////////////// ///////////////////////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////////////////// ////////////////////////////////////////////////////////////////////////////////////
static xCoreStatus_t uart_transmit(McalUartHandle_s* pxUartHandle, uint8_t* u8txdata, uint32_t u32size)
{
// Get the UART instance based on the port number in the handle
UART_Regs* uart_inst = GetUartInstance(pxUartHandle->eUartPortNumber);
// Check if the UART instance is valid
if (uart_inst == NULL || u32size == 0)
{
return STATUS_ERROR;
}
uint32_t l_u32Tick = i32MCAL_getTicks();
for (int j = 0; j < u32size; j++)
{
DL_UART_transmitData(uart_inst, u8txdata[j]);
while (DL_UART_isTXFIFOFull(uart_inst) && ((i32MCAL_getTicks() - l_u32Tick) < 100));
}
return STATUS_SUCCESS;
}
/** /**
* @brief Function to Write data at UART Port * @brief Static function to transmit data over UART.
* @pre UART should be initilized first. * @param [in] pxUartHandle Pointer to UART handle structure.
* @param [in] pxUartHandle pointer to \link McalUartHandle_s \endlink * @param [in] pu8TxData Pointer to the data buffer to transmit.
* @param [in] pucData pointer to unsigned char. Used to send data to UART. * @param [in] u32Size Number of bytes to transmit.
* @param [in] u32DataLength Length of the Data that need to be write. * @return xCoreStatus_t Status of the transmission (STATUS_SUCCESS or STATUS_ERROR).
* @return \link IVEC_McalCommonErr_e \endlink returns a status based on the success or failure of the UART Write operation.
*/ */
IVEC_McalCommonErr_e xMCAL_UartWrite(McalUartHandle_s* pxUartHandle, unsigned char* pucData, unsigned int u32DataLength) static IVEC_CoreStatus_e _prvMCAL_UartTransmit(xMcalUartHandle* pxUartHandle, uint8_t* pu8TxData, uint32_t u32Size)
{ {
int l_i32Ret; /* Retrieve UART instance based on the port number */
UART_Regs* pxUartInstance = _prvMCAL_GetUartInstance(pxUartHandle->eUartPortNumber);
/* Validate the UART instance and data size */
if (pxUartInstance == NULL || u32Size == 0)
{
return IVEC_CORE_STATUS_ERROR;
}
/* Track transmission timeout */
uint32_t u32TickStart = i32MCAL_GetTicks();
for (uint32_t u32Index = 0; u32Index < u32Size; u32Index++)
{
/* Transmit data byte */
DL_UART_transmitData(pxUartInstance, pu8TxData[u32Index]);
/* Wait for TX FIFO to become available, with timeout */
while (DL_UART_isTXFIFOFull(pxUartInstance) &&
((i32MCAL_GetTicks() - u32TickStart) < 100));
}
return IVEC_CORE_STATUS_SUCCESS;
}
/**
* @brief Function to write data to the UART port.
* @pre UART must be initialized before calling this function.
* @param [in] pxUartHandle Pointer to UART handle structure.
* @param [in] pu8Data Pointer to the data buffer to send.
* @param [in] u32DataLength Length of the data to be sent.
* @return IVEC_McalCommonErr_e Status of the write operation.
*/
IVEC_McalCommonErr_e xMCAL_UartWrite(xMcalUartHandle* pxUartHandle, uint8_t* pu8Data, uint32_t u32DataLength)
{
IVEC_McalCommonErr_e eFuncStatus = commonMCAL_SUCCESS;
int32_t i32Ret;
/* Log function entry */
IVEC_MCAL_FUNC_ENTRY(LOG_STRING); IVEC_MCAL_FUNC_ENTRY(LOG_STRING);
IVEC_McalCommonErr_e l_xFuncStatus = commonMCAL_SUCCESS;
/* Validate input parameters */
if (pxUartHandle == NULL) if (pxUartHandle == NULL)
{ {
l_xFuncStatus = commonMCAL_INVALID_PARAM; eFuncStatus = commonMCAL_INVALID_PARAM;
goto exit; goto exit;
} }
l_i32Ret = uart_transmit(pxUartHandle, pucData, u32DataLength);
IVEC_MCAL_LOG(LOG_STRING, "Writing UART status %d", l_i32Ret); /* Call static transmit function */
if (l_i32Ret != STATUS_SUCCESS) i32Ret = _prvMCAL_UartTransmit(pxUartHandle, pu8Data, u32DataLength);
/* Log transmit status */
IVEC_MCAL_LOG(LOG_STRING, "UART write status: %d", i32Ret);
/* Handle transmit errors */
if (i32Ret != IVEC_CORE_STATUS_SUCCESS)
{ {
l_xFuncStatus = commonMCAL_WRITE_FAIL; eFuncStatus = commonMCAL_WRITE_FAIL;
goto exit; goto exit;
} }
exit: exit:
/* Log function exit */
IVEC_MCAL_FUNC_EXIT(LOG_STRING); IVEC_MCAL_FUNC_EXIT(LOG_STRING);
return l_xFuncStatus; return eFuncStatus;
} }
/////////////////////////////////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////////////////////////////////
static xCoreStatus_t uart_init(McalUartHandle_s* pxUartHandle, McalUartBaudRate_e xBaud)
{
if (pxUartHandle->eUartPortNumber== mcalUART_PORT2)
/////////////////////////////////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////////////////////////////////
static IVEC_CoreStatus_e prvMCAL_UART_InitInstance(xMcalUartHandle* pxUartHandle, eMcalUartBaudRate xBaud)
{
if (pxUartHandle->eUartPortNumber == eMcalUartPort2)
{ {
DL_UART_Main_reset(UART1); DL_UART_Main_reset(UART1);
DL_UART_Main_enablePower(UART1); DL_UART_Main_enablePower(UART1);
DL_GPIO_initPeripheralOutputFunction(IOMUX_PINCM19, IOMUX_PINCM19_PF_UART1_TX); DL_GPIO_initPeripheralOutputFunction(IOMUX_PINCM19, IOMUX_PINCM19_PF_UART1_TX);
DL_GPIO_initPeripheralInputFunction(IOMUX_PINCM20, IOMUX_PINCM20_PF_UART1_RX); DL_GPIO_initPeripheralInputFunction(IOMUX_PINCM20, IOMUX_PINCM20_PF_UART1_RX);
} }
else if (pxUartHandle->eUartPortNumber == eMcalUartPort3)
else if (pxUartHandle->eUartPortNumber== mcalUART_PORT3)
{ {
DL_UART_Main_reset(UART2); DL_UART_Main_reset(UART2);
DL_UART_Main_enablePower(UART2); DL_UART_Main_enablePower(UART2);
DL_GPIO_initPeripheralOutputFunction(IOMUX_PINCM32, IOMUX_PINCM32_PF_UART2_TX); DL_GPIO_initPeripheralOutputFunction(IOMUX_PINCM32, IOMUX_PINCM32_PF_UART2_TX);
DL_GPIO_initPeripheralInputFunction(IOMUX_PINCM33, IOMUX_PINCM33_PF_UART2_RX); DL_GPIO_initPeripheralInputFunction(IOMUX_PINCM33, IOMUX_PINCM33_PF_UART2_RX);
} }
// Get the UART instance based on the port number in the handle UART_Regs* pxUartInstance = _prvMCAL_GetUartInstance(pxUartHandle->eUartPortNumber);
UART_Regs* uart_inst = GetUartInstance(pxUartHandle->eUartPortNumber);
// Check if the UART instance is valid if (pxUartInstance == NULL)
if (uart_inst == NULL)
{ {
return STATUS_ERROR; return commonMCAL_FAIL;
} }
DL_UART_Config xprvUartConfig = { 0 }; DL_UART_Config xUartConfig = { 0 };
xprvUartConfig.direction = DL_UART_MAIN_DIRECTION_TX_RX; xUartConfig.direction = DL_UART_MAIN_DIRECTION_TX_RX;
xprvUartConfig.mode = DL_UART_MAIN_MODE_NORMAL; xUartConfig.mode = DL_UART_MAIN_MODE_NORMAL;
//xprvUartConfig.wordLength = pxUartHandle->xUartConfig.eUartDataBit; uint8_t ucDataLength = pxUartHandle->xUartConfig.eUartDataBit;
uint8_t datalength = pxUartHandle->xUartConfig.eUartDataBit; if (ucDataLength == eMcalUartDataBit7)
if (datalength == mcalUART_DATABIT_7)
{ {
xprvUartConfig.wordLength = DL_UART_WORD_LENGTH_7_BITS; xUartConfig.wordLength = DL_UART_WORD_LENGTH_7_BITS;
} }
else if (datalength == mcalUART_DATABIT_8) else if (ucDataLength == eMcalUartDataBit8)
{ {
xprvUartConfig.wordLength = DL_UART_WORD_LENGTH_8_BITS; xUartConfig.wordLength = DL_UART_WORD_LENGTH_8_BITS;
} }
//xprvUartConfig.stopBits = pxUartHandle->xUartConfig.eUartStopBit; uint8_t ucStopBit = pxUartHandle->xUartConfig.eUartStopBit;
uint8_t stopbit = pxUartHandle->xUartConfig.eUartStopBit; if (ucStopBit == eMcalUartStopBit1)
if (stopbit == mcalUART_STOP_1)
{ {
xprvUartConfig.stopBits = DL_UART_STOP_BITS_ONE; xUartConfig.stopBits = DL_UART_STOP_BITS_ONE;
} }
else if (stopbit == mcalUART_STOP_2) else if (ucStopBit == eMcalUartStopBit2)
{ {
xprvUartConfig.stopBits = DL_UART_STOP_BITS_TWO; xUartConfig.stopBits = DL_UART_STOP_BITS_TWO;
} }
//xprvUartConfig.parity = pxUartHandle->xUartConfig.eUartParityBit; uint8_t ucParityBit = pxUartHandle->xUartConfig.eUartParityBit;
uint8_t paritybit = pxUartHandle->xUartConfig.eUartParityBit; if (ucParityBit == eMcalUartParityNone)
if (paritybit == mcalUART_PARITY_NONE)
{ {
xprvUartConfig.parity = DL_UART_PARITY_NONE; xUartConfig.parity = DL_UART_PARITY_NONE;
} }
else if (paritybit == mcalUART_PARITY_ODD) else if (ucParityBit == eMcalUartParityOdd)
{ {
xprvUartConfig.parity = DL_UART_PARITY_ODD; xUartConfig.parity = DL_UART_PARITY_ODD;
} }
else if (paritybit == mcalUART_PARITY_EVEN) else if (ucParityBit == eMcalUartParityEven)
{ {
xprvUartConfig.parity = DL_UART_PARITY_EVEN; xUartConfig.parity = DL_UART_PARITY_EVEN;
} }
xprvUartConfig.flowControl = DL_UART_FLOW_CONTROL_NONE; xUartConfig.flowControl = DL_UART_FLOW_CONTROL_NONE;
DL_UART_ClockConfig xUartClockConfig = { 0 };
xUartClockConfig.clockSel = DL_UART_CLOCK_BUSCLK;
xUartClockConfig.divideRatio = DL_UART_MAIN_CLOCK_DIVIDE_RATIO_1;
DL_UART_Main_setClockConfig(pxUartInstance, (DL_UART_Main_ClockConfig*) &xUartClockConfig);
DL_UART_Main_init(pxUartInstance, (DL_UART_Main_Config*) &xUartConfig);
DL_UART_Main_setOversampling(pxUartInstance, DL_UART_OVERSAMPLING_RATE_16X);
DL_UART_ClockConfig gUART_0ClockConfig = { 0 }; if (xBaud == eMcalUartBaud115200)
gUART_0ClockConfig.clockSel = DL_UART_CLOCK_BUSCLK;
gUART_0ClockConfig.divideRatio = DL_UART_MAIN_CLOCK_DIVIDE_RATIO_1;
DL_UART_Main_setClockConfig(uart_inst, (DL_UART_Main_ClockConfig*)&gUART_0ClockConfig);
DL_UART_Main_init(uart_inst, (DL_UART_Main_Config*)&xprvUartConfig);
/* Configure baud rate by setting oversampling and baud rate divisors.*/
DL_UART_Main_setOversampling(uart_inst, DL_UART_OVERSAMPLING_RATE_16X);
if (xBaud == 115200)
{ {
DL_UART_Main_setBaudRateDivisor(pxUartInstance, 19, 34);
/*
* Target baud rate: 115200
* Actual baud rate: 115211.52
*/
// DL_UART_Main_setBaudRateDivisor(uart_inst, 13, 1);
//DL_UART_Main_setBaudRateDivisor(uart_inst, 19, 20);
DL_UART_Main_setBaudRateDivisor(uart_inst, 19, 34);
} }
else if (xBaud == 9600) else if (xBaud == eMcalUartBaud9600)
{ {
DL_UART_Main_setBaudRateDivisor(uart_inst, 234, 24); DL_UART_Main_setBaudRateDivisor(pxUartInstance, 234, 24);
}
else if (xBaud == eMcalUartBaud2400)
{
DL_UART_Main_setBaudRateDivisor(pxUartInstance, 937, 32);
}
else if (xBaud == eMcalUartBaud4800)
{
DL_UART_Main_setBaudRateDivisor(pxUartInstance, 468, 48);
}
else if (xBaud == eMcalUartBaud14400)
{
DL_UART_Main_setBaudRateDivisor(pxUartInstance, 156, 16);
}
else if (xBaud == eMcalUartBaud19200)
{
DL_UART_Main_setBaudRateDivisor(pxUartInstance, 117, 12);
}
else if (xBaud == eMcalUartBaud28800)
{
DL_UART_Main_setBaudRateDivisor(pxUartInstance, 78, 8);
}
else if (xBaud == eMcalUartBaud33600)
{
DL_UART_Main_setBaudRateDivisor(pxUartInstance, 66, 62);
}
else if (xBaud == eMcalUartBaud38400)
{
DL_UART_Main_setBaudRateDivisor(pxUartInstance, 58, 38);
}
else if (xBaud == eMcalUartBaud57600)
{
DL_UART_Main_setBaudRateDivisor(pxUartInstance, 39, 4);
}
else if (xBaud == eMcalUartBaud230400)
{
DL_UART_Main_setBaudRateDivisor(pxUartInstance, 9, 49);
}
else if (xBaud == eMcalUartBaud460800)
{
DL_UART_Main_setBaudRateDivisor(pxUartInstance, 4, 57);
}
else if (xBaud == eMcalUartBaud921600)
{
DL_UART_Main_setBaudRateDivisor(pxUartInstance, 2, 28);
}
else if (xBaud == eMcalUartBaud1000000)
{
DL_UART_Main_setBaudRateDivisor(pxUartInstance, 2, 16);
}
else
{
DL_UART_Main_setBaudRateDivisor(pxUartInstance, 13, 1);
} }
else if (xBaud == 2400) if (pxUartInstance == UART0)
{ {
DL_UART_Main_setBaudRateDivisor(uart_inst, 937, 32); DL_UART_Main_enableInterrupt(pxUartInstance,
}
else if (xBaud == 4800)
{
DL_UART_Main_setBaudRateDivisor(uart_inst, 468, 48);
}
else if (xBaud == 14400)
{
DL_UART_Main_setBaudRateDivisor(uart_inst, 156, 16);
}
else if (xBaud == 19200)
{
DL_UART_Main_setBaudRateDivisor(uart_inst, 117, 12);
}
else if (xBaud == 28800)
{
DL_UART_Main_setBaudRateDivisor(uart_inst, 78, 8);
}
else if (xBaud == 33600)
{
DL_UART_Main_setBaudRateDivisor(uart_inst, 66, 62);
}
else if (xBaud == 38400)
{
DL_UART_Main_setBaudRateDivisor(uart_inst, 58, 38);
}
else if (xBaud == 57600)
{
DL_UART_Main_setBaudRateDivisor(uart_inst, 39, 4);
}
else if (xBaud == 230400)
{
DL_UART_Main_setBaudRateDivisor(uart_inst, 9, 49);
}
else if (xBaud == 460800)
{
DL_UART_Main_setBaudRateDivisor(uart_inst, 4, 57);
}
else if (xBaud == 921600)
{
DL_UART_Main_setBaudRateDivisor(uart_inst, 2, 28);
}
else if (xBaud == 1000000)
{
DL_UART_Main_setBaudRateDivisor(uart_inst, 2, 16);
}
else {
/*
* Target baud rate: 115200
* Actual baud rate: 115211.52
*/
DL_UART_Main_setBaudRateDivisor(uart_inst, 13, 1);
}
/* Configure Interrupts */
if (uart_inst == UART0)
{
DL_UART_Main_enableInterrupt(uart_inst,
DL_UART_MAIN_INTERRUPT_BREAK_ERROR | DL_UART_MAIN_INTERRUPT_BREAK_ERROR |
DL_UART_MAIN_INTERRUPT_FRAMING_ERROR | DL_UART_MAIN_INTERRUPT_FRAMING_ERROR |
DL_UART_MAIN_INTERRUPT_NOISE_ERROR | DL_UART_MAIN_INTERRUPT_NOISE_ERROR |
@ -491,17 +552,13 @@ static xCoreStatus_t uart_init(McalUartHandle_s* pxUartHandle, McalUartBaudRate_
DL_UART_Main_setRXFIFOThreshold(UART0, DL_UART_RX_FIFO_LEVEL_ONE_ENTRY); DL_UART_Main_setRXFIFOThreshold(UART0, DL_UART_RX_FIFO_LEVEL_ONE_ENTRY);
DL_UART_Main_setTXFIFOThreshold(UART0, DL_UART_TX_FIFO_LEVEL_1_2_EMPTY); DL_UART_Main_setTXFIFOThreshold(UART0, DL_UART_TX_FIFO_LEVEL_1_2_EMPTY);
DL_UART_Main_enable(pxUartInstance);
DL_UART_Main_enable(uart_inst);
/*Clearing and Enabling Interrupt Requests*/
NVIC_ClearPendingIRQ(UART0_INT_IRQn); NVIC_ClearPendingIRQ(UART0_INT_IRQn);
NVIC_EnableIRQ(UART0_INT_IRQn); NVIC_EnableIRQ(UART0_INT_IRQn);
//b_UART0_init_flag=1;
} }
if (uart_inst == UART1) else if (pxUartInstance == UART1)
{ {
DL_UART_Main_enableInterrupt(uart_inst, DL_UART_Main_enableInterrupt(pxUartInstance,
DL_UART_MAIN_INTERRUPT_BREAK_ERROR | DL_UART_MAIN_INTERRUPT_BREAK_ERROR |
DL_UART_MAIN_INTERRUPT_FRAMING_ERROR | DL_UART_MAIN_INTERRUPT_FRAMING_ERROR |
DL_UART_MAIN_INTERRUPT_NOISE_ERROR | DL_UART_MAIN_INTERRUPT_NOISE_ERROR |
@ -514,18 +571,13 @@ static xCoreStatus_t uart_init(McalUartHandle_s* pxUartHandle, McalUartBaudRate_
DL_UART_Main_setRXFIFOThreshold(UART1, DL_UART_RX_FIFO_LEVEL_ONE_ENTRY); DL_UART_Main_setRXFIFOThreshold(UART1, DL_UART_RX_FIFO_LEVEL_ONE_ENTRY);
DL_UART_Main_setTXFIFOThreshold(UART1, DL_UART_TX_FIFO_LEVEL_1_2_EMPTY); DL_UART_Main_setTXFIFOThreshold(UART1, DL_UART_TX_FIFO_LEVEL_1_2_EMPTY);
DL_UART_Main_enable(pxUartInstance);
DL_UART_Main_enable(uart_inst);
/*Clearing and Enabling Interrupt Requests*/
NVIC_ClearPendingIRQ(UART1_INT_IRQn); NVIC_ClearPendingIRQ(UART1_INT_IRQn);
NVIC_EnableIRQ(UART1_INT_IRQn); NVIC_EnableIRQ(UART1_INT_IRQn);
//b_UART1_init_flag=1;
} }
else if (uart_inst == UART2) else if (pxUartInstance == UART2)
{ {
DL_UART_Main_enableInterrupt(pxUartInstance,
DL_UART_Main_enableInterrupt(uart_inst,
DL_UART_MAIN_INTERRUPT_BREAK_ERROR | DL_UART_MAIN_INTERRUPT_BREAK_ERROR |
DL_UART_MAIN_INTERRUPT_FRAMING_ERROR | DL_UART_MAIN_INTERRUPT_FRAMING_ERROR |
DL_UART_MAIN_INTERRUPT_NOISE_ERROR | DL_UART_MAIN_INTERRUPT_NOISE_ERROR |
@ -534,22 +586,16 @@ static xCoreStatus_t uart_init(McalUartHandle_s* pxUartHandle, McalUartBaudRate_
DL_UART_MAIN_INTERRUPT_RX | DL_UART_MAIN_INTERRUPT_RX |
DL_UART_MAIN_INTERRUPT_RX_TIMEOUT_ERROR); DL_UART_MAIN_INTERRUPT_RX_TIMEOUT_ERROR);
DL_UART_Main_enableFIFOs(UART2); DL_UART_Main_enableFIFOs(UART2);
DL_UART_Main_setRXFIFOThreshold(UART2, DL_UART_RX_FIFO_LEVEL_ONE_ENTRY); DL_UART_Main_setRXFIFOThreshold(UART2, DL_UART_RX_FIFO_LEVEL_ONE_ENTRY);
DL_UART_Main_setTXFIFOThreshold(UART2, DL_UART_TX_FIFO_LEVEL_1_2_EMPTY); DL_UART_Main_setTXFIFOThreshold(UART2, DL_UART_TX_FIFO_LEVEL_1_2_EMPTY);
// DL_UART_Main_setRXInterruptTimeout(UART2, 15); DL_UART_Main_enable(pxUartInstance);
DL_UART_Main_enable(uart_inst);
/*Clearing and Enabling Interrupt Requests*/
NVIC_ClearPendingIRQ(UART2_INT_IRQn); NVIC_ClearPendingIRQ(UART2_INT_IRQn);
NVIC_EnableIRQ(UART2_INT_IRQn); NVIC_EnableIRQ(UART2_INT_IRQn);
} }
return STATUS_SUCCESS;//TODO: FIX RETURN BUG return commonMCAL_SUCCESS;
} }
@ -583,9 +629,9 @@ static void __prvMCAL_UartNotifyRecvCb(uint32 ind_type, ql_uart_port_number_e po
* @param pxUartHandle pointer to \link McalUartHandle_s \endlink * @param pxUartHandle pointer to \link McalUartHandle_s \endlink
* @return Nothing * @return Nothing
*/ */
static void __prvMCAL_UartRegisterHandle(McalUartHandle_s* pxUartHandle) static void prvMCAL_UartRegisterHandle(xMcalUartHandle* pxUartHandle)
{ {
g_pxUartHandles[pxUartHandle->eUartPortNumber] = pxUartHandle; gpxMcalUartHandles[pxUartHandle->eUartPortNumber] = pxUartHandle;
} }
/** /**
* @brief Function to Init UART peripheral * @brief Function to Init UART peripheral
@ -593,7 +639,7 @@ static void __prvMCAL_UartRegisterHandle(McalUartHandle_s* pxUartHandle)
* @param pxUartHandle pointer to \link McalUartHandle_s \endlink * @param pxUartHandle pointer to \link McalUartHandle_s \endlink
* @return \link IVEC_McalCommonErr_e \endlink returns a status based on the success or failure of the UART Init operation. * @return \link IVEC_McalCommonErr_e \endlink returns a status based on the success or failure of the UART Init operation.
*/ */
IVEC_McalCommonErr_e xMCAL_UartInit(McalUartHandle_s* pxUartHandle) IVEC_McalCommonErr_e xMCAL_UartInit(xMcalUartHandle* pxUartHandle)
{ {
IVEC_MCAL_FUNC_ENTRY(LOG_STRING); IVEC_MCAL_FUNC_ENTRY(LOG_STRING);
@ -603,11 +649,11 @@ IVEC_McalCommonErr_e xMCAL_UartInit(McalUartHandle_s* pxUartHandle)
l_xFuncStatus = commonMCAL_INVALID_PARAM; l_xFuncStatus = commonMCAL_INVALID_PARAM;
goto exit; goto exit;
} }
__prvMCAL_UartRegisterHandle(pxUartHandle); prvMCAL_UartRegisterHandle(pxUartHandle);
int l_i32Ret = uart_init(pxUartHandle, pxUartHandle->xUartConfig.eUartBaudrate); int l_i32Ret = prvMCAL_UART_InitInstance(pxUartHandle, pxUartHandle->xUartConfig.eUartBaudrate);
if (l_i32Ret != STATUS_SUCCESS) if (l_i32Ret != IVEC_CORE_STATUS_SUCCESS)
{ {
l_xFuncStatus = commonMCAL_INIT_FAIL; l_xFuncStatus = commonMCAL_INIT_FAIL;
goto exit; goto exit;

53
ivec_ECU/ivec_ecu_can/inc/ivec_ecu_can.h
View File

@ -1,4 +1,5 @@
#define IVEC_ECU_CAN_H #ifndef IVEC_ECU_CAN_H_
#define IVEC_ECU_CAN_H_
#include "../Core/Include/ivec_mcal_mcan.h" #include "../Core/Include/ivec_mcal_mcan.h"
#include "../ivec_ECU/ivec_ecu_common/inc/ivec_ecu_common.h" #include "../ivec_ECU/ivec_ecu_common/inc/ivec_ecu_common.h"
@ -8,8 +9,9 @@
#include <stdlib.h> #include <stdlib.h>
#include <string.h> #include <string.h>
#define QUEUE(name, buff) \ // Macro Definitions
volatile can_queue_t name = { \ #define IVEC_ECU_CAN_QUEUE(name, buff) \
volatile IVEC_ECU_CANQueue_s name = { \
.front = 0, \ .front = 0, \
.rear = 0, \ .rear = 0, \
.size = (sizeof(buff) / sizeof(buff[0])), \ .size = (sizeof(buff) / sizeof(buff[0])), \
@ -17,54 +19,53 @@
.buffer = buff, \ .buffer = buff, \
} }
#define FLUSH(name) do { \ #define IVEC_ECU_CAN_FLUSH(name) do { \
name.front = 0; \ name.front = 0; \
name.rear = 0; \ name.rear = 0; \
memset(name.buffer, 0x00, name.size); \ memset(name.buffer, 0x00, name.size); \
} while (0) } while (0)
#define ENQUEUE(queue, data) do { \ #define IVEC_ECU_CAN_ENQUEUE(queue, data) do { \
memcpy(&queue.buffer[queue.front++], &data, sizeof(data)); \ memcpy(&queue.buffer[queue.front++], &data, sizeof(data)); \
queue.front %= queue.size; \ queue.front %= queue.size; \
} while (0) } while (0)
#define IVEC_ECU_CAN_DEQUEUE(queue, data) do { \
#define DEQUEUE(queue, data) do { \
memcpy(&data, &queue.buffer[queue.rear++], sizeof(data)); \ memcpy(&data, &queue.buffer[queue.rear++], sizeof(data)); \
queue.rear %= queue.size; \ queue.rear %= queue.size; \
} while (0) } while (0)
#define IVEC_ECU_CAN_IS_FULL(queue) ((queue.front - queue.rear) == (queue.size - 1) || \
#define IS_FULL(queue) ((queue.front - queue.rear) == (queue.size -1) || \
(queue.front - queue.rear) == -1) (queue.front - queue.rear) == -1)
#define IS_EMPTY(queue) (queue.front == queue.rear) #define IVEC_ECU_CAN_IS_EMPTY(queue) (queue.front == queue.rear)
/* Private Variable */ /* Private Variable */
typedef struct { typedef struct {
uint32_t id; uint32_t ulId;
uint8_t data[8]; uint8_t ucData[8];
uint8_t length; uint8_t ucLength;
uint8_t resv[3]; uint8_t resv[3];
} can_buff_t; } IVEC_ECU_CANBuff_s;
typedef struct { typedef struct {
uint16_t front; uint16_t front;
uint16_t rear; uint16_t rear;
uint16_t size; uint16_t size;
uint8_t element_size; uint8_t element_size;
can_buff_t * buffer; IVEC_ECU_CANBuff_s *buffer;
} can_queue_t; } IVEC_ECU_CANQueue_s;
// Function Prototypes
void vMCU_FDCAN_RxFifo_Callback(uint32_t ulIdentifier, uint8_t *pucData, uint16_t usDataLength);
uint8_t vMCAL_StoreMsgFromISRToQueue(uint32_t ulId, uint8_t *pucData, uint8_t ucLen);
IVEC_EcuCommonErr_e vECU_CAN_Init(MCAN_Regs *pMCAN, IVEC_CanBaud_e eBaud);
IVEC_EcuCommonErr_e vECU_CAN_DeInit(MCAN_Regs *pMCAN);
IVEC_EcuCommonErr_e vECU_WriteDataOverCAN(uint8_t *pucBuf, uint32_t ulId, int iRetCode, uint32_t ulBufNum);
IVEC_EcuCommonErr_e vECU_CAN_GetData(IVEC_ECU_CANBuff_s *pxBuff);
IVEC_EcuCommonErr_e vECU_CAN_ReInit(MCAN_Regs *pMCAN, uint16_t usSpeed);
IVEC_EcuCommonErr_e vECU_CAN_GetStatus(MCAN_Regs *pMCAN, uint16_t usSpeed);
void mcu_FDCAN_RxFifo_Callback(uint32_t Identifier, uint8_t *data, uint16_t DataLength); #endif /* IVEC_ECU_CAN_H_ */
uint8_t store_msg_from_isr_to_queue(uint32_t id, uint8_t* data, uint8_t len); //
IVEC_EcuCommonErr_e xECU_CANInit(MCAN_Regs* MCAN, xCAN_baud_t BAUD);
IVEC_EcuCommonErr_e xECU_CANDeInit(MCAN_Regs* MCAN);
IVEC_EcuCommonErr_e xECU_WriteDataOverCAN(uint8_t* pucBuf, uint32_t ulId, int retCode, uint32_t BufNum);
IVEC_EcuCommonErr_e xECU_CANGetData(can_buff_t *xBuff);
IVEC_EcuCommonErr_e xECU_CanReInit(MCAN_Regs* MCAN,uint16_t speed);
IVEC_EcuCommonErr_e xECU_GetCanStatus(MCAN_Regs* MCAN, uint16_t speed);

204
ivec_ECU/ivec_ecu_can/src/ivec_ecu_can.c
View File

@ -1,129 +1,161 @@
#include "../ivec_ECU/ivec_ecu_can/inc/ivec_ecu_can.h" #include "../ivec_ECU/ivec_ecu_can/inc/ivec_ecu_can.h"
#include "../ivec_ECU/ivec_ecu_uart/inc/ivec_ecu_uart.h" #include "../ivec_ECU/ivec_ecu_uart/inc/ivec_ecu_uart.h"
#include "../Core/Include/ivec_mcal_uart.h" #include "../Core/Include/ivec_mcal_uart.h"
extern int maskCount;
extern int filterCount;
static can_buff_t g_canBuffer[1024] = {0}; /*All the CAN Id, Len and Data are stored in this array*/ /* Static CAN buffer for storing CAN message data */
QUEUE(g_canQueue, g_canBuffer); static IVEC_ECU_CANBuff_s g_xCanBuffer[1024] = {0}; /* All the CAN ID, length, and data are stored in this array */
/* Queue for CAN messages */
IVEC_ECU_CAN_QUEUE(g_xCanQueue_x, g_xCanBuffer);
void mcu_FDCAN_RxFifo_Callback(uint32_t Identifier, uint8_t *data, uint16_t DataLength) /* CAN Receive FIFO Callback function */
void vMCAL_CanReceiveFifoCallback(uint32_t u32Identifier, uint8_t* pu8Data, uint16_t u16DataLength)
{ {
if (!IS_FULL(g_canQueue)) { /* Check if the CAN queue is full */
store_msg_from_isr_to_queue(Identifier, data, DataLength); if (!IVEC_ECU_CAN_IS_FULL(g_xCanQueue_x)) {
/* Store the received message in the queue from the interrupt */
vMCAL_StoreMsgFromISRToQueue(u32Identifier, pu8Data, u16DataLength);
} }
} }
/**
* @brief Stores a CAN message from ISR to a queue.
*
* @param ulId CAN ID of the message.
* @param pucData Pointer to the CAN data.
* @param ucLen Length of the CAN data.
* @return uint8_t Status (0 for success, non-zero for failure).
*/
uint8_t store_msg_from_isr_to_queue(uint32_t id, uint8_t* data, uint8_t len) uint8_t vMCAL_StoreMsgFromISRToQueue(uint32_t ulId, uint8_t* pucData, uint8_t ucLen)
{ {
can_buff_t buff = {0}; IVEC_ECU_CANBuff_s xBuff = {0};
buff.id = id; xBuff.ulId = ulId;
buff.length = len; xBuff.ucLength = ucLen;
memcpy(buff.data, data, len); memcpy(xBuff.ucData, pucData, ucLen);
ENQUEUE(g_canQueue, buff); IVEC_ECU_CAN_ENQUEUE(g_xCanQueue_x, xBuff); // Ensure `ENQUEUE` is defined properly.
return 0; return 0;
} }
IVEC_EcuCommonErr_e xECU_WriteDataOverCAN(uint8_t* pucBuf, uint32_t ulId, int retCode, uint32_t BufNum) /**
* @brief Sends data over CAN.
*
* @param pucBuf Pointer to the data buffer.
* @param ulId CAN ID to send the data.
* @param iRetCode Number of bytes to transmit.
* @param ulBufNum CAN buffer number.
* @return IVEC_EcuCommonErr_e Status of the transmission.
*/
// Function to write data over CAN
IVEC_EcuCommonErr_e vECU_WriteDataOverCAN(uint8_t* pucBuf, uint32_t u32Id, int iRetCode, uint32_t u32BufNum)
{ {
IVEC_EcuCommonErr_e l_xFuncStatus = commonECU_WRITE_FAIL; IVEC_EcuCommonErr_e eFuncStatus = commonECU_WRITE_FAIL;
uint8_t l_i32Ret; uint8_t u8RetCode;
uint16_t TxData[8] = {0}; // Define a buffer for the CAN payload data uint16_t au16TxData[8] = {0}; // Define a buffer for the CAN payload data.
for (int i = 0; i < retCode; i++) { for (int i = 0; i < iRetCode; i++) {
TxData[i] = (uint16_t)(pucBuf[i] ^ 0x0000); au16TxData[i] = (uint16_t)(pucBuf[i] ^ 0x0000);
}
int Bytes = retCode;
l_i32Ret = xMCAL_MCANTx(CANFD0, ulId, TxData, BufNum, Bytes);
if(l_i32Ret == IVEC_MCAL_STATUS_SUCCESS)
{
l_xFuncStatus = commonECU_SUCCESS;
}
return l_xFuncStatus;
} }
IVEC_EcuCommonErr_e xECU_CANGetData(can_buff_t *pxBuff) int iBytes = iRetCode;
{ u8RetCode = vMCAL_MCAN_Tx(CANFD0, u32Id, au16TxData, u32BufNum, iBytes);
IVEC_EcuCommonErr_e l_xFuncStatus = commonECU_FAIL;
if (!IS_EMPTY(g_canQueue))
{
can_buff_t xBuff = { 0x00 }; if (u8RetCode == IVEC_MCAL_STATUS_SUCCESS) {
DEQUEUE(g_canQueue, xBuff); eFuncStatus = commonECU_SUCCESS;
memcpy(pxBuff,&xBuff,sizeof(can_buff_t));
l_xFuncStatus = commonECU_SUCCESS;
} }
return l_xFuncStatus; return eFuncStatus;
} }
IVEC_EcuCommonErr_e xECU_CanReInit(MCAN_Regs* MCAN,uint16_t speed) // Function to get data from the CAN buffer queue
IVEC_EcuCommonErr_e vECU_CAN_GetData(IVEC_ECU_CANBuff_s *pxBuff)
{ {
IVEC_EcuCommonErr_e l_xFuncStatus = commonECU_SUCCESS; IVEC_EcuCommonErr_e eFuncStatus = commonECU_FAIL;
uint8_t l_i32Ret;
if(maskCount >= 0) if (!IVEC_ECU_CAN_IS_EMPTY(g_xCanQueue_x)) {
{ IVEC_ECU_CANBuff_s xBuff = { 0x00 };
vCanFilterReset(); IVEC_ECU_CAN_DEQUEUE(g_xCanQueue_x, xBuff);
memcpy(pxBuff, &xBuff, sizeof(IVEC_ECU_CANBuff_s));
eFuncStatus = commonECU_SUCCESS;
} }
l_i32Ret = xMCAL_MCANDeInit(MCAN); return eFuncStatus;
if(l_i32Ret != IVEC_MCAL_STATUS_SUCCESS) }
/* Function to reinitialize the CAN module */
IVEC_EcuCommonErr_e vECU_CAN_ReInit(MCAN_Regs* pMCAN, uint16_t u16Speed)
{ {
l_xFuncStatus = commonECU_DEINIT_FAIL; IVEC_EcuCommonErr_e l_eFuncStatus = commonECU_SUCCESS;
IVEC_McalStatus_e l_xMCALStatus;
/* Deinitialize the MCAN module */
l_xMCALStatus = vMCAL_MCAN_DeInit(pMCAN);
if (l_xMCALStatus != IVEC_MCAL_STATUS_SUCCESS) {
l_eFuncStatus = commonECU_DEINIT_FAIL;
return l_eFuncStatus;
} }
//DL_MCAN_reset(MCAN); /* Enable power to the MCAN module */
// DL_GPIO_enablePower(GPIOA); DL_MCAN_enablePower(pMCAN);
// DL_GPIO_enablePower(GPIOB);
DL_MCAN_enablePower(MCAN);
delay_cycles(POWER_STARTUP_DELAY); delay_cycles(POWER_STARTUP_DELAY);
/* Configure GPIO for CAN TX and RX */
DL_GPIO_initPeripheralOutputFunction(GPIO_MCAN0_IOMUX_CAN_TX, GPIO_MCAN0_IOMUX_CAN_TX_FUNC); DL_GPIO_initPeripheralOutputFunction(GPIO_MCAN0_IOMUX_CAN_TX, GPIO_MCAN0_IOMUX_CAN_TX_FUNC);
DL_GPIO_initPeripheralInputFunction(GPIO_MCAN0_IOMUX_CAN_RX, GPIO_MCAN0_IOMUX_CAN_RX_FUNC); DL_GPIO_initPeripheralInputFunction(GPIO_MCAN0_IOMUX_CAN_RX, GPIO_MCAN0_IOMUX_CAN_RX_FUNC);
l_i32Ret = xMCAL_MCANInit(MCAN,speed);
if(maskCount >= 0)
{
vCanConfigFilter();
}
if(l_i32Ret != IVEC_MCAL_STATUS_SUCCESS)
{
l_xFuncStatus = commonECU_INIT_FAIL;
}
return l_xFuncStatus;
/* Reinitialize the MCAN module */
l_xMCALStatus = vMCAL_MCAN_Init(pMCAN, u16Speed);
/* Check if reinitialization was successful */
if (l_xMCALStatus != IVEC_MCAL_STATUS_SUCCESS) {
l_eFuncStatus = commonECU_INIT_FAIL;
} }
IVEC_EcuCommonErr_e xECU_CANInit(MCAN_Regs* MCAN, xCAN_baud_t BAUD) return l_eFuncStatus;
{
IVEC_EcuCommonErr_e l_xFuncStatus = commonECU_SUCCESS;
uint8_t l_i32Ret;
l_i32Ret = xMCAL_MCANInit(MCAN,BAUD);
if(l_i32Ret != IVEC_MCAL_STATUS_SUCCESS)
{
l_xFuncStatus = commonECU_INIT_FAIL;
}
return l_xFuncStatus;
}
IVEC_EcuCommonErr_e xECU_CANDeInit(MCAN_Regs* MCAN)
{
IVEC_EcuCommonErr_e l_xFuncStatus = commonECU_SUCCESS;
uint8_t l_i32Ret;
l_i32Ret = xMCAL_MCANDeInit(MCAN);
if(l_i32Ret != IVEC_MCAL_STATUS_SUCCESS)
{
l_xFuncStatus = commonECU_INIT_FAIL;
}
return l_xFuncStatus;
} }
IVEC_EcuCommonErr_e xECU_GetCanStatus(MCAN_Regs* MCAN, uint16_t speed) /* Function to initialize the CAN module */
IVEC_EcuCommonErr_e vECU_CAN_Init(MCAN_Regs *pMCAN, IVEC_CanBaud_e eBaud)
{ {
char l_ucErrorString[32] = {0}; IVEC_EcuCommonErr_e l_eFuncStatus = commonECU_SUCCESS;
if( xMCAL_getMCAN_ErrorStatus(l_ucErrorString) == IVEC_MCAL_STATUS_ERROR ) IVEC_McalStatus_e eMcalStatus;
/* Call MCAL initialization function */
eMcalStatus = vMCAL_MCAN_Init(pMCAN, eBaud);
/* Check if initialization was successful */
if (eMcalStatus != IVEC_MCAL_STATUS_SUCCESS)
{ {
xECU_CanReInit(MCAN, speed); l_eFuncStatus = commonECU_INIT_FAIL;
} }
return l_eFuncStatus;
}
/* Function to deinitialize the CAN module */
IVEC_EcuCommonErr_e vECU_CAN_DeInit(MCAN_Regs *pMCAN)
{
IVEC_EcuCommonErr_e l_eFuncStatus = commonECU_SUCCESS;
IVEC_McalStatus_e eMcalStatus;
/* Call MCAL deinitialization function */
eMcalStatus = vMCAL_MCAN_DeInit(pMCAN);
/* Check if deinitialization was successful */
if (eMcalStatus != IVEC_MCAL_STATUS_SUCCESS)
{
l_eFuncStatus = commonECU_INIT_FAIL;
}
return l_eFuncStatus;
}
/* Function to get the status of the CAN module */
IVEC_EcuCommonErr_e vECU_CAN_GetStatus(MCAN_Regs* const pMCAN, uint16_t u16Speed)
{
IVEC_EcuCommonErr_e l_eFuncStatus = commonECU_SUCCESS;
char cErrorString[32] = {0};
/* Retrieve the MCAN error status */
if (vMCAL_MCAN_GetErrorStatus(cErrorString) == IVEC_MCAL_STATUS_ERROR)
{
/* Reinitialize CAN if an error is detected */
l_eFuncStatus = vECU_CAN_ReInit(pMCAN, u16Speed);
}
return l_eFuncStatus;
} }

64
ivec_ECU/ivec_ecu_uart/inc/ivec_ecu_uart.h
View File

@ -1,10 +1,8 @@
#ifndef IVEC_ECU_UART_H #ifndef IVEC_ECU_UART_H
#define IVEC_ECU_UART_H #define IVEC_ECU_UART_H
//#include "ivec_mcal_uart.h"
#include "../Core/Include/ivec_mcal_uart.h" #include "../Core/Include/ivec_mcal_uart.h"
#include "../ivec_ECU/ivec_ecu_common/inc/ivec_ecu_common.h" #include "../ivec_ECU/ivec_ecu_common/inc/ivec_ecu_common.h"
//#include "ivec_ecu_common.h"
#include "stdint.h" #include "stdint.h"
@ -12,61 +10,59 @@
#include <stdlib.h> #include <stdlib.h>
#include <string.h> #include <string.h>
#define MAX_PACKET_LENGTH 32/*!<Maximum length of packet that can be received*/ #define IVEC_ECU_UART_MAX_PACKET_LENGTH 32/*!<Maximum length of packet that can be received*/
#define PKT_HEADER 7/*!<Protocol headers*/ #define IVEC_ECU_UART_PKT_HEADER 7/*!<Protocol headers*/
#define PKT_HEADER_FOOTER 9/*!<Protocol headers+footers*/ #define IVEC_ECU_UART_PKT_HEADER_FOOTER 9/*!<Protocol headers+footers*/
#endif #endif
#define GET_PACKET_SIZE(x) (x + PKT_HEADER_FOOTER)/*!<Complete packet size*/ #define IVEC_ECU_UART_GET_PACKET_SIZE(x) (x + IVEC_ECU_UART_PKT_HEADER_FOOTER)/*!<Complete packet size*/
#define PACKET_SUCCESS 0/*!<Success*/ #define IVEC_ECU_UART_PACKET_SUCCESS 0/*!<Success*/
#define PACKET_FAIL -1/*!<Error*/ #define IVEC_ECU_UART_PACKET_FAIL -1/*!<Error*/
/*Private Variables*/ /*Private Variables*/
typedef int PacketRetCode_t;/*SERVICE_SUCESS or SERVICE_FAIL*/ typedef int IVEC_ECU_UartPacketRetCode_e;/*SERVICE_SUCESS or SERVICE_FAIL*/
typedef enum typedef enum
{ {
ecuUART_PORT1 = 0, IVEC_ECU_UART_PORT1 = 0,
ecuUART_PORT2, IVEC_ECU_UART_PORT2,
ecuUART_PORT3, IVEC_ECU_UART_PORT3,
ecuUART_PORT_MAX IVEC_ECU_UART_PORT_MAX
}EcuUartPortNumber_e; } IVEC_ECU_UartPortNumber_e;
typedef enum typedef enum
{ {
IVEC_ECU_UART_EVENT_RX_ARRIVED = 1,//(1 << 0), ///< Received new data IVEC_ECU_UART_EVENT_RX_ARRIVED = 1,
IVEC_ECU_UART_EVENT_RX_OVERFLOW =2 ,//(1 << 1), ///< Rx fifo overflowed IVEC_ECU_UART_EVENT_RX_OVERFLOW = 2,
IVEC_ECU_UART_EVENT_TX_COMPLETE = 3//(1 << 2) ///< All data had been sent IVEC_ECU_UART_EVENT_TX_COMPLETE = 3
}IVEC_EcuUartEvents_e; } IVEC_ECU_UartEvent_e;
typedef struct typedef struct
{ {
McalUartHandle_s __xUartHandle; xMcalUartHandle __xUartHandle;
EcuUartPortNumber_e eUartPortNumber; IVEC_ECU_UartPortNumber_e eUartPortNumber;
volatile uint8_t* u8Qbuffer; volatile uint8_t* u8Qbuffer;
uint16_t u16QbufSize; uint16_t u16QbufSize;
uint16_t u16len; uint16_t u16len;
void (*pvUartRecvCallback)(EcuUartPortNumber_e, IVEC_EcuUartEvents_e , char *,uint32_t); void (*pvUartRecvCallback)(IVEC_ECU_UartPortNumber_e, IVEC_ECU_UartEvent_e , char *, uint32_t);
}EcuUartHandle_s; } IVEC_ECU_UartHandle_s;
/*=========================================================================== /*===========================================================================
* Functions declaration * Functions declaration
===========================================================================*/ ===========================================================================*/
IVEC_EcuCommonErr_e xECU_UARTInit(EcuUartHandle_s* prvUartHandle, uint32_t speed);
IVEC_EcuCommonErr_e xECU_UARTDeInit(EcuUartHandle_s *prvUartHandle);
IVEC_EcuCommonErr_e xECU_UARTReInit(EcuUartHandle_s *prvUartHandle, uint32_t speed);
IVEC_EcuCommonErr_e xECU_UARTTransmit(EcuUartHandle_s *prvUartHandle, uint8_t* pucBuffer, uint16_t len);
//Uart_Typedef_e xUartWrite(Uart_PortHandle_s *xportHandle, uint8_t* pucBuffer, uint16_t len, uint16_t timeout);
IVEC_EcuCommonErr_e xECU_UARTGetData(EcuUartHandle_s *prvUartHandle, uint8_t* pucBuffer, uint16_t len, uint16_t timeout);
//Uart_Typedef_e xUartReceive(Uart_PortHandle_s *xportHandle, uint8_t* pucBuffer, uint16_t len, uint16_t timeout);
PacketRetCode_t xECU_FormatUartPacket(EcuUartHandle_s *prvUartHandle, uint8_t* pucData, uint8_t ucDlc, uint32_t ulId);
PacketRetCode_t xECU_ReadCANDataLenOverUART(EcuUartHandle_s *prvUartHandle, uint8_t* pucBuf, uint32_t *ulId);
PacketRetCode_t xECU_ReadCANDataOverUART(EcuUartHandle_s* prvUartHandle, uint8_t* pucBuf, uint32_t *ulId); IVEC_EcuCommonErr_e IVEC_ECU_Uart_Init(IVEC_ECU_UartHandle_s* uartHandle, uint32_t speed);
int vECU_InitiateUartToCanTransmit(EcuUartHandle_s* prvUartHandle, uint32_t id, uint8_t *pucData, uint8_t ucLen); IVEC_EcuCommonErr_e IVEC_ECU_Uart_Deinit(IVEC_ECU_UartHandle_s *uartHandle);
IVEC_EcuCommonErr_e IVEC_ECU_Uart_Reinit(IVEC_ECU_UartHandle_s *uartHandle, uint32_t speed);
IVEC_EcuCommonErr_e IVEC_ECU_Uart_Transmit(IVEC_ECU_UartHandle_s *uartHandle, uint8_t* buffer, uint16_t len);
IVEC_EcuCommonErr_e IVEC_ECU_Uart_GetData(IVEC_ECU_UartHandle_s *uartHandle, uint8_t* buffer, uint16_t len, uint16_t timeout);
IVEC_ECU_UartPacketRetCode_e IVEC_ECU_Uart_FormatPacket(IVEC_ECU_UartHandle_s *uartHandle, uint8_t* data, uint8_t dlc, uint32_t id);
IVEC_ECU_UartPacketRetCode_e IVEC_ECU_Uart_ReadCANDataLenOverUART(IVEC_ECU_UartHandle_s *uartHandle, uint8_t* buffer, uint32_t *id);
IVEC_ECU_UartPacketRetCode_e IVEC_ECU_Uart_ReadCANDataOverUART(IVEC_ECU_UartHandle_s* uartHandle, uint8_t* buffer, uint32_t *id);
int IVEC_ECU_Uart_InitiateTransmit(IVEC_ECU_UartHandle_s* uartHandle, uint32_t id, uint8_t *data, uint8_t len);

633
ivec_ECU/ivec_ecu_uart/src/ivec_ecu_uart.c
View File

@ -1,183 +1,186 @@
#include "../ivec_ECU/ivec_ecu_uart/inc/ivec_ecu_uart.h" #include "../ivec_ECU/ivec_ecu_uart/inc/ivec_ecu_uart.h"
#include "ivec_cmplx_queue.h" #include "ivec_cmplx_queue.h"
#include "../Core/Include/ivec_mcal_uart.h" #include "../Core/Include/ivec_mcal_uart.h"
//#include <..\Core\Include\ivec_mcal_timer.h>
//#include "ivec_mcal_uart.h"
#define LOG_STRING "ivec-ecu-UART" #define LOG_STRING "ivec-ecu-UART"
//#define CAN_UART_BUFFER_MAX_SIZE 4096
//#define NFC_UART_BUFFER_MAX_SIZE 256 //#define NFC_UART_BUFFER_MAX_SIZE 256
#define DATA_PACKET_TIMEOUT 300 #define DATA_PACKET_TIMEOUT_MS 300
volatile static CmplxFifoQueueHandle_s __gprv_MyEcuUARTResponseQueue[IVEC_MCAL_UART_MAX_PORT] = { 0 }; volatile static CmplxFifoQueueHandle_s __gprv_EcuUartResponseQueue[IVEC_MCAL_UART_MAX_PORT] = { 0 };
//static uint8_t __gprv_u8CANUartDataBuffer[CAN_UART_BUFFER_MAX_SIZE];
//static uint8_t __gprv_u8NFCUartDataBuffer[NFC_UART_BUFFER_MAX_SIZE]; //static uint8_t __gprv_u8NFCUartDataBuffer[NFC_UART_BUFFER_MAX_SIZE];
int uartCount = 1;
static void __prv_vEcu_CANOverUartMsgCallback(eMcalUartPortNumber uartPort, IVEC_ECU_UartEvent_e eventType, char* pucBuffer, uint32_t u32Size)
static void __prv_vEcu_CANOverUartMsgCallback(McalUartPortNumber_e eUartPort, IVEC_McalUartEvents_e eIndType, char* pucBuffer, uint32_t u32Size)
{ {
switch (eUartPort) switch (uartPort)
{ {
case mcalUART_PORT2: case eMcalUartPort2:
if (eIndType == IVEC_MCAL_UART_EVENT_RX_ARRIVED) { if (eventType == IVEC_ECU_UART_EVENT_RX_ARRIVED) {
u8CMPLX_FifoEnqueue((CmplxFifoQueueHandle_s*)&__gprv_MyEcuUARTResponseQueue[mcalUART_PORT2], pucBuffer, u32Size); u8CMPLX_FifoEnqueue((CmplxFifoQueueHandle_s*)&__gprv_EcuUartResponseQueue[IVEC_ECU_UART_PORT2], pucBuffer, u32Size);
} }
break; break;
case mcalUART_PORT3: case eMcalUartPort3:
if (eIndType == IVEC_MCAL_UART_EVENT_RX_ARRIVED) { if (eventType == IVEC_ECU_UART_EVENT_RX_ARRIVED) {
u8CMPLX_FifoEnqueue((CmplxFifoQueueHandle_s*)&__gprv_MyEcuUARTResponseQueue[mcalUART_PORT3], pucBuffer, u32Size); u8CMPLX_FifoEnqueue((CmplxFifoQueueHandle_s*)&__gprv_EcuUartResponseQueue[IVEC_ECU_UART_PORT3], pucBuffer, u32Size);
} }
break; break;
default: default:
break; break;
} }
} }
static void prvChecksumCalculate(uint8_t* pkt, int len, uint8_t* ck) { static void IVEC_ECU_CalculateChecksum(uint8_t* pkt, int len, uint8_t* checksum) {
uint8_t mck_a = 0, mck_b = 0; uint8_t checksum_a = 0, checksum_b = 0;
/* Incremented to ignore Sync data */ /* Incremented to ignore Sync data */
for (int i = 2; i < len - 2; i++) { for (int i = 2; i < len - 2; i++) {
mck_a += pkt[i]; checksum_a += pkt[i];
mck_b += mck_a; checksum_b += checksum_a;
} }
mck_a &= 0xFF; checksum_a &= 0xFF;
mck_b &= 0xFF; checksum_b &= 0xFF;
ck[0] = mck_a; checksum[0] = checksum_a;
ck[1] = mck_b; checksum[1] = checksum_b;
} }
//IVEC_EcuCommonErr_e
IVEC_EcuCommonErr_e xECU_UARTInit(EcuUartHandle_s* prvUartHandle, uint32_t speed) IVEC_EcuCommonErr_e IVEC_ECU_Uart_Init(IVEC_ECU_UartHandle_s* prvUartHandle, uint32_t speed)
{ {
IVEC_ECU_FUNC_ENTRY(LOG_STRING); IVEC_ECU_FUNC_ENTRY(LOG_STRING);
IVEC_EcuCommonErr_e l_xFuncStatus = commonECU_SUCCESS; IVEC_EcuCommonErr_e l_xFuncStatus = commonECU_SUCCESS;
uint8_t l_i32Ret = 0; uint8_t l_i32Ret = 0;
IVEC_ECU_LOG(LOG_STRING, "UART Initilising Queue"); IVEC_ECU_LOG(LOG_STRING, "UART Initializing Queue");
if (prvUartHandle->eUartPortNumber < IVEC_MCAL_UART_MAX_PORT) if (prvUartHandle->eUartPortNumber < IVEC_MCAL_UART_MAX_PORT)
{ {
__gprv_MyEcuUARTResponseQueue[prvUartHandle->eUartPortNumber].i32ElementSize = sizeof(uint8_t); __gprv_EcuUartResponseQueue[prvUartHandle->eUartPortNumber].i32ElementSize = sizeof(uint8_t);
switch (prvUartHandle->eUartPortNumber) switch (prvUartHandle->eUartPortNumber)
{ {
case mcalUART_PORT2: case IVEC_ECU_UART_PORT2:
__gprv_MyEcuUARTResponseQueue[prvUartHandle->eUartPortNumber].i32TotalElements = prvUartHandle->u16QbufSize; __gprv_EcuUartResponseQueue[prvUartHandle->eUartPortNumber].i32TotalElements = prvUartHandle->u16QbufSize;
__gprv_MyEcuUARTResponseQueue[prvUartHandle->eUartPortNumber].pu8Buffer = prvUartHandle->u8Qbuffer; __gprv_EcuUartResponseQueue[prvUartHandle->eUartPortNumber].pu8Buffer = prvUartHandle->u8Qbuffer;
break; break;
case mcalUART_PORT3: case IVEC_ECU_UART_PORT3:
__gprv_MyEcuUARTResponseQueue[prvUartHandle->eUartPortNumber].i32TotalElements = prvUartHandle->u16QbufSize; __gprv_EcuUartResponseQueue[prvUartHandle->eUartPortNumber].i32TotalElements = prvUartHandle->u16QbufSize;
__gprv_MyEcuUARTResponseQueue[prvUartHandle->eUartPortNumber].pu8Buffer = prvUartHandle->u8Qbuffer; __gprv_EcuUartResponseQueue[prvUartHandle->eUartPortNumber].pu8Buffer = prvUartHandle->u8Qbuffer;
break; break;
default: default:
__gprv_MyEcuUARTResponseQueue[prvUartHandle->eUartPortNumber].pu8Buffer = NULL; __gprv_EcuUartResponseQueue[prvUartHandle->eUartPortNumber].pu8Buffer = NULL;
break; break;
} }
__gprv_MyEcuUARTResponseQueue[prvUartHandle->eUartPortNumber].i32QueueType = FIXED_ELEMENT_SIZE_QUEUE; __gprv_EcuUartResponseQueue[prvUartHandle->eUartPortNumber].i32QueueType = FIXED_ELEMENT_SIZE_QUEUE;
l_i32Ret = u8CMPLX_FifoQueueInit((CmplxFifoQueueHandle_s*)&__gprv_MyEcuUARTResponseQueue[prvUartHandle->eUartPortNumber]); l_i32Ret = u8CMPLX_FifoQueueInit((CmplxFifoQueueHandle_s*)&__gprv_EcuUartResponseQueue[prvUartHandle->eUartPortNumber]);
} }
if (l_i32Ret == 0) if (l_i32Ret == 0)
{ {
l_xFuncStatus = commonECU_FAIL; l_xFuncStatus = commonECU_INIT_FAIL;
goto exit; goto exit;
} }
IVEC_ECU_LOG(LOG_STRING, "Initilising UART");
IVEC_ECU_LOG(LOG_STRING, "Initializing UART");
prvUartHandle->__xUartHandle.pvUartRecvCallback = __prv_vEcu_CANOverUartMsgCallback; prvUartHandle->__xUartHandle.pvUartRecvCallback = __prv_vEcu_CANOverUartMsgCallback;
prvUartHandle->__xUartHandle.xUartConfig.eUartBaudrate = speed; prvUartHandle->__xUartHandle.xUartConfig.eUartBaudrate = speed;
prvUartHandle->__xUartHandle.eUartPortNumber = prvUartHandle->eUartPortNumber; prvUartHandle->__xUartHandle.eUartPortNumber = prvUartHandle->eUartPortNumber;
prvUartHandle->__xUartHandle.xUartConfig.eUartFlowCtrl = mcalUART_FC_NONE; prvUartHandle->__xUartHandle.xUartConfig.eUartFlowCtrl = eMcalUartFcNone;
prvUartHandle->__xUartHandle.xUartConfig.eUartDataBit = mcalUART_DATABIT_8; prvUartHandle->__xUartHandle.xUartConfig.eUartDataBit = eMcalUartDataBit8;
prvUartHandle->__xUartHandle.xUartConfig.eUartStopBit = mcalUART_STOP_1; prvUartHandle->__xUartHandle.xUartConfig.eUartStopBit = eMcalUartStopBit1;
prvUartHandle->__xUartHandle.xUartConfig.eUartParityBit = mcalUART_PARITY_NONE; prvUartHandle->__xUartHandle.xUartConfig.eUartParityBit = eMcalUartParityNone;
l_i32Ret = xMCAL_UartInit(&prvUartHandle->__xUartHandle); l_i32Ret = xMCAL_UartInit(&prvUartHandle->__xUartHandle);
if (l_i32Ret != 0) if (l_i32Ret != 0)
{ {
l_xFuncStatus = commonECU_INIT_FAIL; l_xFuncStatus = commonECU_INIT_FAIL;
goto exit; goto exit;
} }
exit: exit:
IVEC_ECU_FUNC_EXIT(LOG_STRING, 0); IVEC_ECU_FUNC_EXIT(LOG_STRING, 0);
return l_xFuncStatus; return l_xFuncStatus;
} }
IVEC_EcuCommonErr_e xECU_UARTDeInit(EcuUartHandle_s* prvUartHandle)
IVEC_EcuCommonErr_e IVEC_ECU_Uart_Deinit(IVEC_ECU_UartHandle_s* prvUartHandle)
{ {
IVEC_ECU_FUNC_ENTRY(LOG_STRING); IVEC_ECU_FUNC_ENTRY(LOG_STRING);
uint8_t l_i32Ret; uint8_t l_i32Ret;
IVEC_EcuCommonErr_e l_xFuncStatus = commonECU_SUCCESS; IVEC_EcuCommonErr_e l_xFuncStatus = commonECU_SUCCESS;
if (prvUartHandle == NULL) if (prvUartHandle == NULL)
{ {
l_xFuncStatus = commonECU_ALREADY_DEINIT; l_xFuncStatus = commonECU_ALREADY_DEINIT;
goto exit; goto exit;
} }
IVEC_ECU_LOG(LOG_STRING, "DeInitilising CAN");
IVEC_ECU_LOG(LOG_STRING, "Deinitializing UART");
l_i32Ret = xMCAL_UartDeInit(&prvUartHandle->__xUartHandle); l_i32Ret = xMCAL_UartDeInit(&prvUartHandle->__xUartHandle);
if (l_i32Ret != 0) if (l_i32Ret != IVEC_MCAL_STATUS_SUCCESS)
{ {
l_xFuncStatus = commonECU_DEINIT_FAIL; l_xFuncStatus = commonECU_INIT_FAIL;
goto exit; goto exit;
} }
if (prvUartHandle->eUartPortNumber < IVEC_MCAL_UART_MAX_PORT) if (prvUartHandle->eUartPortNumber < IVEC_MCAL_UART_MAX_PORT)
vCMPLX_FifoQueueFlush((CmplxFifoQueueHandle_s*)&__gprv_MyEcuUARTResponseQueue[prvUartHandle->eUartPortNumber]); {
vCMPLX_FifoQueueFlush((CmplxFifoQueueHandle_s*)&__gprv_EcuUartResponseQueue[prvUartHandle->eUartPortNumber]);
}
exit: exit:
IVEC_ECU_FUNC_EXIT(LOG_STRING, 0); IVEC_ECU_FUNC_EXIT(LOG_STRING, 0);
return l_xFuncStatus; return l_xFuncStatus;
} }
IVEC_EcuCommonErr_e IVEC_ECU_Uart_Reinit(IVEC_ECU_UartHandle_s* prvUartHandle, uint32_t speed)
IVEC_EcuCommonErr_e xECU_UARTReInit(EcuUartHandle_s* prvUartHandle, uint32_t speed)
{ {
IVEC_EcuCommonErr_e l_xFuncStatus = commonECU_SUCCESS; IVEC_EcuCommonErr_e l_xFuncStatus = commonECU_SUCCESS;
uint8_t l_i32Ret; uint8_t l_i32Ret;
l_i32Ret = xECU_UARTDeInit(prvUartHandle);
// Deinitialize UART
l_i32Ret = IVEC_ECU_Uart_Deinit(prvUartHandle);
if (l_i32Ret != IVEC_MCAL_STATUS_SUCCESS) if (l_i32Ret != IVEC_MCAL_STATUS_SUCCESS)
{ {
l_xFuncStatus = commonECU_DEINIT_FAIL; l_xFuncStatus = commonECU_DEINIT_FAIL;
goto exit;
} }
l_i32Ret = xECU_UARTInit(prvUartHandle, speed); // Reinitialize UART with the new speed
l_i32Ret = IVEC_ECU_Uart_Init(prvUartHandle, speed);
if (l_i32Ret != IVEC_MCAL_STATUS_SUCCESS) if (l_i32Ret != IVEC_MCAL_STATUS_SUCCESS)
{ {
l_xFuncStatus = commonECU_INIT_FAIL; l_xFuncStatus = commonECU_INIT_FAIL;
} }
exit:
return l_xFuncStatus; return l_xFuncStatus;
} }
IVEC_EcuCommonErr_e IVEC_ECU_Uart_Transmit(IVEC_ECU_UartHandle_s* prvUartHandle, uint8_t* pucBuffer, uint16_t len)
IVEC_EcuCommonErr_e xECU_UARTTransmit(EcuUartHandle_s* prvUartHandle, uint8_t* pucBuffer, uint16_t len)
{ {
return commonECU_SUCCESS; return commonECU_SUCCESS;
} }
IVEC_EcuCommonErr_e xECU_UARTFlush(McalUartHandle_s* prvUartHandle)
IVEC_EcuCommonErr_e IVEC_ECU_UART_Flush(IVEC_ECU_UartHandle_s* prvUartHandle)
{ {
if (prvUartHandle == NULL || prvUartHandle->eUartPortNumber >= IVEC_MCAL_UART_MAX_PORT) if (prvUartHandle == NULL || prvUartHandle->eUartPortNumber >= IVEC_MCAL_UART_MAX_PORT)
vCMPLX_FifoQueueFlush((CmplxFifoQueueHandle_s*)&__gprv_MyEcuUARTResponseQueue[prvUartHandle->eUartPortNumber]); {
vCMPLX_FifoQueueFlush((CmplxFifoQueueHandle_s*)&__gprv_EcuUartResponseQueue[prvUartHandle->eUartPortNumber]);
}
return commonECU_SUCCESS; return commonECU_SUCCESS;
} }
IVEC_EcuCommonErr_e xECU_UARTGetData(EcuUartHandle_s* prvUartHandle, uint8_t* pucBuffer, uint16_t len, uint16_t timeout) IVEC_EcuCommonErr_e IVEC_ECU_Uart_GetData(IVEC_ECU_UartHandle_s* prvUartHandle, uint8_t* pucBuffer, uint16_t len, uint16_t timeout)
{ {
IVEC_ECU_FUNC_ENTRY(LOG_STRING); IVEC_ECU_FUNC_ENTRY(LOG_STRING);
IVEC_EcuCommonErr_e l_xFuncStatus = commonECU_SUCCESS; IVEC_EcuCommonErr_e l_xFuncStatus = commonECU_SUCCESS;
// Validate parameters
if (prvUartHandle == NULL || prvUartHandle->eUartPortNumber >= IVEC_MCAL_UART_MAX_PORT) if (prvUartHandle == NULL || prvUartHandle->eUartPortNumber >= IVEC_MCAL_UART_MAX_PORT)
{ {
l_xFuncStatus = commonECU_INVALID_PARAM; l_xFuncStatus = commonECU_INVALID_PARAM;
@ -186,17 +189,19 @@ IVEC_EcuCommonErr_e xECU_UARTGetData(EcuUartHandle_s* prvUartHandle, uint8_t* pu
uint8_t ijk = 0; uint8_t ijk = 0;
int l_u32Len = 0; int l_u32Len = 0;
uint32_t u32CommTimestamp = i32MCAL_getTicks(); uint32_t u32CommTimestamp = i32MCAL_GetTicks();
while (((i32MCAL_getTicks() - u32CommTimestamp) <= timeout + 1) && (ijk < len)) // Loop until timeout or buffer is filled
while (((i32MCAL_GetTicks() - u32CommTimestamp) <= timeout + 1) && (ijk < len))
{ {
if (!u8CMPLX_FifoQueueEmpty((CmplxFifoQueueHandle_s*)&__gprv_EcuUartResponseQueue[prvUartHandle->eUartPortNumber]))
if (!u8CMPLX_FifoQueueEmpty((CmplxFifoQueueHandle_s*)&__gprv_MyEcuUARTResponseQueue[prvUartHandle->eUartPortNumber])) { {
if (u8CMPLX_FifoDequeue((CmplxFifoQueueHandle_s*)&__gprv_MyEcuUARTResponseQueue[prvUartHandle->eUartPortNumber], &pucBuffer[ijk], &l_u32Len, 0) == 1) if (u8CMPLX_FifoDequeue((CmplxFifoQueueHandle_s*)&__gprv_EcuUartResponseQueue[prvUartHandle->eUartPortNumber], &pucBuffer[ijk], &l_u32Len, 0) == 1)
ijk++; ijk++;
} }
} }
// Check if all requested data was received
if (ijk != len) if (ijk != len)
{ {
l_xFuncStatus = commonECU_READ_FAIL; l_xFuncStatus = commonECU_READ_FAIL;
@ -209,72 +214,69 @@ exit:
} }
IVEC_ECU_UartPacketRetCode_e IVEC_ECU_Uart_ReadCANDataLenOverUART(IVEC_ECU_UartHandle_s* prvUartHandle, uint8_t* pucBuf, uint32_t* ulId)
PacketRetCode_t xECU_ReadCANDataLenOverUART(EcuUartHandle_s* prvUartHandle, uint8_t* pucBuf, uint32_t* ulId)
{ {
int PktLen = PACKET_FAIL; int PktLen = commonECU_READ_FAIL;
if ((xECU_UARTGetData(prvUartHandle, (uint8_t*)&pucBuf[0], 1, 0) == commonECU_SUCCESS)) if ((IVEC_ECU_Uart_GetData(prvUartHandle, (uint8_t*)&pucBuf[0], 1, 0) == commonECU_SUCCESS))
{ {
if (pucBuf[0] == 0xB5) if (pucBuf[0] == 0xB5)
{ {
if (xECU_UARTGetData(prvUartHandle, (uint8_t*)&pucBuf[1], 1, 5) == commonECU_SUCCESS) { if (IVEC_ECU_Uart_GetData(prvUartHandle, (uint8_t*)&pucBuf[1], 1, 5) == commonECU_SUCCESS) {
if (pucBuf[1] != 0x62) { if (pucBuf[1] != 0x62) {
PktLen = PACKET_FAIL; PktLen = commonECU_READ_FAIL;
goto EXIT; //0x62 not found [OUT OF SYNC] goto EXIT; // 0x62 not found, OUT OF SYNC
} }
} }
else else
{ {
PktLen = PACKET_FAIL; PktLen = commonECU_READ_FAIL;
goto EXIT; goto EXIT;
} }
if (xECU_UARTGetData(prvUartHandle, (uint8_t*)&pucBuf[2], 5, DATA_PACKET_TIMEOUT) != commonECU_SUCCESS) { if (IVEC_ECU_Uart_GetData(prvUartHandle, (uint8_t*)&pucBuf[2], 5, DATA_PACKET_TIMEOUT_MS) != commonECU_SUCCESS) {
PktLen = PACKET_FAIL; PktLen = commonECU_READ_FAIL;
goto EXIT; goto EXIT;
} }
*(ulId) = (uint32_t)((pucBuf[6] << 24) | (pucBuf[5] << 16) | (pucBuf[4] << 8) | (pucBuf[3] << 0)); *(ulId) = (uint32_t)((pucBuf[6] << 24) | (pucBuf[5] << 16) | (pucBuf[4] << 8) | (pucBuf[3]));
uint8_t l_ucTempLen = pucBuf[2]; uint8_t l_ucTempLen = pucBuf[2];
PktLen = PKT_HEADER_FOOTER + l_ucTempLen; PktLen = IVEC_ECU_UART_PKT_HEADER_FOOTER + l_ucTempLen;
if (xECU_UARTGetData(prvUartHandle, (uint8_t*)&pucBuf[PKT_HEADER], (uint32_t)(PktLen - PKT_HEADER), DATA_PACKET_TIMEOUT) != commonECU_SUCCESS) if (IVEC_ECU_Uart_GetData(prvUartHandle, (uint8_t*)&pucBuf[IVEC_ECU_UART_PKT_HEADER], (uint32_t)(PktLen - IVEC_ECU_UART_PKT_HEADER), DATA_PACKET_TIMEOUT_MS) != commonECU_SUCCESS)
{ {
PktLen = PACKET_FAIL; PktLen = commonECU_READ_FAIL;
goto EXIT; goto EXIT;
} }
uint8_t checksum[2]; uint8_t checksum[2];
prvChecksumCalculate(pucBuf, PktLen, checksum); IVEC_ECU_CalculateChecksum(pucBuf, PktLen, checksum);
/*TODO: (Python Script)Some Times Fails due to Bad Checksum*/ /* TODO: (Python Script) Sometimes fails due to bad checksum */
if ((checksum[0] == pucBuf[PktLen - 2]) && (checksum[1] == pucBuf[PktLen - 1])) { if ((checksum[0] == pucBuf[PktLen - 2]) && (checksum[1] == pucBuf[PktLen - 1])) {
PktLen -= PKT_HEADER_FOOTER; PktLen -= IVEC_ECU_UART_PKT_HEADER_FOOTER;
} }
else else
{ {
IVEC_ECU_LOG(LOG_STRING, "Packet Checksum Failed\n"); IVEC_ECU_LOG(LOG_STRING, "Packet Checksum Failed\n");
PktLen = PACKET_FAIL; PktLen = commonECU_READ_FAIL;
} }
} }
else else
{ {
// COM_FlushBuffer(); // COM_FlushBuffer();
PktLen = PACKET_FAIL; PktLen = IVEC_ECU_UART_PACKET_FAIL;
} }
} }
EXIT: EXIT:
return PktLen; return PktLen;
} }
PacketRetCode_t xECU_ReadCANDataOverUART(EcuUartHandle_s* prvUartHandle, uint8_t* pucBuf, uint32_t* ulId) IVEC_ECU_UartPacketRetCode_e IVEC_ECU_Uart_ReadCANDataOverUART(IVEC_ECU_UartHandle_s* prvUartHandle, uint8_t* pucBuf, uint32_t* ulId)
{ {
PacketRetCode_t retCode = PACKET_FAIL; IVEC_ECU_UartPacketRetCode_e retCode = IVEC_ECU_UART_PACKET_FAIL;
retCode = xECU_ReadCANDataLenOverUART(prvUartHandle, pucBuf, ulId); retCode = IVEC_ECU_Uart_ReadCANDataLenOverUART(prvUartHandle, pucBuf, ulId);
return retCode; return retCode;
} }
IVEC_EcuCommonErr_e IVEC_ECU_Uart_Write(IVEC_ECU_UartHandle_s* prvUartHandle, uint8_t* pucBuffer, uint16_t len)
IVEC_EcuCommonErr_e xECU_UartWrite(EcuUartHandle_s* prvUartHandle, uint8_t* pucBuffer, uint16_t len)
{ {
IVEC_EcuCommonErr_e l_xFuncStatus = commonECU_WRITE_FAIL; IVEC_EcuCommonErr_e l_xFuncStatus = commonECU_WRITE_FAIL;
uint8_t l_i32Ret; uint8_t l_i32Ret;
if (prvUartHandle == NULL) if (prvUartHandle == NULL)
@ -282,10 +284,9 @@ IVEC_EcuCommonErr_e xECU_UartWrite(EcuUartHandle_s* prvUartHandle, uint8_t* pucB
l_xFuncStatus = commonECU_INVALID_PARAM; l_xFuncStatus = commonECU_INVALID_PARAM;
} }
l_i32Ret = xMCAL_UartWrite(&prvUartHandle->__xUartHandle, pucBuffer, len); l_i32Ret = xMCAL_UartWrite(&prvUartHandle->__xUartHandle, pucBuffer, len);
if (l_i32Ret == commonMCAL_SUCCESS) if (l_i32Ret == IVEC_CORE_STATUS_SUCCESS)
{ {
l_xFuncStatus = commonECU_SUCCESS; l_xFuncStatus = commonECU_SUCCESS;
} }
@ -293,437 +294,25 @@ IVEC_EcuCommonErr_e xECU_UartWrite(EcuUartHandle_s* prvUartHandle, uint8_t* pucB
return l_xFuncStatus; return l_xFuncStatus;
} }
IVEC_ECU_UartPacketRetCode_e IVEC_ECU_Uart_FormatPacket(IVEC_ECU_UartHandle_s* prvUartHandle, uint8_t* pucData, uint8_t ucDlc, uint32_t ulId)
PacketRetCode_t xECU_FormatUartPacket(EcuUartHandle_s* prvUartHandle, uint8_t* pucData, uint8_t ucDlc, uint32_t ulId)
{ {
pucData[0] = 0xb5; //SYNC_CHAR[0]; pucData[0] = 0xb5; // SYNC_CHAR[0]
pucData[1] = 0x62; //SYNC_CHAR[1]; pucData[1] = 0x62; // SYNC_CHAR[1]
pucData[2] = ucDlc; pucData[2] = ucDlc;
memcpy(&pucData[3], &ulId, sizeof(uint32_t)); memcpy(&pucData[3], &ulId, sizeof(uint32_t));
unsigned char checksum[2] = { 0 }; unsigned char checksum[2] = { 0 };
prvChecksumCalculate(pucData, (ucDlc + PKT_HEADER_FOOTER), checksum); IVEC_ECU_CalculateChecksum(pucData, (ucDlc + IVEC_ECU_UART_PKT_HEADER_FOOTER), checksum);
pucData[(ucDlc + PKT_HEADER_FOOTER) - 2] = checksum[0]; pucData[(ucDlc + IVEC_ECU_UART_PKT_HEADER_FOOTER) - 2] = checksum[0];
pucData[(ucDlc + PKT_HEADER_FOOTER) - 1] = checksum[1]; pucData[(ucDlc + IVEC_ECU_UART_PKT_HEADER_FOOTER) - 1] = checksum[1];
if (xECU_UartWrite(prvUartHandle, pucData, (ucDlc + PKT_HEADER_FOOTER)) != commonECU_SUCCESS) { if (IVEC_ECU_Uart_Write(prvUartHandle, pucData, (ucDlc + IVEC_ECU_UART_PKT_HEADER_FOOTER)) != commonECU_SUCCESS) {
return IVEC_ECU_UART_PACKET_FAIL;
return PACKET_FAIL;
} }
return PACKET_SUCCESS; return IVEC_ECU_UART_PACKET_SUCCESS;
} }
int vECU_InitiateUartToCanTransmit(EcuUartHandle_s* prvUartHandle, uint32_t id, uint8_t* pucData, uint8_t ucLen) int IVEC_ECU_Uart_InitiateTransmit(IVEC_ECU_UartHandle_s* prvUartHandle, uint32_t id, uint8_t* pucData, uint8_t ucLen)
{ {
uint8_t pucBuf[MAX_PACKET_LENGTH] = { 0 }; uint8_t pucBuf[IVEC_ECU_UART_MAX_PACKET_LENGTH] = { 0 };
memcpy(&pucBuf[PKT_HEADER], pucData, ucLen); memcpy(&pucBuf[IVEC_ECU_UART_PKT_HEADER], pucData, ucLen);
return (xECU_FormatUartPacket(prvUartHandle, pucBuf, ucLen, id) == PACKET_SUCCESS) ? 0 : -1; return (IVEC_ECU_Uart_FormatPacket(prvUartHandle, pucBuf, ucLen, id) == IVEC_ECU_UART_PACKET_SUCCESS) ? 0 : -1;
} }
//#include "../ivec_ECU/ivec_ecu_uart/inc/ivec_ecu_uart.h"
//#include "ivec_cmplx_queue.h"
//#include "../Core/Include/ivec_mcal_uart.h"
////#include <..\Core\Include\ivec_mcal_timer.h>
////#include "ivec_mcal_uart.h"
//
//#define LOG_STRING "ivec-ecu-UART"
//#define CAN_UART_BUFFER_MAX_SIZE 4096
//#define DATA_PACKET_TIMEOUT 300
//
//CmplxFifoQueueHandle_s __gprv_MyEcuUARTResponseQueue = { 0 };
//
//static uint8_t __gprv_u8CANUartDataBuffer[CAN_UART_BUFFER_MAX_SIZE];
//static uint32_t __gprv_u32CanUartDataAvailable = 0;
//
//int uartCount = 1;
//
//
//static void __prv_vEcu_CANOverUartMsgCallback(IVEC_McalUartEvents_e eIndType, char* pucBuffer, uint32_t u32Size)
//{
// if(eIndType == IVEC_MCAL_UART_EVENT_RX_ARRIVED){
// if( u8CMPLX_FifoEnqueue(&__gprv_MyEcuUARTResponseQueue, pucBuffer, u32Size) )
// __gprv_u32CanUartDataAvailable += u32Size;
// }
//}
//
//static void prvChecksumCalculate(uint8_t* pkt, int len, uint8_t *ck) {
// uint8_t mck_a = 0, mck_b = 0;
// /*Incremented to ignore Sync data*/
// for (int i = 2; i < len - 2; i++) {
// mck_a += pkt[i];
// mck_b += mck_a;
// }
// mck_a &= 0xFF;
// mck_b &= 0xFF;
// ck[0] = mck_a;
// ck[1] = mck_b;
//}
//
//
//IVEC_EcuCommonErr_e xECU_UARTInit(McalUartHandle_s* prvUartHandle, uint32_t speed)
//{
// IVEC_ECU_FUNC_ENTRY(LOG_STRING);
// IVEC_EcuCommonErr_e l_xFuncStatus = commonECU_SUCCESS;
// uint8_t l_i32Ret;
//
// IVEC_ECU_LOG(LOG_STRING, "UART Initilising Queue");
// __gprv_MyEcuUARTResponseQueue.i32ElementSize = sizeof(uint8_t);
// __gprv_MyEcuUARTResponseQueue.i32TotalElements = CAN_UART_BUFFER_MAX_SIZE;
// __gprv_MyEcuUARTResponseQueue.pu8Buffer = (uint8_t*)__gprv_u8CANUartDataBuffer;
// __gprv_MyEcuUARTResponseQueue.i32QueueType = FIXED_ELEMENT_SIZE_QUEUE;
// l_i32Ret = u8CMPLX_FifoQueueInit(&__gprv_MyEcuUARTResponseQueue);
// if (l_i32Ret == 0)
// {
// l_xFuncStatus = commonECU_FAIL;
// goto exit;
// }
//
// IVEC_ECU_LOG(LOG_STRING, "Initilising UART");
// #if (UART_PIN_SELECTION == 1)
// prvUartHandle->eUartPortNumber = mcalUART_PORT3;
//
// #elif (UART_PIN_SELECTION == 2 )
// prvUartHandle->eUartPortNumber = mcalUART_PORT2;
// #elif (UART_PIN_SELECTION == 3)
// if(uartCount == 1)
// {
// prvUartHandle->eUartPortNumber = mcalUART_PORT2;
// uartCount = 2;
// }
// else
// {
// prvUartHandle->eUartPortNumber = mcalUART_PORT3;
// uartCount = 1;
// }
//
//
// #endif
//
// prvUartHandle->pvUartRecvCallback = __prv_vEcu_CANOverUartMsgCallback;
// prvUartHandle->xUartConfig.eUartBaudrate = speed;
// prvUartHandle->xUartConfig.eUartFlowCtrl = mcalUART_FC_NONE;
// prvUartHandle->xUartConfig.eUartDataBit = mcalUART_DATABIT_8;
// prvUartHandle->xUartConfig.eUartStopBit = mcalUART_STOP_1;
// prvUartHandle->xUartConfig.eUartParityBit = mcalUART_PARITY_NONE;
// l_i32Ret = xMCAL_UartInit(prvUartHandle);
//
//
// if (l_i32Ret != 0)
// {
// l_xFuncStatus = commonECU_INIT_FAIL;
// goto exit;
// }
//
//
// exit:
// IVEC_ECU_FUNC_EXIT(LOG_STRING, 0);
// return l_xFuncStatus;
//
//}
//
//
//IVEC_EcuCommonErr_e xECU_UARTDeInit(McalUartHandle_s* prvUartHandle)
//{
// IVEC_ECU_FUNC_ENTRY(LOG_STRING);
// uint8_t l_i32Ret;
// IVEC_EcuCommonErr_e l_xFuncStatus = commonECU_SUCCESS;
// if (prvUartHandle == NULL)
// {
// l_xFuncStatus = commonECU_ALREADY_DEINIT;
// goto exit;
// }
// IVEC_ECU_LOG(LOG_STRING, "DeInitilising CAN");
// l_i32Ret = xMCAL_UartDeInit(prvUartHandle);
// if (l_i32Ret != 0)
// {
// l_xFuncStatus = commonECU_DEINIT_FAIL;
// goto exit;
// }
// memset((CmplxFifoQueueHandle_s*)&__gprv_MyEcuUARTResponseQueue, 0, sizeof(__gprv_MyEcuUARTResponseQueue));
// exit:
// IVEC_ECU_FUNC_EXIT(LOG_STRING, 0);
// return l_xFuncStatus;
//}
//
//
//IVEC_EcuCommonErr_e xECU_UARTReInit(McalUartHandle_s *prvUartHandle, uint32_t speed)
//{
// IVEC_EcuCommonErr_e l_xFuncStatus = commonECU_SUCCESS;
// uint8_t l_i32Ret;
// l_i32Ret = xECU_UARTDeInit(prvUartHandle);
// if(l_i32Ret != IVEC_MCAL_STATUS_SUCCESS)
// {
// l_xFuncStatus = commonECU_DEINIT_FAIL;
// }
//
// l_i32Ret = xECU_UARTInit(prvUartHandle, speed);
//
// if(l_i32Ret != IVEC_MCAL_STATUS_SUCCESS)
// {
// l_xFuncStatus = commonECU_INIT_FAIL;
// }
// return l_xFuncStatus;
//}
//
//
//
//IVEC_EcuCommonErr_e xECU_UARTTransmit(McalUartHandle_s *prvUartHandle, uint8_t* pucBuffer, uint16_t len)
//{
// return commonECU_SUCCESS;
//}
//
//
//IVEC_EcuCommonErr_e xECU_UARTGetData(McalUartHandle_s *prvUartHandle, uint8_t* pucBuffer, uint16_t len, uint16_t timeout)
//{
// IVEC_ECU_FUNC_ENTRY(LOG_STRING);
//
// IVEC_EcuCommonErr_e l_xFuncStatus = commonECU_SUCCESS;
// if (prvUartHandle == NULL)
// {
// l_xFuncStatus = commonECU_INVALID_PARAM;
// goto exit;
// }
//
// uint8_t ijk = 0;
// int l_u32Len = 0;
// uint32_t u32CommTimestamp = i32MCAL_getTicks();
//
// while(((i32MCAL_getTicks()-u32CommTimestamp) <= timeout+1) && (ijk < len))
// {
//
// if(!u8CMPLX_FifoQueueEmpty(&__gprv_MyEcuUARTResponseQueue)){
// if( u8CMPLX_FifoDequeue(&__gprv_MyEcuUARTResponseQueue, &pucBuffer[ijk], &l_u32Len, 0) == 1 )
// ijk++;
// }
// }
//
// if (ijk != len)
// {
// l_xFuncStatus = commonECU_READ_FAIL;
// goto exit;
// }
//
// exit:
// IVEC_ECU_FUNC_EXIT(LOG_STRING, 0);
// return l_xFuncStatus;
//}
//
//
//
//PacketRetCode_t xECU_ReadCANDataLenOverUART(McalUartHandle_s *prvUartHandle, uint8_t* pucBuf, uint32_t *ulId)
//{
// int PktLen = PACKET_FAIL;
// if ((xECU_UARTGetData(prvUartHandle, (uint8_t*) &pucBuf[0], 1, 0) == commonECU_SUCCESS))
// {
// if (pucBuf[0] == 0xB5)
// {
// if (xECU_UARTGetData(prvUartHandle, (uint8_t*) &pucBuf[1], 1, 5) == commonECU_SUCCESS){
// if (pucBuf[1] != 0x62){
// PktLen = PACKET_FAIL;
// goto EXIT; //0x62 not found [OUT OF SYNC]
// }
// }
// else
// {
// PktLen = PACKET_FAIL;
// goto EXIT;
// }
// if (xECU_UARTGetData(prvUartHandle, (uint8_t*) &pucBuf[2], 5, DATA_PACKET_TIMEOUT) != commonECU_SUCCESS){
// PktLen = PACKET_FAIL;
// goto EXIT;
// }
//
// *(ulId) = (uint32_t)((pucBuf[6] << 24) | (pucBuf[5] << 16) | (pucBuf[4] << 8) | (pucBuf[3] << 0));
// uint8_t l_ucTempLen = pucBuf[2];
// PktLen = PKT_HEADER_FOOTER + l_ucTempLen;
// if (xECU_UARTGetData(prvUartHandle, (uint8_t*) &pucBuf[PKT_HEADER], (uint32_t)(PktLen - PKT_HEADER), DATA_PACKET_TIMEOUT) != commonECU_SUCCESS)
// {
// PktLen = PACKET_FAIL;
// goto EXIT;
// }
// uint8_t checksum[2];
// prvChecksumCalculate(pucBuf, PktLen, checksum);
//
// /*TODO: (Python Script)Some Times Fails due to Bad Checksum*/
// if ((checksum[0] == pucBuf[PktLen - 2]) && (checksum[1] == pucBuf[PktLen - 1])) {
// PktLen -= PKT_HEADER_FOOTER;
// } else
// {
// IVEC_ECU_LOG(LOG_STRING, "Packet Checksum Failed\n");
// PktLen = PACKET_FAIL;
// }
// } else
// {
//// COM_FlushBuffer();
// PktLen = PACKET_FAIL;
// }
// }
//EXIT:
// return PktLen;
//}
//
//PacketRetCode_t xECU_ReadCANDataOverUART(McalUartHandle_s* prvUartHandle ,uint8_t* pucBuf, uint32_t *ulId)
//{
// PacketRetCode_t retCode = PACKET_FAIL;
// retCode = xECU_ReadCANDataLenOverUART(prvUartHandle, pucBuf, ulId);
// return retCode;
//}
//
//
//IVEC_EcuCommonErr_e xECU_UartWrite(McalUartHandle_s* prvUartHandle, uint8_t* pucBuffer, uint16_t len)
//{
//
// IVEC_EcuCommonErr_e l_xFuncStatus = commonECU_WRITE_FAIL;
// uint8_t l_i32Ret;
// if (prvUartHandle == NULL)
// {
// l_xFuncStatus = commonECU_INVALID_PARAM;
// }
//
//
// l_i32Ret = xMCAL_UartWrite(prvUartHandle, pucBuffer, len);
//
// if(l_i32Ret == commonMCAL_SUCCESS)
// {
// l_xFuncStatus = commonECU_SUCCESS;
// }
//
// return l_xFuncStatus;
//}
//
//
//PacketRetCode_t xECU_FormatUartPacket(McalUartHandle_s* prvUartHandle, uint8_t* pucData, uint8_t ucDlc, uint32_t ulId)
//{
// pucData[0] = 0xb5; //SYNC_CHAR[0];
// pucData[1] = 0x62; //SYNC_CHAR[1];
// pucData[2] = ucDlc;
// memcpy(&pucData[3], &ulId, sizeof(uint32_t));
// unsigned char checksum[2] = { 0 };
// prvChecksumCalculate(pucData, (ucDlc+PKT_HEADER_FOOTER), checksum);
// pucData[(ucDlc + PKT_HEADER_FOOTER) - 2] = checksum[0];
// pucData[(ucDlc + PKT_HEADER_FOOTER) - 1] = checksum[1];
// if (xECU_UartWrite(prvUartHandle, pucData, (ucDlc + PKT_HEADER_FOOTER)) != commonECU_SUCCESS) {
//
// return PACKET_FAIL;
// }
// return PACKET_SUCCESS;
//}
//
//int vECU_InitiateUartToCanTransmit(McalUartHandle_s* prvUartHandle, uint32_t id, uint8_t *pucData, uint8_t ucLen)
//{
// uint8_t pucBuf[MAX_PACKET_LENGTH] = {0};
// memcpy(&pucBuf[PKT_HEADER], pucData, ucLen);
// return ( xECU_FormatUartPacket(prvUartHandle, pucBuf, ucLen, id) == PACKET_SUCCESS ) ? 0 : -1;
//}

12
ivec_RTE/inc/ivec_rte.h
View File

@ -12,13 +12,13 @@
#include "stdint.h" #include "stdint.h"
#include "ti_msp_dl_config.h" #include "ti_msp_dl_config.h"
// Function Declarations
void vRTE_MatlabInit(void); void vRTE_MatlabInit(void);
void vRTE_MatlabRun(void); void vRTE_MatlabRun(void);
void vApp_Init(void); void vRTE_AppInit(void);
void vApp_RunInit(void); void vRTE_AppRunInit(void);
void vRTE_InitUARTCANEcho(void); void vRTE_InitUartCanEcho(void);
void vRTE_UARTDataProcess(void); void vRTE_ProcessUartData(void);
void vRTE_CANDataProcess(void); void vRTE_ProcessCanData(void);
#endif /* IVEC_RTE_INC_IVEC_RTE_H_ */ #endif /* IVEC_RTE_INC_IVEC_RTE_H_ */

424
ivec_RTE/src/ivec_rte.c
View File

@ -14,115 +14,53 @@
#include "../../TM1650_SDK/inc/ivec_TM1650.h" #include "../../TM1650_SDK/inc/ivec_TM1650.h"
EcuUartHandle_s g_xUartHandle; #include "ivec_rte.h"
EcuUartHandle_s g_xUart2Handle;
// UART_PIN_SELECTION values: // UART Handles
// 1 - Basil Battery Smart IVEC_ECU_UartHandle_s g_xEcuUartHandle;
// 2 - Basil IVEC_ECU_UartHandle_s g_xEcuUart2Handle;
#define CONFIG_BASIL_BATTERY_SMART 1
#define CONFIG_BASIL 2
#define UART_PIN_SELECTION CONFIG_BASIL // Set the desired UART configuration here // Configuration Macros
#define ivECU_CONFIG_BASIL_BATTERY_SMART 1
#define ivECU_CONFIG_BASIL 2
// UART Configuration
#define ivECU_UART_PIN_SELECTION ivECU_CONFIG_BASIL_BATTERY_SMART
// Global Variables
uint32_t g_u32UartSpeed = 0; uint32_t g_u32UartSpeed = 0;
xCAN_baud_t g_u16CanSpeed = 0; IVEC_CanBaud_e g_eCanSpeed = 0;
uint8_t g_pu8Buf[MAX_PACKET_LENGTH] = {0}; uint8_t g_pu8UartBuffer[IVEC_ECU_UART_MAX_PACKET_LENGTH] = {0};
volatile uint32_t g_u32CanId = 0x1fffffff; volatile uint32_t g_u32CanId = 0x1FFFFFFF;
#define CAN_UART_BUFFER_MAX_SIZE 4096
volatile uint8_t __gprv_u8CANUartDataBuffer[CAN_UART_BUFFER_MAX_SIZE];
#define MAX_FILTERS 10 // CAN UART Buffer
uint32_t maskValues[MAX_FILTERS]; #define ivECU_CAN_UART_BUFFER_MAX_SIZE 4096
uint32_t filterValues[MAX_FILTERS]; volatile uint8_t g_prvU8CanUartDataBuffer[ivECU_CAN_UART_BUFFER_MAX_SIZE];
bool isExtendedID[MAX_FILTERS];
int maskCount = -1; // CAN Filters
// Buffers to store parsed data #define ivECU_MAX_FILTERS 10
int filterCount = -1; uint32_t g_u32MaskValues[ivECU_MAX_FILTERS];
uint16_t extendedFilter = 0; uint32_t g_u32FilterValues[ivECU_MAX_FILTERS];
uint16_t standardFilter = 0; bool g_bIsExtendedId[ivECU_MAX_FILTERS];
// Filter Counters
int32_t g_i32MaskCount = -1;
int32_t g_i32FilterCount = -1;
static uint8_t __gprv_u8Idx = 0; // Filter Information
static uint8_t __gprv_u8Buf = 0; uint16_t g_u16ExtendedFilter = 0;
uint16_t g_u16StandardFilter = 0;
// Private Static Variables
static uint8_t _prvU8Index = 0;
// External Variables
extern ExtU_socTouchDisplay_T socTouchDisplay_U; extern ExtU_socTouchDisplay_T socTouchDisplay_U;
extern ExtY_socTouchDisplay_T socTouchDisplay_Y; extern ExtY_socTouchDisplay_T socTouchDisplay_Y;
extern volatile bool b_MCAN_InitFlag; /*!< CAN initialization flag */ extern volatile bool g_bMcalMcanInitFlag; /*!< CAN initialization flag */
//DL_MCAN_StdMsgIDFilterElement stdFilterElement;
#define MCAN_FILTER_SIZE 0u
// New configuration instance to override filter settings dynamically
static DL_MCAN_ConfigParams gMCAN0ConfigParamsFiltered = {
.monEnable = false,
.asmEnable = false,
.tsPrescalar = 15,
.tsSelect = 0,
.timeoutSelect = DL_MCAN_TIMEOUT_SELECT_CONT,
.timeoutPreload = 65535,
.timeoutCntEnable = false,
// Dynamic filter settings based on need
.filterConfig.rrfs = false,
.filterConfig.rrfe = false,
.filterConfig.anfe = 3, // Accept extended ID filter elements
.filterConfig.anfs = 3, // Accept standard ID filter elements
};
// Adjust MsgRAMConfigParams as necessary for filter list sizes
static DL_MCAN_MsgRAMConfigParams gMCAN0MsgRAMConfigParamsFiltered ={
/* Standard ID Filter List Start Address. */
.flssa = 1,
/* List Size: Standard ID. */
.lss = MCAN_FILTER_SIZE,
/* Extended ID Filter List Start Address. */
.flesa = 48 ,
/* List Size: Extended ID. */
.lse = 0,
/* Tx Buffers Start Address. */
.txStartAddr = 10 ,
/* Number of Dedicated Transmit Buffers. */
.txBufNum = 10 ,
.txFIFOSize = 10,
/* Tx Buffer Element Size. */
.txBufMode = 0,
.txBufElemSize = DL_MCAN_ELEM_SIZE_8BYTES,
/* Tx Event FIFO Start Address. */
.txEventFIFOStartAddr = 640 ,
/* Event FIFO Size. */
.txEventFIFOSize = 10 ,
/* Level for Tx Event FIFO watermark interrupt. */
.txEventFIFOWaterMark = 0,
/* Rx FIFO0 Start Address. */
.rxFIFO0startAddr = 170 ,
/* Number of Rx FIFO elements. */
.rxFIFO0size = 10 ,
/* Rx FIFO0 Watermark. */
.rxFIFO0waterMark = 0,
.rxFIFO0OpMode = 0,
/* Rx FIFO1 Start Address. */
.rxFIFO1startAddr = 190 ,
/* Number of Rx FIFO elements. */
.rxFIFO1size = 10 ,
/* Level for Rx FIFO 1 watermark interrupt. */
.rxFIFO1waterMark = 10,
/* FIFO blocking mode. */
.rxFIFO1OpMode = 0,
/* Rx Buffer Start Address. */
.rxBufStartAddr = 208 ,
/* Rx Buffer Element Size. */
.rxBufElemSize = DL_MCAN_ELEM_SIZE_8BYTES,
/* Rx FIFO0 Element Size. */
.rxFIFO0ElemSize = DL_MCAN_ELEM_SIZE_8BYTES,
/* Rx FIFO1 Element Size. */
.rxFIFO1ElemSize = DL_MCAN_ELEM_SIZE_8BYTES,
};
// CAN Filter Size
#define ivECU_MCAN_FILTER_SIZE 0U
/** /**
* @brief Function to use SDA pin of TM1650 * @brief Function to use SDA pin of TM1650
@ -130,12 +68,13 @@ static DL_MCAN_MsgRAMConfigParams gMCAN0MsgRAMConfigParamsFiltered ={
* @param state the value to write on SDA pin (0 or 1) * @param state the value to write on SDA pin (0 or 1)
* @returns none * @returns none
*/ */
void mcu_tempDataPin(uint8_t state)
void vRTE_SetMcuTempDataPin(uint8_t u8State)
{ {
if(state == 0){ if(u8State == 0){
vMCAL_gpioWrite(TM1650_PORT, TM1650_SDA_PIN_PIN, 0); vMCAL_gpioWrite(TM1650_PORT, TM1650_SDA_PIN_PIN, 0);
} }
else if(state == 1){ else if(u8State == 1){
vMCAL_gpioWrite(TM1650_PORT, TM1650_SDA_PIN_PIN, 1); vMCAL_gpioWrite(TM1650_PORT, TM1650_SDA_PIN_PIN, 1);
} }
} }
@ -146,11 +85,12 @@ void mcu_tempDataPin(uint8_t state)
* @param state the value to write on SDA pin (0 or 1) * @param state the value to write on SDA pin (0 or 1)
* @returns none * @returns none
*/ */
void mcu_tempClkPin(uint8_t state){ void vRTE_McuSetTempClkPin(uint8_t u8State)
if(state == 0){ {
if(u8State == 0){
vMCAL_gpioWrite(TM1650_PORT, TM1650_SCL_PIN_PIN, 0); vMCAL_gpioWrite(TM1650_PORT, TM1650_SCL_PIN_PIN, 0);
} }
else if(state == 1){ else if(u8State == 1){
vMCAL_gpioWrite(TM1650_PORT, TM1650_SCL_PIN_PIN, 1); vMCAL_gpioWrite(TM1650_PORT, TM1650_SCL_PIN_PIN, 1);
} }
} }
@ -161,19 +101,19 @@ void mcu_tempClkPin(uint8_t state){
* @param none * @param none
* @returns Value of GPIO (0 or 1) * @returns Value of GPIO (0 or 1)
*/ */
uint8_t mcu_tempDataReadPin(void){ static uint8_t _prvRteReadMcuTempPin(void) {
uint8_t readBuff = 0; uint8_t l_u8ReadBuffer = 0;
vMCAL_set_gpioDirection(TM1650_SDA_PIN_IOMUX,false); vMCAL_set_gpioDirection(TM1650_SDA_PIN_IOMUX,false);
readBuff = u32MCAL_gpioRead(TM1650_PORT, TM1650_SDA_PIN_PIN); l_u8ReadBuffer = u32MCAL_gpioRead(TM1650_PORT, TM1650_SDA_PIN_PIN);
vMCAL_set_gpioDirection(TM1650_SDA_PIN_IOMUX,true); vMCAL_set_gpioDirection(TM1650_SDA_PIN_IOMUX,true);
return readBuff; return l_u8ReadBuffer;
} }
void vRTE_MatlabInit(void) void vRTE_MatlabInit(void)
{ {
u8MCAL_gpioInit(); u8MCAL_gpioInit();
tm1650_Init(TM_1650_BRIGHT_8, TM_1650_Segment_8, TM_1650_Normal_Mode, TM_1650_Screen_ON, TM_1650_DIG_3, (void*)&mcu_tempDataPin , (void*)&mcu_tempClkPin , &mcu_tempDataReadPin); tm1650_Init(TM_1650_BRIGHT_8, TM_1650_Segment_8, TM_1650_Normal_Mode, TM_1650_Screen_ON, TM_1650_DIG_3, (void*)&vRTE_SetMcuTempDataPin , (void*)&vRTE_McuSetTempClkPin , &_prvRteReadMcuTempPin);
tm1650_displaySwitch(TM_1650_Screen_OFF); tm1650_displaySwitch(TM_1650_Screen_OFF);
vMCAL_DelayTicks(500); vMCAL_DelayTicks(500);
tm1650_showDot(TM_1650_DIG_1,false); tm1650_showDot(TM_1650_DIG_1,false);
@ -192,7 +132,7 @@ void vRTE_MatlabRun(void)
socTouchDisplay_step(); socTouchDisplay_step();
memset(&socTouchDisplay_U.Input[0], 0, sizeof(CAN_MESSAGE_BUS)*MAX_CAN_MESSAGE_INSTANCE); memset(&socTouchDisplay_U.Input[0], 0, sizeof(CAN_MESSAGE_BUS)*MAX_CAN_MESSAGE_INSTANCE);
__gprv_u8Idx = 0; _prvU8Index = 0;
if( socTouchDisplay_Y.op_bDisplayStatus ) if( socTouchDisplay_Y.op_bDisplayStatus )
{ {
@ -238,279 +178,159 @@ void vRTE_MatlabRun(void)
} }
} }
void vApp_Init(void) void vRTE_AppInit(void)
{ {
#if UART_PIN_SELECTION == 1 #if ivECU_UART_PIN_SELECTION == 1
vRTE_MatlabInit(); vRTE_MatlabInit();
#endif #endif
vRTE_InitUARTCANEcho(); vRTE_InitUartCanEcho();
} }
void vRTE_InitUARTCANEcho(void) void vRTE_InitUartCanEcho(void)
{ {
g_u32UartSpeed = mcalUART_BAUD_115200; g_u32UartSpeed = eMcalUartBaud115200;
g_u16CanSpeed = BAUD_500; g_eCanSpeed = IVEC_CAN_BAUD_500;
g_xUartHandle.u8Qbuffer = __gprv_u8CANUartDataBuffer; g_xEcuUartHandle.u8Qbuffer = g_prvU8CanUartDataBuffer;
g_xUartHandle.u16QbufSize = CAN_UART_BUFFER_MAX_SIZE; g_xEcuUartHandle.u16QbufSize = ivECU_CAN_UART_BUFFER_MAX_SIZE;
#if (UART_PIN_SELECTION == 1) #if (ivECU_UART_PIN_SELECTION == 1)
g_xUartHandle.eUartPortNumber = ecuUART_PORT3; g_xEcuUartHandle.eUartPortNumber = IVEC_ECU_UART_PORT3;
#elif (UART_PIN_SELECTION == 2) #elif (ivECU_UART_PIN_SELECTION == 2)
g_xUartHandle.eUartPortNumber = ecuUART_PORT2; g_xEcuUartHandle.eUartPortNumber = IVEC_ECU_UART_PORT2;
#endif #endif
xECU_UARTInit(&g_xUartHandle, g_u32UartSpeed); IVEC_ECU_Uart_Init(&g_xEcuUartHandle, g_u32UartSpeed);
vECU_CAN_Init(CANFD0,g_eCanSpeed);
// #if UART_PIN_SELECTION == 3
// xECU_UARTInit(&g_xUart2Handle, g_u32UartSpeed);
// #endif
xECU_CANInit(CANFD0,g_u16CanSpeed);
} }
void vApp_RunInit(void) void vRTE_AppRunInit(void)
{ {
vRTE_UARTDataProcess(); vRTE_ProcessUartData();
vRTE_CANDataProcess(); vRTE_ProcessCanData();
} }
void vMCAL_TimerCallback(void) void vMCAL_TimerCallback(void)
{ {
#if UART_PIN_SELECTION == 1 #if ivECU_CONFIG_BASIL_BATTERY_SMART == 1
vRTE_MatlabRun(); vRTE_MatlabRun();
#endif #endif
DL_TimerA_clearInterruptStatus(TIMER_1_INST, GPTIMER_CPU_INT_IMASK_Z_SET); DL_TimerA_clearInterruptStatus(TIMER_1_INST, GPTIMER_CPU_INT_IMASK_Z_SET);
} }
void vCanFilterMaskSaveVal(uint8_t ucIdx, uint32_t mask, bool isExtended) void vRTE_CanFilterMaskSaveVal(uint8_t u8Idx, uint32_t u32Mask, bool bIsExtended)
{ {
maskCount = ucIdx; g_i32MaskCount = u8Idx;
maskValues[maskCount] = mask; g_u32MaskValues[g_i32MaskCount] = u32Mask;
} }
void vRTE_CanFilterSaveVal(uint8_t u8Idx, uint32_t u32Filter, bool bIsExtended)
void vCanFilterSaveVal(uint8_t ucIdx, uint32_t Filter, bool isExtended)
{ {
filterCount = ucIdx; g_i32FilterCount = u8Idx;
// Store filter value // Store filter value
filterValues[filterCount] = Filter; g_u32FilterValues[g_i32FilterCount] = u32Filter;
} }
void vRTE_ProcessUartData(void)
void vCanFilterReset() {
uint32_t i;
DL_MCAN_setOpMode(CANFD0, DL_MCAN_OPERATION_MODE_SW_INIT);
// Reset all standard ID filters
for (i = 0; i < MAX_FILTERS; i++) {
DL_MCAN_StdMsgIDFilterElement stdFilterElement = {0};
stdFilterElement.sfec = 001; // Disable filter element
stdFilterElement.sft = 11; // Disable filter type
DL_MCAN_addStdMsgIDFilter(CANFD0, i, &stdFilterElement);
}
// Reset all extended ID filters
for (i = 0; i < MAX_FILTERS; i++) {
DL_MCAN_ExtMsgIDFilterElement extFilterElement = {0};
extFilterElement.efec = 000; // Disable filter element
extFilterElement.eft = 11; // Disable filter type
DL_MCAN_addExtMsgIDFilter(CANFD0, i, &extFilterElement);
}
/* Set Extended ID Mask. */
DL_MCAN_setExtIDAndMask(CANFD0, (0x1FFFFFFFU));
/* Take MCAN out of the SW initialization mode */
DL_MCAN_setOpMode(CANFD0, DL_MCAN_OPERATION_MODE_NORMAL);
}
// Function to configure CAN filters
void vCanConfigFilter() {
//xECU_CanReInit(CANFD0,g_u16CanSpeed);
DL_MCAN_setOpMode(CANFD0, DL_MCAN_OPERATION_MODE_SW_INIT);
for (int i = 0; i <= maskCount; i++)
{ {
if((filterValues[i] > 0x7FF) || (maskValues[i] > 0x7FF)) IVEC_ECU_UartPacketRetCode_e eRetCode = IVEC_ECU_UART_PACKET_FAIL;
uint32_t l_u32Id = 0x1fffffff;
eRetCode= IVEC_ECU_Uart_ReadCANDataOverUART(&g_xEcuUartHandle,g_pu8UartBuffer,&l_u32Id);
l_u32Id &= 0x1fffffff;
if(eRetCode > -1)
{ {
isExtendedID[i] = 1; if(eRetCode > 0 && l_u32Id == 0x00)
extendedFilter++;
}
else
{ {
isExtendedID[i] = 0; uint32_t l_u32Baudrate = 0;
standardFilter++; uint8_t l_u8Mode = g_pu8UartBuffer[IVEC_ECU_UART_PKT_HEADER];
} memcpy(&l_u32Baudrate, &g_pu8UartBuffer[IVEC_ECU_UART_PKT_HEADER+1], (uint32_t)eRetCode);
} IVEC_ECU_Uart_InitiateTransmit(&g_xEcuUartHandle, 0x01, g_pu8UartBuffer, 0);
if( l_u8Mode == 0 )
gMCAN0MsgRAMConfigParamsFiltered.lse = extendedFilter; //0; // Set dynamically based on actual filters
gMCAN0MsgRAMConfigParamsFiltered.lss = standardFilter; //1; // Set dynamically based on actual filters
DL_MCAN_config(CANFD0, (DL_MCAN_ConfigParams*) &gMCAN0ConfigParamsFiltered);
DL_MCAN_msgRAMConfig(CANFD0, (DL_MCAN_MsgRAMConfigParams*) &gMCAN0MsgRAMConfigParamsFiltered);
uint8_t extendedFilterNumber = 0;
uint8_t stadardFilterNumber = 0;
for (int i = 0; i <= maskCount; i++) {
if (isExtendedID[i]) {
// Extended ID filter
DL_MCAN_ExtMsgIDFilterElement extFilterElement;
extFilterElement.efid1 = filterValues[i];
extFilterElement.efid2 = maskValues[i];
extFilterElement.efec = 001;
extFilterElement.eft = 10;
DL_MCAN_addExtMsgIDFilter(CANFD0, extendedFilterNumber, &extFilterElement);
// filterValues[i] = 0;
// maskValues[i] = 0;
extendedFilterNumber++;
}
else {
// Standard ID filter
DL_MCAN_StdMsgIDFilterElement stdFilterElement;
stdFilterElement.sfid1 = filterValues[i];
stdFilterElement.sfid2 = maskValues[i];
stdFilterElement.sfec = 001;
stdFilterElement.sft = 10;
DL_MCAN_addStdMsgIDFilter(CANFD0, stadardFilterNumber, &stdFilterElement);
// filterValues[i] = 0;
// maskValues[i] = 0;
stadardFilterNumber++;
}
}
/* Set Extended ID Mask. */
DL_MCAN_setExtIDAndMask(CANFD0, (0x1FFFFFFFU));
/* Take MCAN out of the SW initialization mode */
DL_MCAN_setOpMode(CANFD0, DL_MCAN_OPERATION_MODE_NORMAL);
// Reset counters after applying filters
// maskCount = 0;
// filterCount = 0;
extendedFilter = 0;
standardFilter = 0;
}
void vRTE_UARTDataProcess(void)
{ {
PacketRetCode_t retCode = PACKET_FAIL; g_u32UartSpeed = l_u32Baudrate;
uint32_t ulId = 0x1fffffff; IVEC_ECU_Uart_Reinit(&g_xEcuUartHandle, g_u32UartSpeed);
retCode= xECU_ReadCANDataOverUART(&g_xUartHandle,g_pu8Buf,&ulId);
ulId &= 0x1fffffff;
if(retCode > -1)
{
if(retCode > 0 && ulId == 0x00)
{
uint32_t baudrate = 0;
uint8_t mode = g_pu8Buf[PKT_HEADER];
memcpy(&baudrate, &g_pu8Buf[PKT_HEADER+1], (uint32_t)retCode);
vECU_InitiateUartToCanTransmit(&g_xUartHandle, 0x01, g_pu8Buf, 0);
if( mode == 0 )
{
g_u32UartSpeed = baudrate;
xECU_UARTReInit(&g_xUartHandle, g_u32UartSpeed);
} }
else if( mode == 1 ) else if( l_u8Mode == 1 )
{ {
g_u16CanSpeed = (uint16_t)baudrate; g_eCanSpeed = (uint16_t)l_u32Baudrate;
xECU_CanReInit(CANFD0, g_u16CanSpeed); vECU_CAN_ReInit(CANFD0, g_eCanSpeed);
} }
else if( mode == 2 ) else if( l_u8Mode == 2 )
{ {
if( g_pu8Buf[PKT_HEADER+1] != 0 ){//22(20+2) rx filter available send each id in a frame if( g_pu8UartBuffer[IVEC_ECU_UART_PKT_HEADER+1] != 0 ){//22(20+2) rx filter available send each id in a frame
uint32_t filterId = 0; uint32_t filterId = 0;
memcpy(&filterId, &g_pu8Buf[PKT_HEADER+3], sizeof(uint32_t)); memcpy(&filterId, &g_pu8UartBuffer[IVEC_ECU_UART_PKT_HEADER+3], sizeof(uint32_t));
bool isExtended = 0; bool isExtended = 0;
isExtended = (filterId > 0x7FF); // Standard IDs are <= 0x7FF isExtended = (filterId > 0x7FF); // Standard IDs are <= 0x7FF
vCanFilterSaveVal((g_pu8Buf[PKT_HEADER+1] - 1), filterId, isExtended); vRTE_CanFilterSaveVal((g_pu8UartBuffer[IVEC_ECU_UART_PKT_HEADER+1] - 1), filterId, isExtended);
if( g_pu8Buf[PKT_HEADER+2] )//All filter received. Trigger Filter Settings if( g_pu8UartBuffer[IVEC_ECU_UART_PKT_HEADER+2] )//All filter received. Trigger Filter Settings
{ {
//vCanFilterReset(); vECU_CAN_ReInit(CANFD0,g_eCanSpeed);
xECU_CanReInit(CANFD0,g_u16CanSpeed);
//vCanConfigFilter();
} }
else else
return; return;
} }
else{ else{
vECU_CAN_ReInit(CANFD0,g_eCanSpeed);
// memset(maskValues, 0, sizeof(maskValues));
// memset(vCanFilterReset, 0, sizeof(vCanFilterReset));
//vCanFilterReset();
xECU_CanReInit(CANFD0,g_u16CanSpeed);
//maskCount = -1;
//vCanConfigFilter();
} }
} }
else if ( mode == 3 ) else if ( l_u8Mode == 3 )
{ {
if( (g_pu8Buf[PKT_HEADER+1] < 1) || (g_pu8Buf[PKT_HEADER+1] > 8) )//0-7 maximum received pkts if( (g_pu8UartBuffer[IVEC_ECU_UART_PKT_HEADER+1] < 1) || (g_pu8UartBuffer[IVEC_ECU_UART_PKT_HEADER+1] > 8) )//0-7 maximum received pkts
return; return;
uint32_t maskId = 0; uint32_t maskId = 0;
memcpy(&maskId, &g_pu8Buf[PKT_HEADER+3], sizeof(uint32_t)); memcpy(&maskId, &g_pu8UartBuffer[IVEC_ECU_UART_PKT_HEADER+3], sizeof(uint32_t));
bool isExtended = 0; bool isExtended = 0;
isExtended = (maskId > 0x7FF); // Standard IDs are <= 0x7FF isExtended = (maskId > 0x7FF); // Standard IDs are <= 0x7FF
vCanFilterMaskSaveVal((g_pu8Buf[PKT_HEADER+1] - 1), maskId, isExtended); vRTE_CanFilterMaskSaveVal((g_pu8UartBuffer[IVEC_ECU_UART_PKT_HEADER+1] - 1), maskId, isExtended);
} }
else if (mode == 100) else if (l_u8Mode == 100)
{ {
g_u32CanId = baudrate; g_u32CanId = l_u32Baudrate;
return; return;
} }
vMCAL_DelayTicks(100); vMCAL_DelayTicks(100);
vECU_InitiateUartToCanTransmit(&g_xUartHandle, 0x01, g_pu8Buf, 0); IVEC_ECU_Uart_InitiateTransmit(&g_xEcuUartHandle, 0x01, g_pu8UartBuffer, 0);
} }
if ( retCode == 0 && ulId == 0){ if ( eRetCode == 0 && l_u32Id == 0){
vECU_InitiateUartToCanTransmit(&g_xUartHandle, 0x0, g_pu8Buf, 0); //interface okay response IVEC_ECU_Uart_InitiateTransmit(&g_xEcuUartHandle, 0x0, g_pu8UartBuffer, 0); //interface okay response
} }
if ( retCode >= 0 && (ulId > 0x00 && ulId < 0xffffffff) ) if ( eRetCode >= 0 && (l_u32Id > 0x00 && l_u32Id < 0xffffffff) )
{ {
//__gprv_u8Buf = (__gprv_u8Buf + 1) % 2; //_prvU8Buffer = (_prvU8Buffer + 1) % 2;
xECU_WriteDataOverCAN(&g_pu8Buf[PKT_HEADER], ulId, retCode, 0); vECU_WriteDataOverCAN(&g_pu8UartBuffer[IVEC_ECU_UART_PKT_HEADER], l_u32Id, eRetCode, 0);
} }
} }
} }
void vRTE_CANDataProcess(void) void vRTE_ProcessCanData(void)
{ {
can_buff_t xBuff = { 0x00 }; IVEC_ECU_CANBuff_s l_xCanBuff = { 0x00 };
volatile uint8_t l_u8TxBurstMessages = 0; volatile uint8_t l_u8TxBurstMessages = 0;
while( xECU_CANGetData(&xBuff) == commonECU_SUCCESS ) while( vECU_CAN_GetData(&l_xCanBuff) == commonECU_SUCCESS )
{ {
if( (xBuff.id == 0x16) && (xBuff.data[0] = 'V') && \ if( (l_xCanBuff.ulId == 0x16) && (l_xCanBuff.ucData[0] = 'V') && \
(xBuff.data[1] == 'E') && (xBuff.data[2] == 'C')) (l_xCanBuff.ucData[1] == 'E') && (l_xCanBuff.ucData[2] == 'C'))
{ {
xMCAL_SoftReset(); xMCAL_VrefInit();
} }
vECU_InitiateUartToCanTransmit(&g_xUartHandle, (uint32_t)xBuff.id, (uint8_t*)&xBuff.data[0], (uint8_t)xBuff.length); IVEC_ECU_Uart_InitiateTransmit(&g_xEcuUartHandle, (uint32_t)l_xCanBuff.ulId, (uint8_t*)&l_xCanBuff.ucData[0], (uint8_t)l_xCanBuff.ucLength);
socTouchDisplay_U.Input[__gprv_u8Idx].ID = xBuff.id; socTouchDisplay_U.Input[_prvU8Index].ID = l_xCanBuff.ulId;
socTouchDisplay_U.Input[__gprv_u8Idx].Length = xBuff.length; socTouchDisplay_U.Input[_prvU8Index].Length = l_xCanBuff.ucLength;
memcpy(&socTouchDisplay_U.Input[__gprv_u8Idx].Data[0], &xBuff.data[0], 8); memcpy(&socTouchDisplay_U.Input[_prvU8Index].Data[0], &l_xCanBuff.ucData[0], 8);
__gprv_u8Idx = (__gprv_u8Idx + 1) % MAX_CAN_MESSAGE_INSTANCE; _prvU8Index = (_prvU8Index + 1) % MAX_CAN_MESSAGE_INSTANCE;
if(l_u8TxBurstMessages < 16) if(l_u8TxBurstMessages < 16)
l_u8TxBurstMessages++; l_u8TxBurstMessages++;
else else
break; break;
} }
xECU_GetCanStatus(CANFD0, g_u16CanSpeed); vECU_CAN_GetStatus(CANFD0, g_eCanSpeed);
} }

19
main.c
View File

@ -19,9 +19,7 @@
//extern McalUartHandle_s g_xUartHandle; //extern McalUartHandle_s g_xUartHandle;
static void vApp_TimerConfig(void)
static void __prv_TimerConfig(void)
{ {
SYSCFG_DL_TIMER_1_init(); SYSCFG_DL_TIMER_1_init();
DL_TimerA_startCounter(TIMER_1_INST); DL_TimerA_startCounter(TIMER_1_INST);
@ -34,18 +32,19 @@ int main(void)
{ {
__enable_irq(); __enable_irq();
volatile DL_SYSCTL_RESET_CAUSE l_xResetCause = DL_SYSCTL_getResetCause(); volatile DL_SYSCTL_RESET_CAUSE l_xResetCause = DL_SYSCTL_getResetCause();
xMCAL_McuInit(); vMCAL_McuInit();
xMCAL_SYSCTL_INIT(HFXT,STANDBY0); xMCAL_SysctlInit(IVEC_HFXT,IVEC_STANDBY0);
xMCAL_SYSTICK_INIT(Period_1ms); xMCAL_SystickInit(IVEC_SYSTICK_PERIOD_1MS);
__prv_TimerConfig();
vApp_TimerConfig();
vRTE_AppInit();
vApp_Init(); // Uncomment for UART-to-CAN transmission, if required
// vECU_InitiateUartToCanTransmit(&g_xUartHandle, 0x6, NULL, 0); // vECU_InitiateUartToCanTransmit(&g_xUartHandle, 0x6, NULL, 0);
while(1) while(1)
{ {
vApp_RunInit(); vRTE_AppRunInit();
} }
} }

218
utils/utils.c
View File

@ -6,15 +6,11 @@
#include <utils/utils.h> #include <utils/utils.h>
#include "../Generated Codes/ti_msp_config.h" #include "../Generated Codes/ti_msp_config.h"
static volatile uint32_t g_vrefInitFlag = 0;
volatile int g_i32TickCnt;
uint8_t g_systickInitFlag_u8 = 0;
static const DL_VREF_Config g_dlVrefConfig = {
volatile uint32_t systic_Count;
volatile uint32_t systic_init_flag =0;
static volatile uint32_t g_u32VrefInitFalg = 0;
//#define tick_PIN_0_PIN (0x00004000)
//uint8_t tickmeasurement = 1;
static const DL_VREF_Config gVREFConfig = {
.vrefEnable = DL_VREF_ENABLE_DISABLE, .vrefEnable = DL_VREF_ENABLE_DISABLE,
.bufConfig = DL_VREF_BUFCONFIG_OUTPUT_2_5V, .bufConfig = DL_VREF_BUFCONFIG_OUTPUT_2_5V,
.shModeEnable = DL_VREF_SHMODE_DISABLE, .shModeEnable = DL_VREF_SHMODE_DISABLE,
@ -22,73 +18,23 @@ static const DL_VREF_Config gVREFConfig = {
.shCycleCount = DL_VREF_SH_MIN, .shCycleCount = DL_VREF_SH_MIN,
}; };
static const DL_VREF_ClockConfig gVREFClockConfig = { static const DL_VREF_ClockConfig g_dlVrefClockConfig = {
.clockSel = DL_VREF_CLOCK_LFCLK, .clockSel = DL_VREF_CLOCK_LFCLK,
.divideRatio = DL_VREF_CLOCK_DIVIDE_1, .divideRatio = DL_VREF_CLOCK_DIVIDE_1,
}; };
/* Systick Initialization */
uint8_t u8SysTick_initFlag=0; IVEC_CoreStatus_e xMCAL_SystickInit(IVEC_SystickPeriod_e eTick)
//static const DL_SYSCTL_SYSPLLConfig gSYSPLLConfig = {
// .inputFreq = DL_SYSCTL_SYSPLL_INPUT_FREQ_16_32_MHZ,
// .rDivClk2x = 1,
// .rDivClk1 = 1,
// .rDivClk0 = 0,
// .enableCLK2x = DL_SYSCTL_SYSPLL_CLK2X_DISABLE,
// .enableCLK1 = DL_SYSCTL_SYSPLL_CLK1_ENABLE,
// .enableCLK0 = DL_SYSCTL_SYSPLL_CLK0_DISABLE,
// .sysPLLMCLK = DL_SYSCTL_SYSPLL_MCLK_CLK0,
// .sysPLLRef = DL_SYSCTL_SYSPLL_REF_SYSOSC,
// .qDiv = 9,
// .pDiv = DL_SYSCTL_SYSPLL_PDIV_2
//};
//static const DL_SYSCTL_SYSPLLConfig gSYSPLLConfig = {
// .inputFreq = DL_SYSCTL_SYSPLL_INPUT_FREQ_8_16_MHZ,
// .rDivClk2x = 1,
// .rDivClk1 = 0,
// .rDivClk0 = 0,
// .enableCLK2x = DL_SYSCTL_SYSPLL_CLK2X_DISABLE,
// .enableCLK1 = DL_SYSCTL_SYSPLL_CLK1_ENABLE,
// .enableCLK0 = DL_SYSCTL_SYSPLL_CLK0_DISABLE,
// .sysPLLMCLK = DL_SYSCTL_SYSPLL_MCLK_CLK0,
// .sysPLLRef = DL_SYSCTL_SYSPLL_REF_SYSOSC,
// .qDiv = 9,
// .pDiv = DL_SYSCTL_SYSPLL_PDIV_4
//};
void mcuInit(void)
{ {
SYSCFG_DL_initPower(); SysTick_Config(eTick);
/* Module-Specific Initializations*/
}
xCoreStatus_t xMCAL_SYSTICK_INIT(xTicks_t tick)
{
// if(u8SysTick_initFlag==1)
// {
// return STATUS_ERROR;
// }
//
// if(tick!=Period_1ms)
// {
// return STATUS_INIT_FAIL;
// }
SysTick_Config(tick);
NVIC_SetPriority(SysTick_IRQn, 0); NVIC_SetPriority(SysTick_IRQn, 0);
u8SysTick_initFlag=1; g_systickInitFlag_u8 = 1;
return STATUS_SUCCESS;
return IVEC_CORE_STATUS_SUCCESS;
} }
static const DL_SYSCTL_SYSPLLConfig gSYSPLLConfig = { static const DL_SYSCTL_SYSPLLConfig g_dlSysPllConfig = {
.inputFreq = DL_SYSCTL_SYSPLL_INPUT_FREQ_16_32_MHZ, .inputFreq = DL_SYSCTL_SYSPLL_INPUT_FREQ_16_32_MHZ,
.rDivClk2x = 1, .rDivClk2x = 1,
.rDivClk1 = 0, .rDivClk1 = 0,
@ -99,182 +45,106 @@ static const DL_SYSCTL_SYSPLLConfig gSYSPLLConfig = {
.sysPLLMCLK = DL_SYSCTL_SYSPLL_MCLK_CLK0, .sysPLLMCLK = DL_SYSCTL_SYSPLL_MCLK_CLK0,
.sysPLLRef = DL_SYSCTL_SYSPLL_REF_HFCLK, .sysPLLRef = DL_SYSCTL_SYSPLL_REF_HFCLK,
.qDiv = 5, .qDiv = 5,
.pDiv = DL_SYSCTL_SYSPLL_PDIV_1 .pDiv = DL_SYSCTL_SYSPLL_PDIV_1,
}; };
xCoreStatus_t xMCAL_SYSCTL_INIT(uint8_t u8CLK_SRC,uint8_t u8LP_MODE) /* System Control Initialization */
IVEC_CoreStatus_e xMCAL_SysctlInit(uint8_t u8ClkSrc, uint8_t u8LowPowerMode)
{ {
if ((u8LowPowerMode != IVEC_STANDBY0) && (u8LowPowerMode != IVEC_SLEEP0))
return IVEC_CORE_STATUS_INIT_FAIL;
if((u8LP_MODE!=STANDBY0)&&(u8LP_MODE!=SLEEP0)) if ((u8ClkSrc != IVEC_HFXT) && (u8ClkSrc != IVEC_SYSOSC))
return STATUS_INIT_FAIL; return IVEC_CORE_STATUS_INIT_FAIL;
if((u8CLK_SRC!=HFXT)&&(u8CLK_SRC!=SYSOSC))
return STATUS_INIT_FAIL;
if(u8LP_MODE==STANDBY0) if (u8LowPowerMode == IVEC_STANDBY0)
{ {
//Low Power Mode is configured to be STANDBY0
DL_SYSCTL_setPowerPolicySTANDBY0(); DL_SYSCTL_setPowerPolicySTANDBY0();
DL_SYSCTL_setBORThreshold(DL_SYSCTL_BOR_THRESHOLD_LEVEL_0); DL_SYSCTL_setBORThreshold(DL_SYSCTL_BOR_THRESHOLD_LEVEL_0);
DL_SYSCTL_setFlashWaitState(DL_SYSCTL_FLASH_WAIT_STATE_2); DL_SYSCTL_setFlashWaitState(DL_SYSCTL_FLASH_WAIT_STATE_2);
} }
else if(u8LP_MODE==SLEEP0) else if (u8LowPowerMode == IVEC_SLEEP0)
{ {
DL_SYSCTL_setBORThreshold(DL_SYSCTL_BOR_THRESHOLD_LEVEL_0); DL_SYSCTL_setBORThreshold(DL_SYSCTL_BOR_THRESHOLD_LEVEL_0);
DL_SYSCTL_setFlashWaitState(DL_SYSCTL_FLASH_WAIT_STATE_2); DL_SYSCTL_setFlashWaitState(DL_SYSCTL_FLASH_WAIT_STATE_2);
} }
if(u8CLK_SRC==HFXT) if (u8ClkSrc == IVEC_HFXT)
{ {
//Low Power Mode is configured to be SLEEP0
// DL_SYSCTL_setBORThreshold(DL_SYSCTL_BOR_THRESHOLD_LEVEL_0);
// DL_SYSCTL_setSYSOSCFreq(DL_SYSCTL_SYSOSC_FREQ_BASE);
/* Set default configuration */
// DL_SYSCTL_disableHFXT();
// DL_SYSCTL_disableSYSPLL();
// DL_SYSCTL_setHFCLKSourceHFXTParams(DL_SYSCTL_HFXT_RANGE_16_32_MHZ,30, true);
// DL_SYSCTL_setULPCLKDivider(DL_SYSCTL_ULPCLK_DIV_1);
//DL_SYSCTL_setMCLKSource(SYSOSC, HSCLK, DL_SYSCTL_HSCLK_SOURCE_HFCLK);
//Low Power Mode is configured to be SLEEP0
DL_SYSCTL_setBORThreshold(DL_SYSCTL_BOR_THRESHOLD_LEVEL_0); DL_SYSCTL_setBORThreshold(DL_SYSCTL_BOR_THRESHOLD_LEVEL_0);
DL_SYSCTL_setFlashWaitState(DL_SYSCTL_FLASH_WAIT_STATE_2); DL_SYSCTL_setFlashWaitState(DL_SYSCTL_FLASH_WAIT_STATE_2);
DL_SYSCTL_setSYSOSCFreq(DL_SYSCTL_SYSOSC_FREQ_BASE); DL_SYSCTL_setSYSOSCFreq(DL_SYSCTL_SYSOSC_FREQ_BASE);
/* Set default configuration */
DL_SYSCTL_disableHFXT(); DL_SYSCTL_disableHFXT();
DL_SYSCTL_disableSYSPLL(); DL_SYSCTL_disableSYSPLL();
DL_SYSCTL_setHFCLKSourceHFXTParams(DL_SYSCTL_HFXT_RANGE_16_32_MHZ, 10, true); DL_SYSCTL_setHFCLKSourceHFXTParams(DL_SYSCTL_HFXT_RANGE_16_32_MHZ, 10, true);
DL_SYSCTL_configSYSPLL((DL_SYSCTL_SYSPLLConfig *) &gSYSPLLConfig); DL_SYSCTL_configSYSPLL((DL_SYSCTL_SYSPLLConfig *)&g_dlSysPllConfig);
DL_SYSCTL_setULPCLKDivider(DL_SYSCTL_ULPCLK_DIV_2); DL_SYSCTL_setULPCLKDivider(DL_SYSCTL_ULPCLK_DIV_2);
DL_SYSCTL_setMCLKSource(SYSOSC, HSCLK, DL_SYSCTL_HSCLK_SOURCE_SYSPLL); DL_SYSCTL_setMCLKSource(SYSOSC, HSCLK, DL_SYSCTL_HSCLK_SOURCE_SYSPLL);
} }
else if(u8CLK_SRC==SYSOSC) else if (u8ClkSrc == IVEC_SYSOSC)
{ {
DL_SYSCTL_setSYSOSCFreq(DL_SYSCTL_SYSOSC_FREQ_BASE); DL_SYSCTL_setSYSOSCFreq(DL_SYSCTL_SYSOSC_FREQ_BASE);
DL_SYSCTL_disableHFXT(); DL_SYSCTL_disableHFXT();
DL_SYSCTL_disableSYSPLL(); DL_SYSCTL_disableSYSPLL();
DL_SYSCTL_setHFCLKSourceHFXTParams(DL_SYSCTL_HFXT_RANGE_16_32_MHZ, 50, true); DL_SYSCTL_setHFCLKSourceHFXTParams(DL_SYSCTL_HFXT_RANGE_16_32_MHZ, 50, true);
DL_SYSCTL_configSYSPLL((DL_SYSCTL_SYSPLLConfig *) &gSYSPLLConfig); DL_SYSCTL_configSYSPLL((DL_SYSCTL_SYSPLLConfig *)&g_dlSysPllConfig);
DL_SYSCTL_setHFCLKDividerForMFPCLK(DL_SYSCTL_HFCLK_MFPCLK_DIVIDER_6); DL_SYSCTL_setHFCLKDividerForMFPCLK(DL_SYSCTL_HFCLK_MFPCLK_DIVIDER_6);
DL_SYSCTL_enableMFCLK(); DL_SYSCTL_enableMFCLK();
DL_SYSCTL_enableMFPCLK(); DL_SYSCTL_enableMFPCLK();
DL_SYSCTL_setMFPCLKSource(DL_SYSCTL_MFPCLK_SOURCE_SYSOSC); DL_SYSCTL_setMFPCLKSource(DL_SYSCTL_MFPCLK_SOURCE_SYSOSC);
} }
// if(u8CLK_SRC==HFXT) return IVEC_CORE_STATUS_SUCCESS;
// {
//
//
//
// DL_SYSCTL_setSYSOSCFreq(DL_SYSCTL_SYSOSC_FREQ_BASE);
// /* Set default configuration */
// DL_SYSCTL_disableHFXT();
// DL_SYSCTL_disableSYSPLL();
// DL_SYSCTL_setHFCLKSourceHFXTParams(DL_SYSCTL_HFXT_RANGE_16_32_MHZ,10, true);
// DL_SYSCTL_configSYSPLL((DL_SYSCTL_SYSPLLConfig *) &gSYSPLLConfig);
// DL_SYSCTL_setULPCLKDivider(DL_SYSCTL_ULPCLK_DIV_1);
// DL_SYSCTL_setHFCLKDividerForMFPCLK(DL_SYSCTL_HFCLK_MFPCLK_DIVIDER_6);
// DL_SYSCTL_enableMFCLK();
// DL_SYSCTL_enableMFPCLK();
// DL_SYSCTL_setMFPCLKSource(DL_SYSCTL_MFPCLK_SOURCE_HFCLK);
// DL_SYSCTL_setMCLKSource(SYSOSC, HSCLK, DL_SYSCTL_HSCLK_SOURCE_HFCLK);
//// DL_SYSCTL_setHFCLKSourceHFXTParams(DL_SYSCTL_HFXT_RANGE_16_32_MHZ,0, false);
//// DL_SYSCTL_setULPCLKDivider(DL_SYSCTL_ULPCLK_DIV_1);
//// DL_SYSCTL_setMCLKSource(SYSOSC, HSCLK, DL_SYSCTL_HSCLK_SOURCE_HFCLK);
//
//
// //DL_SYSCTL_setHFCLKSourceHFXTParams(DL_SYSCTL_HFXT_RANGE_32_48_MHZ,0, false);
//// DL_SYSCTL_setHFCLKSourceHFXTParams(DL_SYSCTL_HFXT_RANGE_16_32_MHZ,0, false);
//// DL_SYSCTL_setULPCLKDivider(DL_SYSCTL_ULPCLK_DIV_1);
//// DL_SYSCTL_setMCLKSource(SYSOSC, HSCLK, DL_SYSCTL_HSCLK_SOURCE_HFCLK);
// }
//
// else if(u8CLK_SRC==SYSOSC)
// {
//// DL_SYSCTL_setSYSOSCFreq(DL_SYSCTL_SYSOSC_FREQ_BASE);
//// /* Set default configuration */
//// DL_SYSCTL_disableHFXT();
//// DL_SYSCTL_disableSYSPLL();
//// DL_SYSCTL_configSYSPLL((DL_SYSCTL_SYSPLLConfig *) &gSYSPLLConfig);
// DL_SYSCTL_setSYSOSCFreq(DL_SYSCTL_SYSOSC_FREQ_BASE);
// DL_SYSCTL_disableHFXT();
// DL_SYSCTL_disableSYSPLL();
// DL_SYSCTL_configSYSPLL((DL_SYSCTL_SYSPLLConfig *) &gSYSPLLConfig);
// DL_SYSCTL_setHFCLKDividerForMFPCLK(DL_SYSCTL_HFCLK_MFPCLK_DIVIDER_6);
// DL_SYSCTL_enableMFCLK();
// DL_SYSCTL_enableMFPCLK();
// DL_SYSCTL_setMFPCLKSource(DL_SYSCTL_MFPCLK_SOURCE_SYSOSC);
// }
return STATUS_SUCCESS;
} }
void SysTick_Handler(void) void SysTick_Handler(void)
{ {
i32TickCnt++; g_i32TickCnt++;
// if(tickmeasurement)
// {
// DL_GPIO_clearPins(GPIOB, tick_PIN_0_PIN);
// tickmeasurement = 0;
// }
// else
// {
// DL_GPIO_setPins(GPIOB, tick_PIN_0_PIN);
// tickmeasurement = 1;
// }
} }
int i32MCAL_getTicks() int32_t i32MCAL_GetTicks()
{ {
return i32TickCnt; return g_i32TickCnt;
} }
void vMCAL_DelayTicks(int i32Delay_ms) void vMCAL_DelayTicks(int32_t i32DelayMs)
{ {
int curr_tick; int32_t l_i32CurrTick = i32MCAL_GetTicks();
curr_tick=i32MCAL_getTicks();
while((i32MCAL_getTicks()-curr_tick)<i32Delay_ms); while ((i32MCAL_GetTicks() - l_i32CurrTick) < i32DelayMs)
{
return; /* Wait */
}
} }
void vMCAL_McuInit(void)
void xMCAL_McuInit()
{ {
SYSCFG_DL_initPower(); SYSCFG_DL_initPower();
SYSCFG_DL_GPIO_init(); SYSCFG_DL_GPIO_init();
} }
void delay(uint32_t us) void vMCAL_DelayUs(uint32_t u32Us)
{ {
delay_cycles((32*us)); delay_cycles(32 * u32Us);
} }
IVEC_McalStatus_e xMCAL_VrefInit(void) IVEC_McalStatus_e xMCAL_VrefInit(void)
{ {
if(g_u32VrefInitFalg == 0) if (g_vrefInitFlag == 0)
{ {
DL_VREF_setClockConfig(VREF, (DL_VREF_ClockConfig *) &gVREFClockConfig); DL_VREF_setClockConfig(VREF, (DL_VREF_ClockConfig *)&g_dlVrefClockConfig);
DL_VREF_configReference(VREF,(DL_VREF_Config *) &gVREFConfig); DL_VREF_configReference(VREF, (DL_VREF_Config *)&g_dlVrefConfig);
delay_cycles(320); delay_cycles(320);
g_u32VrefInitFalg =1; g_vrefInitFlag = 1;
return IVEC_MCAL_STATUS_SUCCESS; return IVEC_MCAL_STATUS_SUCCESS;
} }
else else
{
return IVEC_MCAL_STATUS_INIT_FAIL; return IVEC_MCAL_STATUS_INIT_FAIL;
} }
}
void xMCAL_SoftReset(void) void vMCAL_SoftReset(void)
{ {
DL_SYSCTL_resetDevice(DL_SYSCTL_RESET_CPU); DL_SYSCTL_resetDevice(DL_SYSCTL_RESET_CPU);
} }

134
utils/utils.h
View File

@ -1,22 +1,20 @@
/* /*
* utils.h * ivec_utils.h
* *
* Created on: 22-Jan-2024 * Created on: 22-Jan-2024
* Author: saar * Author: saar
*/ */
#ifndef UTILS_UTILS_H_ #ifndef UTILS_IVEC_UTILS_H_
#define UTILS_UTILS_H_ #define UTILS_IVEC_UTILS_H_
#include <stdlib.h> #include <stdlib.h>
#include <assert.h> #include <assert.h>
#include "ti_msp_dl_config.h" #include "ti_msp_dl_config.h"
//#define GPIO 0
//#define UART 0
/* Generic Status Codes */
typedef enum typedef enum
{ {
/* Generic error codes */
IVEC_MCAL_STATUS_INIT_FAIL = -1, IVEC_MCAL_STATUS_INIT_FAIL = -1,
IVEC_MCAL_STATUS_SUCCESS , /*!< Generic operation success status */ IVEC_MCAL_STATUS_SUCCESS , /*!< Generic operation success status */
IVEC_MCAL_STATUS_ERROR , /*!< Generic operation failure status */ IVEC_MCAL_STATUS_ERROR , /*!< Generic operation failure status */
@ -27,90 +25,82 @@ typedef enum
IVEC_MCAL_STATUS_FALSE , /*!< Generic operation false status */ IVEC_MCAL_STATUS_FALSE , /*!< Generic operation false status */
} IVEC_McalStatus_e; } IVEC_McalStatus_e;
#define GPIO 5 /* Peripheral Identifiers */
#define UART 1 #define IVEC_GPIO 5
#define HFXT 2 #define IVEC_UART 1
#define STANDBY0 3 #define IVEC_HFXT 2
#define SYSOSC 4 #define IVEC_STANDBY0 3
#define SLEEP0 6 #define IVEC_SYSOSC 4
#define IVEC_SLEEP0 6
volatile int i32TickCnt;
/* Core Status Codes */
typedef enum typedef enum
{ {
/* Generic error codes */ IVEC_CORE_STATUS_INIT_FAIL = 1,
STATUS_INIT_FAIL = 1, IVEC_CORE_STATUS_SUCCESS = 0, /*!< Generic operation success status */
STATUS_SUCCESS = 0, /*!< Generic operation success status */ IVEC_CORE_STATUS_ERROR = -1, /*!< Generic operation failure status */
STATUS_ERROR = -1, /*!< Generic operation failure status */ IVEC_CORE_STATUS_BUSY = 2, /*!< Generic operation busy status */
STATUS_BUSY = 2, /*!< Generic operation busy status */ IVEC_CORE_STATUS_TIMEOUT = 3, /*!< Generic operation timeout status */
STATUS_TIMEOUT = 3, /*!< Generic operation timeout status */ IVEC_CORE_STATUS_UNSUPPORTED = 4, /*!< Generic operation unsupported status */
STATUS_UNSUPPORTED = 4, /*!< Generic operation unsupported status */ } IVEC_CoreStatus_e;
}xCoreStatus_t;
typedef enum
{
/* UART Baud Rate Options */ /* UART Baud Rate Options */
BAUD_115200 = 0,
BAUD_9600 = 1,
}xUart_baud_t;
typedef enum typedef enum
{ {
IVEC_UART_BAUD_115200 = 0,
IVEC_UART_BAUD_9600 = 1,
} IVEC_UartBaud_e;
/* CAN Baud Rate Options */ /* CAN Baud Rate Options */
BAUD_500 = 500,
BAUD_250 = 250,
BAUD_150 = 150,
BAUD_1000 = 1000,
BAUD_125 = 125,
}xCAN_baud_t;
typedef enum typedef enum
{ {
IVEC_CAN_BAUD_500 = 500,
IVEC_CAN_BAUD_250 = 250,
IVEC_CAN_BAUD_150 = 150,
IVEC_CAN_BAUD_1000 = 1000,
IVEC_CAN_BAUD_125 = 125,
} IVEC_CanBaud_e;
/* SPI Clock Speed Options */ /* SPI Clock Speed Options */
CS_1Mhz = 0,
}xSPI_CS_t;
typedef enum typedef enum
{ {
IVEC_SPI_CS_1MHZ = 0,
} IVEC_SpiCs_e;
/* SysTick Period Options */ /* SysTick Period Options */
Period_1ms = 72000, /*!< sets period of SysTick to 1ms @48Mhz*/
}xTicks_t;
typedef enum typedef enum
{ {
/*SPI Clock Speed Options*/ IVEC_SYSTICK_PERIOD_1MS = 72000, /*!< Sets period of SysTick to 1ms @48Mhz */
BAUD_100Khz = 0, } IVEC_SystickPeriod_e;
BAUD_400Khz,
}xI2C_baud_t;
typedef enum { /* I2C Baud Rate Options */
I2C_STATUS_IDLE = 0, typedef enum
I2C_STATUS_TX_STARTED, {
I2C_STATUS_TX_INPROGRESS, IVEC_I2C_BAUD_100KHZ = 0,
I2C_STATUS_TX_COMPLETE, IVEC_I2C_BAUD_400KHZ,
I2C_STATUS_RX_STARTED, } IVEC_I2cBaud_e;
I2C_STATUS_RX_INPROGRESS,
I2C_STATUS_RX_COMPLETE,
I2C_STATUS_ERROR,
} xI2cControllerStatus_t;
void mcuInit(void); /* I2C Controller Status */
xCoreStatus_t xMCAL_SYSCTL_INIT(uint8_t u8CLK_SRC,uint8_t u8LP_MODE); typedef enum
xCoreStatus_t xMCAL_SYSTICK_INIT(xTicks_t tick); {
//void delay (uint32_t us); IVEC_I2C_STATUS_IDLE = 0,
int i32MCAL_getTicks(); IVEC_I2C_STATUS_TX_STARTED,
void vMCAL_DelayTicks(int i32Delay_ms); IVEC_I2C_STATUS_TX_INPROGRESS,
IVEC_I2C_STATUS_TX_COMPLETE,
IVEC_I2C_STATUS_RX_STARTED,
IVEC_I2C_STATUS_RX_INPROGRESS,
IVEC_I2C_STATUS_RX_COMPLETE,
IVEC_I2C_STATUS_ERROR,
} IVEC_I2cControllerStatus_e;
void xMCAL_SoftReset(void); /* Function Declarations */
void xMCAL_McuInit(void); void vMCAL_McuInit(void);
void delay (uint32_t us); IVEC_CoreStatus_e xMCAL_SysctlInit(uint8_t u8ClkSrc, uint8_t u8LpMode);
IVEC_CoreStatus_e xMCAL_SystickInit(IVEC_SystickPeriod_e xTick);
int32_t i32MCAL_GetTicks(void);
void vMCAL_DelayTicks(int32_t i32DelayMs);
void vMCAL_SoftReset(void);
void vMCAL_DelayUs(uint32_t u32Us);
IVEC_McalStatus_e xMCAL_VrefInit(void); IVEC_McalStatus_e xMCAL_VrefInit(void);
#endif /* UTILS_IVEC_UTILS_H_ */
#endif /* UTILS_UTILS_H_ */