fix: Correct standard ID handling in CAN RX by applying proper shift
parent
3896d66aa0
commit
56c08e98b8
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@ -38,10 +38,6 @@ encoding//Debug/SDK/drivers/Src/timers/subdir_rules.mk=UTF-8
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encoding//Debug/SDK/drivers/Src/timers/subdir_vars.mk=UTF-8
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encoding//Debug/TM1650_SDK/src/subdir_rules.mk=UTF-8
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encoding//Debug/TM1650_SDK/src/subdir_vars.mk=UTF-8
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encoding//Debug/bs_touchAndLcd/socTouchDisplay_ert_rtw/subdir_rules.mk=UTF-8
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encoding//Debug/bs_touchAndLcd/socTouchDisplay_ert_rtw/subdir_vars.mk=UTF-8
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encoding//Debug/bs_touchAndLcd/subdir_rules.mk=UTF-8
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encoding//Debug/bs_touchAndLcd/subdir_vars.mk=UTF-8
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encoding//Debug/ivec_APP/src/subdir_rules.mk=UTF-8
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encoding//Debug/ivec_APP/src/subdir_vars.mk=UTF-8
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encoding//Debug/ivec_ECU/ivec_ecu_can/src/subdir_rules.mk=UTF-8
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@ -25,6 +25,7 @@ volatile uint32_t l_canTransmitTimeout;
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volatile uint8_t u8CallBack_buff[8]={0};
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volatile IVEC_McalStatus_e l_statusFlag = IVEC_MCAL_STATUS_SUCCESS;
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extern volatile uint8_t u8CANDataAct;
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#define MCAN_FILTER_SIZE 0u
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/*REQUIRED MCAN CONFIGS*/
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@ -73,16 +74,68 @@ static DL_MCAN_ConfigParams gMCAN0ConfigParams={
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.filterConfig.rrfe = false,
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.filterConfig.anfe = 0,
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.filterConfig.anfs = 0,
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// .filterConfig.anfe = 3,
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// .filterConfig.anfs = 3,
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};
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//static DL_MCAN_MsgRAMConfigParams gMCAN0MsgRAMConfigParams ={
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//
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// /* Standard ID Filter List Start Address. */
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// .flssa = 0 ,
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// /* List Size: Standard ID. */
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// .lss = 0 ,
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// /* Extended ID Filter List Start Address. */
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// .flesa = 0 ,
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// /* List Size: Extended ID. */
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// .lse = 0 ,
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// /* Tx Buffers Start Address. */
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// .txStartAddr = 10 ,
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// /* Number of Dedicated Transmit Buffers. */
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// .txBufNum = 10 ,
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// .txFIFOSize = 10,
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// /* Tx Buffer Element Size. */
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// .txBufMode = 0,
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// .txBufElemSize = DL_MCAN_ELEM_SIZE_8BYTES,
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// /* Tx Event FIFO Start Address. */
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// .txEventFIFOStartAddr = 640 ,
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// /* Event FIFO Size. */
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// .txEventFIFOSize = 10 ,
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// /* Level for Tx Event FIFO watermark interrupt. */
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// .txEventFIFOWaterMark = 0,
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// /* Rx FIFO0 Start Address. */
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// .rxFIFO0startAddr = 170 ,
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// /* Number of Rx FIFO elements. */
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// .rxFIFO0size = 10 ,
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// /* Rx FIFO0 Watermark. */
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// .rxFIFO0waterMark = 0,
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// .rxFIFO0OpMode = 0,
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// /* Rx FIFO1 Start Address. */
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// .rxFIFO1startAddr = 190 ,
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// /* Number of Rx FIFO elements. */
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// .rxFIFO1size = 10 ,
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// /* Level for Rx FIFO 1 watermark interrupt. */
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// .rxFIFO1waterMark = 10,
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// /* FIFO blocking mode. */
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// .rxFIFO1OpMode = 0,
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// /* Rx Buffer Start Address. */
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// .rxBufStartAddr = 208 ,
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// /* Rx Buffer Element Size. */
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// .rxBufElemSize = DL_MCAN_ELEM_SIZE_8BYTES,
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// /* Rx FIFO0 Element Size. */
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// .rxFIFO0ElemSize = DL_MCAN_ELEM_SIZE_8BYTES,
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// /* Rx FIFO1 Element Size. */
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// .rxFIFO1ElemSize = DL_MCAN_ELEM_SIZE_8BYTES,
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//};
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static DL_MCAN_MsgRAMConfigParams gMCAN0MsgRAMConfigParams ={
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/* Standard ID Filter List Start Address. */
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.flssa = 0 ,
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.flssa = 1,
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/* List Size: Standard ID. */
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.lss = 0 ,
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.lss = MCAN_FILTER_SIZE,
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/* Extended ID Filter List Start Address. */
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.flesa = 0 ,
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.flesa = 48 ,
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/* List Size: Extended ID. */
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.lse = 0 ,
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/* Tx Buffers Start Address. */
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@ -164,17 +217,17 @@ static DL_MCAN_BitTimingParams gMCAN0BitTimes_250 = {
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static const DL_MCAN_StdMsgIDFilterElement gMCAN0StdFiltelem1 = {
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.sfec = 0x1,
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.sft = 0x01,
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.sfid1 = 0x1AE,
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.sfid2 = 0x520,
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.sfec = 001,
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.sft = 10,
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.sfid1 = 0,
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.sfid2 = 100,
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};
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static const DL_MCAN_StdMsgIDFilterElement gMCAN0StdFiltelem2 = {
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.sfec = 0x1,
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.sft = 0x00,
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.sfid1 = 0xBB,
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.sfid2 = 0xBB,
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.sfid1 = 200,
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.sfid2 = 300,
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};
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static const DL_MCAN_StdMsgIDFilterElement gMCAN0StdFiltelem3 = {
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@ -201,8 +254,8 @@ static const DL_MCAN_StdMsgIDFilterElement gMCAN0StdFiltelem5 = {
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static const DL_MCAN_ExtMsgIDFilterElement gMCAN0ExtFiltelem1 = {
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.efec = 0x1,
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.eft = 0x0,
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.efid1 = 0x18904001,
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.efid2 = 0x18904001,
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.efid1 = 30000,
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.efid2 = 40000,
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};
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static const DL_MCAN_ExtMsgIDFilterElement gMCAN0ExtFiltelem2 = {
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@ -289,22 +342,34 @@ void CANFD0_IRQHandler(void)
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DL_MCAN_writeRxFIFOAck(CANFD0, rxFS.num, rxFS.getIdx);
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xCanIdType_t idType = ERROR;
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if (TempRxMsg.id >= 0 && TempRxMsg.id <= 0x7FF)
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// if (TempRxMsg.id >= 0 && TempRxMsg.id <= 0x7FF)
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// {
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// idType = STD_ID;
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// } else if (TempRxMsg.id <= 0x1FFFFFFF)
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// {
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// idType = EXT_ID;
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// }
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//
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// for(int i=0;i<8;i++)
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// {
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// u8CallBack_buff[i]=(TempRxMsg.data[i] & 0xFF);
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// }
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uint64_t idx = 0;
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idx = TempRxMsg.id;
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uint32_t value = ((TempRxMsg.id & (uint32_t) 0x1FFC0000) >> (uint32_t) 18);
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if ((value > 0) && (value <= 0x7FF))
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if(TempRxMsg.xtd == 0)
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{
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idType = STD_ID;
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} else if (TempRxMsg.id <= 0x1FFFFFFF)
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{
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idType = EXT_ID;
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idx = value;
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idx = ((TempRxMsg.id & (uint32_t) 0x1FFC0000) >> (uint32_t) 18);
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}
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for(int i=0;i<8;i++)
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{
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u8CallBack_buff[i]=(TempRxMsg.data[i] & 0xFF);
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}
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__asm("nop");
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TempRxID=TempRxMsg.id;
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TempRxID = idx;
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_prv_vGetRxMsg(&TempRxMsg,&TempRxID ,TempRxBuffer,TempRxMsg.dlc);
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DL_MCAN_clearIntrStatus(CANFD0, IntrStatus,DL_MCAN_INTR_SRC_MCAN_LINE_1);
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b_ServiceInt = true;
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@ -395,9 +460,9 @@ IVEC_McalStatus_e xMCAL_MCANInit(MCAN_Regs* MCAN, xCAN_baud_t BAUD)
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DL_MCAN_msgRAMConfig(MCAN, (DL_MCAN_MsgRAMConfigParams*) &gMCAN0MsgRAMConfigParams);
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/* Configure Standard ID filter element */
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// DL_MCAN_addStdMsgIDFilter(MCAN, 0U, (DL_MCAN_StdMsgIDFilterElement *) &gMCAN0StdFiltelem1);
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// DL_MCAN_addStdMsgIDFilter(MCAN, 0U, (DL_MCAN_StdMsgIDFilterElement *) &gMCAN0StdFiltelem1);
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//
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// DL_MCAN_addStdMsgIDFilter(MCAN, 1U, (DL_MCAN_StdMsgIDFilterElement *) &gMCAN0StdFiltelem2);
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// DL_MCAN_addStdMsgIDFilter(MCAN, 1U, (DL_MCAN_StdMsgIDFilterElement *) &gMCAN0StdFiltelem2);
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//
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// DL_MCAN_addStdMsgIDFilter(MCAN, 2U, (DL_MCAN_StdMsgIDFilterElement *) &gMCAN0StdFiltelem3);
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//
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@ -405,7 +470,7 @@ IVEC_McalStatus_e xMCAL_MCANInit(MCAN_Regs* MCAN, xCAN_baud_t BAUD)
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//
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// DL_MCAN_addStdMsgIDFilter(MCAN, 4U, (DL_MCAN_StdMsgIDFilterElement *) &gMCAN0StdFiltelem5);
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//
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// DL_MCAN_addExtMsgIDFilter(MCAN, 0U,(DL_MCAN_ExtMsgIDFilterElement *)&gMCAN0ExtFiltelem1);
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// DL_MCAN_addExtMsgIDFilter(MCAN, 0U,(DL_MCAN_ExtMsgIDFilterElement *)&gMCAN0ExtFiltelem1);
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//
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// DL_MCAN_addExtMsgIDFilter(MCAN, 1U,(DL_MCAN_ExtMsgIDFilterElement *)&gMCAN0ExtFiltelem2);
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//
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@ -316,11 +316,11 @@ exit:
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/////////////////////////////////////////////////////////////////////////////////////
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static xCoreStatus_t uart_init(McalUartHandle_s* pxUartHandle, McalUartBaudRate_e xBaud)
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{
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// DL_GPIO_initPeripheralOutputFunction(IOMUX_PINCM32, IOMUX_PINCM32_PF_UART2_TX);
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// DL_GPIO_initPeripheralInputFunction(IOMUX_PINCM33, IOMUX_PINCM33_PF_UART2_RX);
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DL_GPIO_initPeripheralOutputFunction(IOMUX_PINCM32, IOMUX_PINCM32_PF_UART2_TX);
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DL_GPIO_initPeripheralInputFunction(IOMUX_PINCM33, IOMUX_PINCM33_PF_UART2_RX);
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DL_GPIO_initPeripheralOutputFunction(IOMUX_PINCM19, IOMUX_PINCM19_PF_UART1_TX);
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DL_GPIO_initPeripheralInputFunction(IOMUX_PINCM20, IOMUX_PINCM20_PF_UART1_RX);
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// DL_GPIO_initPeripheralOutputFunction(IOMUX_PINCM19, IOMUX_PINCM19_PF_UART1_TX);
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// DL_GPIO_initPeripheralInputFunction(IOMUX_PINCM20, IOMUX_PINCM20_PF_UART1_RX);
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// Get the UART instance based on the port number in the handle
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UART_Regs* uart_inst = GetUartInstance(pxUartHandle->eUartPortNumber);
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@ -61,7 +61,8 @@ IVEC_EcuCommonErr_e xECU_WriteDataOverCAN(uint8_t* pucBuf, uint32_t ulId, int re
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int Bytes = retCode;
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l_i32Ret = xMCAL_MCANTx(CANFD0, xFrame.id, TxData, BufNum, Bytes);
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//MCAL_MCANTx(MCAN_Regs *MCAN, uint32_t u32ID ,uint16_t *TxData, uint32_t BufNum, uint32_t Bytes)
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l_i32Ret = xMCAL_MCANTx(CANFD0, ulId, TxData, BufNum, Bytes);
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if(l_i32Ret == IVEC_MCAL_STATUS_SUCCESS)
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{
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l_xFuncStatus = commonECU_SUCCESS;
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@ -72,7 +72,7 @@ IVEC_EcuCommonErr_e xECU_UARTInit(McalUartHandle_s* prvUartHandle, uint32_t spee
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}
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IVEC_ECU_LOG(LOG_STRING, "Initilising UART");
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prvUartHandle->eUartPortNumber = mcalUART_PORT2;
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prvUartHandle->eUartPortNumber = mcalUART_PORT3;
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prvUartHandle->pvUartRecvCallback = __prv_vEcu_CANOverUartMsgCallback;
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prvUartHandle->xUartConfig.eUartBaudrate = speed;
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prvUartHandle->xUartConfig.eUartFlowCtrl = mcalUART_FC_NONE;
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@ -235,8 +235,8 @@ void vMCAL_DelayTicks(int i32Delay_ms)
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void xMCAL_McuInit()
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{
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SYSCFG_DL_initPower();
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DL_UART_Main_reset(UART1);
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DL_UART_Main_enablePower(UART1);
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// DL_UART_Main_reset(UART1);
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// DL_UART_Main_enablePower(UART1);
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SYSCFG_DL_GPIO_init();
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}
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