fix: Resolved specific issues with CAN deinitialization and TX buffer usage
- Corrected the `CAN_DeInit` function to address cleanup problems during deinitialization. - Restricted TX operations to buffer 0 only, as buffer 1 was causing transmission errors.stable
parent
067c61f9cc
commit
668462eff5
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@ -420,6 +420,7 @@ IVEC_McalStatus_e xMCAL_MCANInit(MCAN_Regs* MCAN, xCAN_baud_t BAUD)
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while (DL_MCAN_OPERATION_MODE_NORMAL != DL_MCAN_getOpMode(MCAN));
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while (DL_MCAN_OPERATION_MODE_NORMAL != DL_MCAN_getOpMode(MCAN));
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/* Enable MCAN mopdule Interrupts */
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/* Enable MCAN mopdule Interrupts */
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DL_MCAN_enableIntr(MCAN, (DL_MCAN_INTERRUPT_BEU | \
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DL_MCAN_enableIntr(MCAN, (DL_MCAN_INTERRUPT_BEU | \
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DL_MCAN_INTERRUPT_BO | \
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DL_MCAN_INTERRUPT_BO | \
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DL_MCAN_INTERRUPT_ELO | \
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DL_MCAN_INTERRUPT_ELO | \
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@ -445,6 +446,7 @@ IVEC_McalStatus_e xMCAL_MCANInit(MCAN_Regs* MCAN, xCAN_baud_t BAUD)
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DL_MCAN_INTERRUPT_TOO), DL_MCAN_INTR_LINE_NUM_1);
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DL_MCAN_INTERRUPT_TOO), DL_MCAN_INTR_LINE_NUM_1);
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DL_MCAN_enableIntrLine(MCAN, DL_MCAN_INTR_LINE_NUM_1, 1U);
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DL_MCAN_enableIntrLine(MCAN, DL_MCAN_INTR_LINE_NUM_1, 1U);
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DL_MCAN_selectIntrLine(MCAN, (DL_MCAN_INTERRUPT_BEU | \
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DL_MCAN_selectIntrLine(MCAN, (DL_MCAN_INTERRUPT_BEU | \
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DL_MCAN_INTERRUPT_BO | \
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DL_MCAN_INTERRUPT_BO | \
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DL_MCAN_INTERRUPT_ELO | \
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DL_MCAN_INTERRUPT_ELO | \
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@ -458,6 +460,7 @@ IVEC_McalStatus_e xMCAL_MCANInit(MCAN_Regs* MCAN, xCAN_baud_t BAUD)
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DL_MCAN_INTERRUPT_TOO), DL_MCAN_INTR_LINE_NUM_0);
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DL_MCAN_INTERRUPT_TOO), DL_MCAN_INTR_LINE_NUM_0);
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DL_MCAN_enableIntrLine(MCAN, DL_MCAN_INTR_LINE_NUM_0, 1U);
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DL_MCAN_enableIntrLine(MCAN, DL_MCAN_INTR_LINE_NUM_0, 1U);
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/* Enable MSPM0 MCAN interrupt */
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/* Enable MSPM0 MCAN interrupt */
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DL_MCAN_clearInterruptStatus(MCAN,(DL_MCAN_MSP_INTERRUPT_LINE0));
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DL_MCAN_clearInterruptStatus(MCAN,(DL_MCAN_MSP_INTERRUPT_LINE0));
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DL_MCAN_enableInterrupt(MCAN,(DL_MCAN_MSP_INTERRUPT_LINE0));
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DL_MCAN_enableInterrupt(MCAN,(DL_MCAN_MSP_INTERRUPT_LINE0));
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@ -490,29 +493,121 @@ IVEC_McalStatus_e xMCAL_MCANInit(MCAN_Regs* MCAN, xCAN_baud_t BAUD)
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// return IVEC_MCAL_STATUS_SUCCESS;
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// return IVEC_MCAL_STATUS_SUCCESS;
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//
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//
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//}
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//}
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IVEC_McalStatus_e xMCAL_MCANDeInit(MCAN_Regs* MCAN)
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IVEC_McalStatus_e xMCAL_MCANDeInit(MCAN_Regs* MCAN)
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{
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{
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assert(MCAN == CANFD0);
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assert(MCAN == CANFD0);
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assert(b_MCAN_InitFlag != 0); // Ensure the module was initialized before deinitializing.
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assert(b_MCAN_InitFlag != 0); // Ensure the module was initialized before deinitializing.
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/* Disable MSPM0 MCAN interrupt */
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//DL_MCAN_reset(MCAN);
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DL_MCAN_setOpMode(CANFD0, DL_MCAN_OPERATION_MODE_SW_INIT);
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while (DL_MCAN_OPERATION_MODE_SW_INIT != DL_MCAN_getOpMode(MCAN));
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NVIC_DisableIRQ(CANFD0_INT_IRQn);
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NVIC_DisableIRQ(CANFD0_INT_IRQn);
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DL_MCAN_enableIntr(MCAN, (DL_MCAN_INTERRUPT_BEU | \
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DL_MCAN_INTERRUPT_BO | \
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DL_MCAN_INTERRUPT_ELO | \
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DL_MCAN_INTERRUPT_EP | \
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DL_MCAN_INTERRUPT_EW | \
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DL_MCAN_INTERRUPT_PEA | \
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DL_MCAN_INTERRUPT_PED | \
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DL_MCAN_INTERRUPT_RF0N | \
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DL_MCAN_INTERRUPT_RF1N | \
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DL_MCAN_INTERRUPT_TC | \
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DL_MCAN_INTERRUPT_TOO), false);
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DL_MCAN_enableIntrLine(CANFD0, DL_MCAN_INTR_LINE_NUM_0, false);
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DL_MCAN_enableIntrLine(CANFD0, DL_MCAN_INTR_LINE_NUM_1, false);
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DL_MCAN_clearInterruptStatus(MCAN,(DL_MCAN_MSP_INTERRUPT_LINE0));
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DL_MCAN_disableInterrupt(MCAN, DL_MCAN_MSP_INTERRUPT_LINE0);
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DL_MCAN_clearInterruptStatus(MCAN,(DL_MCAN_MSP_INTERRUPT_LINE1));
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DL_MCAN_disableInterrupt(MCAN, DL_MCAN_MSP_INTERRUPT_LINE1);
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DL_MCAN_disableInterrupt(MCAN, DL_MCAN_MSP_INTERRUPT_LINE1);
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DL_MCAN_setOpMode(MCAN, DL_MCAN_OPERATION_MODE_SW_INIT);
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DL_MCAN_setOpMode(CANFD0, DL_MCAN_OPERATION_MODE_NORMAL);
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b_MCAN_InitFlag = 0;
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DL_GPIO_initPeripheralOutputFunction(IOMUX_PINCM59, 0);
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DL_GPIO_initPeripheralInputFunction(IOMUX_PINCM60, 0);
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DL_MCAN_disableModuleClock(MCAN);
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DL_MCAN_disablePower(MCAN);
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delay_cycles(16);
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// DL_MCAN_setOpMode(CANFD0, DL_MCAN_OPERATION_MODE_SW_INIT);
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// while (DL_MCAN_OPERATION_MODE_SW_INIT != DL_MCAN_getOpMode(MCAN));
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//
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// DL_GPIO_disablePower(MCAN);
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//
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// DL_MCAN_setOpMode(CANFD0, DL_MCAN_OPERATION_MODE_SW_INIT);
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//
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//
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//
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// DL_MCAN_setOpMode(CANFD0, DL_MCAN_OPERATION_MODE_NORMAL);
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// DL_MCAN_enableIntrLine(CANFD0, DL_MCAN_INTR_LINE_NUM_1, false);
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//
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// DL_MCAN_enableIntrLine(CANFD0, DL_MCAN_INTR_LINE_NUM_0, false);
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// DL_MCAN_setOpMode(MCAN, DL_MCAN_OPERATION_MODE_SW_INIT);
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/* Wait till MCAN is in SW initialization mode */
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/* Wait till MCAN is in SW initialization mode */
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while (DL_MCAN_OPERATION_MODE_SW_INIT != DL_MCAN_getOpMode(MCAN));
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// while (DL_MCAN_OPERATION_MODE_SW_INIT != DL_MCAN_getOpMode(MCAN));
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// Reset MCAN module
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//DL_MCAN_reset(MCAN);
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/* Disable the MCAN clock */
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/* Disable the MCAN clock */
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DL_MCAN_disableModuleClock(MCAN);
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// DL_MCAN_disableModuleClock(MCAN);
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// DL_MCAN_reset(MCAN);
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//DL_GPIO_disablePower(MCAN);
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/* Clear initialization flag */
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/* Clear initialization flag */
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b_MCAN_InitFlag = 0;
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// b_MCAN_InitFlag = 0;
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return IVEC_MCAL_STATUS_SUCCESS;
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return IVEC_MCAL_STATUS_SUCCESS;
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}
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}
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//IVEC_McalStatus_e xMCAL_MCANDeInit(MCAN_Regs* MCAN)
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//{
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// assert(MCAN == CANFD0);
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// assert(b_MCAN_InitFlag != 0);
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//
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// // Disable interrupts
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// NVIC_DisableIRQ(CANFD0_INT_IRQn);
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// DL_MCAN_disableInterrupt(MCAN, DL_MCAN_MSP_INTERRUPT_LINE0 | DL_MCAN_MSP_INTERRUPT_LINE1);
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// // DL_MCAN_clearInterruptStatus(MCAN, DL_MCAN_MSP_INTERRUPT_LINE0 | DL_MCAN_MSP_INTERRUPT_LINE1);
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//
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// // Transition to SW initialization mode
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// DL_MCAN_setOpMode(MCAN, DL_MCAN_OPERATION_MODE_SW_INIT);
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// while (DL_MCAN_OPERATION_MODE_SW_INIT != DL_MCAN_getOpMode(MCAN));
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//
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//
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// // Disable clock and reset
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// DL_MCAN_disableModuleClock(MCAN);
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// DL_MCAN_reset(MCAN);
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//
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// // Power down
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// DL_GPIO_disablePower(MCAN);
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//
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// // Clear initialization flag
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// b_MCAN_InitFlag = 0;
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//
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// return IVEC_MCAL_STATUS_SUCCESS;
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//}
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/**
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/**
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* @brief Function to Transmit CAN message
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* @brief Function to Transmit CAN message
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* @param MCAN Pointer to the register overlay for the peripheral
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* @param MCAN Pointer to the register overlay for the peripheral
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@ -684,7 +779,9 @@ IVEC_McalStatus_e xMCAL_getMCAN_ErrorStatus(char *ErrorStatus)
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DL_MCAN_getErrCounters(CANFD0, &l_errCounter);
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DL_MCAN_getErrCounters(CANFD0, &l_errCounter);
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return ( (HeaderStat.lastErrCode == DL_MCAN_ERR_CODE_ACK_ERROR) || \
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return ( (HeaderStat.lastErrCode == DL_MCAN_ERR_CODE_ACK_ERROR) || \
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HeaderStat.busOffStatus) ? IVEC_MCAL_STATUS_ERROR : IVEC_MCAL_STATUS_SUCCESS;
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(HeaderStat.busOffStatus) || \
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(HeaderStat.lastErrCode == DL_MCAN_ERR_CODE_STUFF_ERROR) || \
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(HeaderStat.lastErrCode == DL_MCAN_ERR_CODE_FORM_ERROR) ) ? IVEC_MCAL_STATUS_ERROR : IVEC_MCAL_STATUS_SUCCESS;
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}
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}
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/**
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/**
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@ -58,13 +58,23 @@ IVEC_EcuCommonErr_e xECU_CANGetData(can_buff_t *pxBuff)
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}
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}
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IVEC_EcuCommonErr_e xECU_CanReInit(MCAN_Regs* MCAN,uint16_t speed)
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IVEC_EcuCommonErr_e xECU_CanReInit(MCAN_Regs* MCAN,uint16_t speed)
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{ IVEC_EcuCommonErr_e l_xFuncStatus = commonECU_SUCCESS;
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{
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IVEC_EcuCommonErr_e l_xFuncStatus = commonECU_SUCCESS;
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uint8_t l_i32Ret;
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uint8_t l_i32Ret;
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l_i32Ret = xMCAL_MCANDeInit(MCAN);
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l_i32Ret = xMCAL_MCANDeInit(MCAN);
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if(l_i32Ret != IVEC_MCAL_STATUS_SUCCESS)
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if(l_i32Ret != IVEC_MCAL_STATUS_SUCCESS)
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{
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{
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l_xFuncStatus = commonECU_DEINIT_FAIL;
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l_xFuncStatus = commonECU_DEINIT_FAIL;
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}
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}
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//DL_MCAN_reset(MCAN);
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// DL_GPIO_enablePower(GPIOA);
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// DL_GPIO_enablePower(GPIOB);
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DL_MCAN_enablePower(MCAN);
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delay_cycles(POWER_STARTUP_DELAY);
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DL_GPIO_initPeripheralOutputFunction(GPIO_MCAN0_IOMUX_CAN_TX, GPIO_MCAN0_IOMUX_CAN_TX_FUNC);
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DL_GPIO_initPeripheralInputFunction(GPIO_MCAN0_IOMUX_CAN_RX, GPIO_MCAN0_IOMUX_CAN_RX_FUNC);
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l_i32Ret = xMCAL_MCANInit(MCAN,speed);
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l_i32Ret = xMCAL_MCANInit(MCAN,speed);
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if(l_i32Ret != IVEC_MCAL_STATUS_SUCCESS)
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if(l_i32Ret != IVEC_MCAL_STATUS_SUCCESS)
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{
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{
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@ -101,5 +111,9 @@ IVEC_EcuCommonErr_e xECU_GetCanStatus(MCAN_Regs* MCAN, uint16_t speed)
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{
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{
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char l_ucErrorString[32] = {0};
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char l_ucErrorString[32] = {0};
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if( xMCAL_getMCAN_ErrorStatus(&l_ucErrorString) == IVEC_MCAL_STATUS_ERROR )
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if( xMCAL_getMCAN_ErrorStatus(&l_ucErrorString) == IVEC_MCAL_STATUS_ERROR )
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{
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xECU_CanReInit(MCAN, speed);
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xECU_CanReInit(MCAN, speed);
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return commonECU_FAIL;
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}
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return commonECU_SUCCESS;
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}
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}
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@ -429,8 +429,12 @@ void vRTE_UARTDataProcess(void)
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}
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}
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if ( retCode >= 0 && (ulId > 0x00 && ulId < 0xffffffff) )
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if ( retCode >= 0 && (ulId > 0x00 && ulId < 0xffffffff) )
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{
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{
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__gprv_u8Buf = (__gprv_u8Buf + 1) % 2;
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uint8_t status;
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xECU_WriteDataOverCAN(&g_pu8Buf[PKT_HEADER], ulId, retCode, __gprv_u8Buf);
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//__gprv_u8Buf = (__gprv_u8Buf + 1) % 2;
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status = xECU_WriteDataOverCAN(&g_pu8Buf[PKT_HEADER], ulId, retCode, 0);
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if(status != 0)
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vECU_InitiateUartToCanTransmit(&g_xUartHandle, 0x5, g_pu8Buf, 0);
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}
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}
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}
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}
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}
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}
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@ -469,7 +473,11 @@ void vRTE_CANDataProcess(void)
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else
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else
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break;
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break;
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}
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}
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xECU_GetCanStatus(CANFD0, g_u16CanSpeed);
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uint8_t status;
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status = xECU_GetCanStatus(CANFD0, g_u16CanSpeed);
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if ( status != 0)
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vECU_InitiateUartToCanTransmit(&g_xUartHandle, 0x4, g_pu8Buf, 0);
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}
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}
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// Function to control individual relays based on relay_status (16 bits)
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// Function to control individual relays based on relay_status (16 bits)
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@ -7,7 +7,7 @@ _Min_Stack_Size = 0x000012E8; /* required amount of stack */
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/* Specify the memory areas */
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/* Specify the memory areas */
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MEMORY
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MEMORY
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{
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{
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FLASH (RX) : ORIGIN = 0x00000000, LENGTH = 0x00020000
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FLASH (RX) : ORIGIN = 0x00008000, LENGTH = 0x00018000
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SRAM (RWX) : ORIGIN = 0x20200000, LENGTH = 0x00008000
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SRAM (RWX) : ORIGIN = 0x20200000, LENGTH = 0x00008000
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BCR_CONFIG (R) : ORIGIN = 0x41C00000, LENGTH = 0x00000080
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BCR_CONFIG (R) : ORIGIN = 0x41C00000, LENGTH = 0x00000080
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BSL_CONFIG (R) : ORIGIN = 0x41C00100, LENGTH = 0x00000080
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BSL_CONFIG (R) : ORIGIN = 0x41C00100, LENGTH = 0x00000080
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@ -33,7 +33,7 @@ SECTIONS
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{
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{
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/* section for the interrupt vector area */
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/* section for the interrupt vector area */
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PROVIDE (_intvecs_base_address =
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PROVIDE (_intvecs_base_address =
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DEFINED(_intvecs_base_address) ? _intvecs_base_address : 0x00000000);
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DEFINED(_intvecs_base_address) ? _intvecs_base_address : 0x00008000);
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.intvecs (_intvecs_base_address) : AT (_intvecs_base_address) {
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.intvecs (_intvecs_base_address) : AT (_intvecs_base_address) {
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KEEP (*(.intvecs))
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KEEP (*(.intvecs))
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@ -38,7 +38,7 @@ typedef enum
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// 1 - Basil Battery Smart
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// 1 - Basil Battery Smart
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// 2 - Basil
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// 2 - Basil
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// 3 - Battery Swapping Station
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// 3 - Battery Swapping Station
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#define UART_PIN_SELECTION 3 // Set the desired UART configuration here
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#define UART_PIN_SELECTION 2 // Set the desired UART configuration here
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volatile int i32TickCnt;
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volatile int i32TickCnt;
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