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feat: Implement UART to CAN and CAN to UART communication 

- Implemented RX and TX functionalities for UART to CAN and CAN to UART
- Updated necessary layers to support seamless communication
stable
Rakshitavecmocon 2024-10-04 18:51:42 +05:30
parent c5e0c06a07
commit 85a15dc97f
10 changed files with 496 additions and 242 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
Core/Include/ivec_mcal_mcan.h
View File

@ -5,6 +5,15 @@
#include "ti_msp_dl_config.h" #include "ti_msp_dl_config.h"
#include "..\utils\utils.h" #include "..\utils\utils.h"
typedef enum
{
STD_ID = 0x00,
EXT_ID = 0x01,
ERROR = 0x02
} xCanIdType_t;
IVEC_McalStatus_e xMCAL_MCANInit(MCAN_Regs* const mcan, xCAN_baud_t BAUD); IVEC_McalStatus_e xMCAL_MCANInit(MCAN_Regs* const mcan, xCAN_baud_t BAUD);
IVEC_McalStatus_e xMCAL_MCANDeInit(MCAN_Regs* const mcan); IVEC_McalStatus_e xMCAL_MCANDeInit(MCAN_Regs* const mcan);
IVEC_McalStatus_e xMCAL_MCANTx(MCAN_Regs *MCAN, DL_MCAN_TxBufElement *TxMsg ,uint16_t *TxData, uint32_t BufNum, int Bytes); IVEC_McalStatus_e xMCAL_MCANTx(MCAN_Regs *MCAN, DL_MCAN_TxBufElement *TxMsg ,uint16_t *TxData, uint32_t BufNum, int Bytes);
@ -12,5 +21,7 @@ IVEC_McalStatus_e xMCAL_MCANRx(MCAN_Regs *MCAN, DL_MCAN_RxBufElement *RxMsg ,uin
IVEC_McalStatus_e xMCAL_getMCAN_ErrorStatus(char *ErrorStatus); IVEC_McalStatus_e xMCAL_getMCAN_ErrorStatus(char *ErrorStatus);
IVEC_McalStatus_e xMCAL_getMCAN_InterruptLine1Status(uint32_t *Interrupt_Status); IVEC_McalStatus_e xMCAL_getMCAN_InterruptLine1Status(uint32_t *Interrupt_Status);
void mcu_FDCAN_RxFifo_Callback(uint32_t Identifier, uint8_t *data, uint16_t DataLength);
#endif /* CORE_INCLUDE_IVEC_MCAL_MCAN_H_ */ #endif /* CORE_INCLUDE_IVEC_MCAL_MCAN_H_ */

152
Core/Source/ivec_mcal_mcan.c
View File

@ -20,6 +20,7 @@ static uint32_t id;
extern uint16_t idx; extern uint16_t idx;
uint32_t IntrStatus; uint32_t IntrStatus;
static volatile uint8_t u8_MCAN_StatusFlag = IVEC_MCAL_STATUS_ERROR; static volatile uint8_t u8_MCAN_StatusFlag = IVEC_MCAL_STATUS_ERROR;
uint8_t g_CanData[8];
/*REQUIRED MCAN CONFIGS*/ /*REQUIRED MCAN CONFIGS*/
@ -252,78 +253,81 @@ static void ErrorHandler()
* @brief Default Interrupt Handler for MCAN * @brief Default Interrupt Handler for MCAN
* *
*/ */
void CANFD0_IRQHandler(void)
{
ErrorHandler();
switch (DL_MCAN_getPendingInterrupt(CANFD0)) {
case DL_MCAN_IIDX_LINE1:
/* Check MCAN interrupts fired during TX/RX of CAN package */
u32InterruptLine1Status |= DL_MCAN_getIntrStatus(CANFD0);
DL_MCAN_clearIntrStatus(CANFD0, u32InterruptLine1Status,DL_MCAN_INTR_SRC_MCAN_LINE_1);
b_ServiceInt = true;
break;
default:
break;
}
}
//void CANFD0_IRQHandler(void) //void CANFD0_IRQHandler(void)
//{ //{
// IntrStatus = DL_MCAN_getIntrStatus(CANFD0);
//
// if (IntrStatus & DL_MCAN_INTERRUPT_TC){
// __asm("nop");
// DL_MCAN_clearIntrStatus(CANFD0, IntrStatus,DL_MCAN_INTR_SRC_MCAN_LINE_1);
//
// b_ServiceInt = true;
// u8_MCAN_StatusFlag = IVEC_MCAL_STATUS_SUCCESS;
// __asm("nop");
// }
// else if(IntrStatus & DL_MCAN_INTERRUPT_RF0N)
// {
// b_ServiceInt = false;
// rxFS.fillLvl = 0;
// rxFS.num = DL_MCAN_RX_FIFO_NUM_0;
//
// while ((rxFS.fillLvl) == 0)
// {
// DL_MCAN_getRxFIFOStatus(CANFD0, &rxFS);
// }
//
// DL_MCAN_readMsgRam(CANFD0, DL_MCAN_MEM_TYPE_FIFO, 0, rxFS.num, &TempRxMsg);
// DL_MCAN_writeRxFIFOAck(CANFD0, rxFS.num, rxFS.getIdx);
//
// xCanIdType_t idType = ERROR;
// if (TempRxMsg.id >= 0 && TempRxMsg.id <= 0x7FF)
// {
// idType = STD_ID;
// } else if (TempRxMsg.id <= 0x1FFFFFFF)
// {
// idType = EXT_ID;
// }
//
// uint32_t idx = ((TempRxMsg.id & (uint32_t) 0x1FFC0000) >> (uint32_t) 18);
//
// if(idx)
// {
// for(uint8_t inx = 0; inx <= 7; inx++)
// {
// g_CanData[inx] = TempRxMsg.data[inx];
// }
// mcu_FDCAN_RxFifo_Callback(idx, &g_CanData[0], TempRxMsg.dlc);
// }
//
// b_ServiceInt = true;
// DL_MCAN_clearIntrStatus(CANFD0, IntrStatus,DL_MCAN_INTR_SRC_MCAN_LINE_1);
// }
// else{
// DL_MCAN_getIntrStatus(CANFD0);
// DL_MCAN_clearIntrStatus(CANFD0, IntrStatus,DL_MCAN_INTR_SRC_MCAN_LINE_1);
// }
// ErrorHandler(); // ErrorHandler();
//
// switch (DL_MCAN_getPendingInterrupt(CANFD0)) {
// case DL_MCAN_IIDX_LINE1:
// /* Check MCAN interrupts fired during TX/RX of CAN package */
// u32InterruptLine1Status |= DL_MCAN_getIntrStatus(CANFD0);
// DL_MCAN_clearIntrStatus(CANFD0, u32InterruptLine1Status,DL_MCAN_INTR_SRC_MCAN_LINE_1);
// b_ServiceInt = true;
// break;
// default:
// break;
// }
//} //}
void CANFD0_IRQHandler(void)
{
IntrStatus = DL_MCAN_getIntrStatus(CANFD0);
if (IntrStatus & DL_MCAN_INTERRUPT_TC){
__asm("nop");
DL_MCAN_clearIntrStatus(CANFD0, IntrStatus,DL_MCAN_INTR_SRC_MCAN_LINE_1);
b_ServiceInt = true;
u8_MCAN_StatusFlag = IVEC_MCAL_STATUS_SUCCESS;
__asm("nop");
}
else if(IntrStatus & DL_MCAN_INTERRUPT_RF0N)
{
b_ServiceInt = false;
rxFS.fillLvl = 0;
rxFS.num = DL_MCAN_RX_FIFO_NUM_0;
while ((rxFS.fillLvl) == 0)
{
DL_MCAN_getRxFIFOStatus(CANFD0, &rxFS);
}
DL_MCAN_readMsgRam(CANFD0, DL_MCAN_MEM_TYPE_FIFO, 0, rxFS.num, &TempRxMsg);
DL_MCAN_writeRxFIFOAck(CANFD0, rxFS.num, rxFS.getIdx);
xCanIdType_t idType = ERROR;
if (TempRxMsg.id >= 0 && TempRxMsg.id <= 0x7FF)
{
idType = STD_ID;
} else if (TempRxMsg.id <= 0x1FFFFFFF)
{
idType = EXT_ID;
}
uint32_t idx = ((TempRxMsg.id & (uint32_t) 0x1FFC0000) >> (uint32_t) 18);
if(idx)
{
for(uint8_t inx = 0; inx <= 7; inx++)
{
g_CanData[inx] = TempRxMsg.data[inx];
}
printf("trigger id %d\n",idx);
mcu_FDCAN_RxFifo_Callback(idx, &g_CanData[0], TempRxMsg.dlc);
}
b_ServiceInt = true;
DL_MCAN_clearIntrStatus(CANFD0, IntrStatus,DL_MCAN_INTR_SRC_MCAN_LINE_1);
}
else{
DL_MCAN_getIntrStatus(CANFD0);
DL_MCAN_clearIntrStatus(CANFD0, IntrStatus,DL_MCAN_INTR_SRC_MCAN_LINE_1);
}
ErrorHandler();
}
/*============================================================================================================================================================================================= /*=============================================================================================================================================================================================
API API
==============================================================================================================================================================================================*/ ==============================================================================================================================================================================================*/
@ -453,8 +457,22 @@ IVEC_McalStatus_e xMCAL_MCANTx(MCAN_Regs *MCAN, DL_MCAN_TxBufElement *TxMsg ,uin
TxMsg->data[i] = TxData[i]; TxMsg->data[i] = TxData[i];
} }
// uint32_t txPendingStatus;
//
// //Check if the Tx Buffer is available (no pending request)
//txPendingStatus = DL_MCAN_getTxBufReqPend(MCAN);
// Check if the specified buffer (BufNum) is available
// if ((txPendingStatus & (1 << BufNum)) == 0)
// {
DL_MCAN_writeMsgRam(MCAN, DL_MCAN_MEM_TYPE_BUF, BufNum , TxMsg); DL_MCAN_writeMsgRam(MCAN, DL_MCAN_MEM_TYPE_BUF, BufNum , TxMsg);
DL_MCAN_TXBufAddReq(MCAN, BufNum); DL_MCAN_TXBufAddReq(MCAN, BufNum);
// }
// else
// {
// return IVEC_MCAL_STATUS_BUSY;
//
// }
return IVEC_MCAL_STATUS_SUCCESS; return IVEC_MCAL_STATUS_SUCCESS;
} }

95
Core/Source/ivec_mcal_uart.c
View File

@ -22,7 +22,7 @@ void UART_ReadCallback(UART_Regs *uart, uint8_t *buf, bool status)
if (g_pxUartHandles[i] != NULL ) if (g_pxUartHandles[i] != NULL )
{ {
if (g_pxUartHandles[i]->pvUartRecvCallback != NULL) if (g_pxUartHandles[i]->pvUartRecvCallback != NULL)
g_pxUartHandles[i]->pvUartRecvCallback(IVEC_MCAL_UART_EVENT_RX_ARRIVED, buf, 1); g_pxUartHandles[i]->pvUartRecvCallback(IVEC_MCAL_UART_EVENT_RX_ARRIVED, (char *)buf, 1);
break; break;
} }
} }
@ -31,15 +31,15 @@ void UART_ReadCallback(UART_Regs *uart, uint8_t *buf, bool status)
void _prv_vrxcallback() void _prv_vrxcallback()
{ {
switch (DL_UART_Main_getPendingInterrupt(UART1)) switch (DL_UART_Main_getPendingInterrupt(UART0))
{ {
case DL_UART_MAIN_IIDX_RX: case DL_UART_MAIN_IIDX_RX:
{ {
bool status = 0; bool status = 0;
status = DL_UART_receiveDataCheck(UART1, &u8rxbuffer1); status = DL_UART_receiveDataCheck(UART0, (uint8_t *)&u8rxbuffer1);
if(status == true) if(status == true)
{ {
UART_ReadCallback(UART1,&u8rxbuffer1,status); UART_ReadCallback(UART0,(uint8_t *)&u8rxbuffer1,status);
} }
break; break;
} }
@ -68,6 +68,85 @@ void _prv_vrxcallback()
default: default:
break; break;
} }
switch (DL_UART_Main_getPendingInterrupt(UART1))
{
case DL_UART_MAIN_IIDX_RX:
{
bool status = 0;
status = DL_UART_receiveDataCheck(UART1, (uint8_t *)&u8rxbuffer1);
if(status == true)
{
UART_ReadCallback(UART1,(uint8_t *)&u8rxbuffer1,status);
}
break;
}
// case DL_UART_MAIN_IIDX_EOT_DONE:
// {
// g_TxCplt = true;
// }
case DL_UART_MAIN_IIDX_OVERRUN_ERROR:
__asm("nop");
break;
case DL_UART_MAIN_IIDX_BREAK_ERROR:
__asm("nop");
break;
case DL_UART_MAIN_IIDX_PARITY_ERROR:
__asm("nop");
break;
case DL_UART_MAIN_IIDX_FRAMING_ERROR:
__asm("nop");
break;
case DL_UART_MAIN_IIDX_RX_TIMEOUT_ERROR:
__asm("nop");
break;
case DL_UART_MAIN_IIDX_NOISE_ERROR:
__asm("nop");
break;
default:
break;
}
switch (DL_UART_Main_getPendingInterrupt(UART2))
{
case DL_UART_MAIN_IIDX_RX:
{
bool status = 0;
status = DL_UART_receiveDataCheck(UART2, (uint8_t *)&u8rxbuffer1);
if(status == true)
{
UART_ReadCallback(UART2,(uint8_t *)&u8rxbuffer1,status);
}
break;
}
// case DL_UART_MAIN_IIDX_EOT_DONE:
// {
// g_TxCplt = true;
// }
case DL_UART_MAIN_IIDX_OVERRUN_ERROR:
__asm("nop");
break;
case DL_UART_MAIN_IIDX_BREAK_ERROR:
__asm("nop");
break;
case DL_UART_MAIN_IIDX_PARITY_ERROR:
__asm("nop");
break;
case DL_UART_MAIN_IIDX_FRAMING_ERROR:
__asm("nop");
break;
case DL_UART_MAIN_IIDX_RX_TIMEOUT_ERROR:
__asm("nop");
break;
case DL_UART_MAIN_IIDX_NOISE_ERROR:
__asm("nop");
break;
default:
break;
}
}
void UART0_IRQHandler()
{
_prv_vrxcallback();
} }
void UART1_IRQHandler() void UART1_IRQHandler()
@ -75,6 +154,11 @@ void UART1_IRQHandler()
_prv_vrxcallback(); _prv_vrxcallback();
} }
void UART2_IRQHandler()
{
_prv_vrxcallback();
}
// Get the UART instance based on the enum // Get the UART instance based on the enum
static UART_Regs* GetUartInstance(McalUartPortNumber_e eUartPortNumber) static UART_Regs* GetUartInstance(McalUartPortNumber_e eUartPortNumber)
@ -338,6 +422,8 @@ static xCoreStatus_t uart_init(McalUartHandle_s* pxUartHandle, McalUartBaudRate_
// assert(uart_inst == UART1 || uart_inst == UART3);IOMUX_PINCM16 // assert(uart_inst == UART1 || uart_inst == UART3);IOMUX_PINCM16
// assert(xBaud == BAUD_115200 || xBaud == BAUD_9600); // assert(xBaud == BAUD_115200 || xBaud == BAUD_9600);
// assert(!(b_UART1_init_flag == 1 && b_UART3_init_flag == 1)); // assert(!(b_UART1_init_flag == 1 && b_UART3_init_flag == 1));
DL_GPIO_initPeripheralOutputFunction(IOMUX_PINCM32, IOMUX_PINCM32_PF_UART2_TX);
DL_GPIO_initPeripheralInputFunction(IOMUX_PINCM33, IOMUX_PINCM33_PF_UART2_RX);
// Get the UART instance based on the port number in the handle // Get the UART instance based on the port number in the handle
UART_Regs* uart_inst = GetUartInstance(pxUartHandle->eUartPortNumber); UART_Regs* uart_inst = GetUartInstance(pxUartHandle->eUartPortNumber);
@ -576,6 +662,7 @@ static void __prvMCAL_UartRegisterHandle(McalUartHandle_s* pxUartHandle)
*/ */
IVEC_McalCommonErr_e xMCAL_UartInit(McalUartHandle_s* pxUartHandle) IVEC_McalCommonErr_e xMCAL_UartInit(McalUartHandle_s* pxUartHandle)
{ {
IVEC_MCAL_FUNC_ENTRY(LOG_STRING); IVEC_MCAL_FUNC_ENTRY(LOG_STRING);
IVEC_McalCommonErr_e l_xFuncStatus = commonMCAL_SUCCESS; IVEC_McalCommonErr_e l_xFuncStatus = commonMCAL_SUCCESS;
if (pxUartHandle == NULL) if (pxUartHandle == NULL)

70
ivec_ECU/ivec_ecu_can/inc/ivec_ecu_can.h
View File

@ -0,0 +1,70 @@
#define IVEC_ECU_CAN_H
#include "../Core/Include/ivec_mcal_mcan.h"
#include "../ivec_ECU/ivec_ecu_common/inc/ivec_ecu_common.h"
#include "stdint.h"
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#define QUEUE(name, buff) \
volatile can_queue_t name = { \
.front = 0, \
.rear = 0, \
.size = (sizeof(buff)/sizeof(buff[0])), \
.element_size = sizeof(buff[0]), \
.buffer = buff, \
}
#define FLUSH(name) do { \
name.front = 0; \
name.rear = 0; \
memset(name.buffer, 0x00, name.size); \
} while(0)
#define ENQUEUE(queue, data) do { \
memcpy(&queue.buffer[queue.front++], &data, sizeof(data)); \
queue.front %= queue.size; \
} while(0)
#define DEQUEUE(queue, data) do { \
memcpy(&data, &queue.buffer[queue.rear++], sizeof(data)); \
queue.rear %= queue.size; \
} while(0)
#define IS_FULL(queue) ((queue.front - queue.rear) == (queue.size -1) || \
(queue.front - queue.rear) == -1)
#define IS_EMPTY(queue) (queue.front == queue.rear)
/*Private Variable*/
typedef struct {
uint32_t id;
uint8_t data[8];
uint8_t length;
uint8_t resv[3];
} can_buff_t;
typedef struct {
uint16_t front;
uint16_t rear;
uint16_t size;
uint8_t element_size;
can_buff_t * buffer;
} can_queue_t;
void mcu_FDCAN_RxFifo_Callback(uint32_t Identifier, uint8_t *data, uint16_t DataLength);
uint8_t store_msg_from_isr_to_queue(uint32_t id, uint8_t* data, uint8_t len);
IVEC_EcuCommonErr_e xECU_CANInit(MCAN_Regs* MCAN, xCAN_baud_t BAUD);
IVEC_EcuCommonErr_e xECU_CANDeInit(MCAN_Regs* MCAN);
IVEC_EcuCommonErr_e xECU_WriteDataOverCAN(uint8_t* pucBuf, uint32_t ulId, int retCode, uint32_t BufNum);
IVEC_EcuCommonErr_e xECU_CANGetData(can_buff_t *xBuff);
IVEC_EcuCommonErr_e xECU_CanReInit(MCAN_Regs* MCAN,uint16_t speed);

129
ivec_ECU/ivec_ecu_can/src/ivec_ecu_can.c
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@ -0,0 +1,129 @@
#include "../ivec_ECU/ivec_ecu_can/inc/ivec_ecu_can.h"
#include "../ivec_ECU/ivec_ecu_uart/inc/ivec_ecu_uart.h"
#include "../Core/Include/ivec_mcal_uart.h"
static can_buff_t g_canBuffer[1024] = {0}; /*All the CAN Id, Len and Data are stored in this array*/
QUEUE(g_canQueue, g_canBuffer);
void mcu_FDCAN_RxFifo_Callback(uint32_t Identifier, uint8_t *data, uint16_t DataLength)
{
if (!IS_FULL(g_canQueue)) {
store_msg_from_isr_to_queue(Identifier, data, DataLength);
}
}
uint8_t store_msg_from_isr_to_queue(uint32_t id, uint8_t* data, uint8_t len)
{
can_buff_t buff = {0};
buff.id = id;
buff.length = len;
memcpy(buff.data, data, len);
printf("ENQUEUE %d\n",id);
ENQUEUE(g_canQueue, buff);
return 0;
}
IVEC_EcuCommonErr_e xECU_WriteDataOverCAN(uint8_t* pucBuf, uint32_t ulId, int retCode, uint32_t BufNum)
{
IVEC_EcuCommonErr_e l_xFuncStatus = commonECU_WRITE_FAIL;
uint8_t l_i32Ret;
// if ( (retCode >= 0) && (ulId > 0x00) && (ulId < 0xffffffff) )
// {
DL_MCAN_TxBufElement xFrame = {0};
xFrame.id = ulId; //txMsg.id = ((uint32_t)(0x9)) << 18U;
xFrame.dlc = (uint8_t)retCode;
xFrame.xtd = (ulId > 0x7ff) ? 1U : 0U;
xFrame.rtr = 0U;
/* ESI bit in CAN FD format depends only on error passive flag. */
xFrame.esi = 0U;
/* CAN FD frames transmitted with bit rate switching. */
xFrame.brs = 0U;
/* Frame transmitted in CAN FD format. */
xFrame.fdf = 0U;
/* Store Tx events. */
xFrame.efc = 1U;
/* Message Marker. */
xFrame.mm = 0xAAU;
uint16_t TxData[DL_MCAN_MAX_PAYLOAD_BYTES]; // Define a buffer for the CAN payload data
// Copy the data you want to transmit (from pucBuf) into TxData
memcpy(TxData, &pucBuf[PKT_HEADER], retCode);
// Set up the buffer number
//uint32_t BufNum = 0; // Example: Use buffer number 0
// Number of bytes to transmit (retCode holds DLC)
int Bytes = retCode;
l_i32Ret = xMCAL_MCANTx(CANFD0, &xFrame, TxData, BufNum, Bytes);
if(l_i32Ret == IVEC_MCAL_STATUS_SUCCESS)
{
l_xFuncStatus = commonECU_SUCCESS;
}
//}
return l_xFuncStatus;
}
IVEC_EcuCommonErr_e xECU_CANGetData(can_buff_t *pxBuff)
{
IVEC_EcuCommonErr_e l_xFuncStatus = commonECU_FAIL;
if (!IS_EMPTY(g_canQueue))
{
can_buff_t xBuff = { 0x00 };
DEQUEUE(g_canQueue, xBuff);
memcpy(pxBuff,&xBuff,sizeof(can_buff_t));
printf("ID received dequeue %d\n",xBuff.id);
l_xFuncStatus = commonECU_SUCCESS;
}
return l_xFuncStatus;
}
IVEC_EcuCommonErr_e xECU_CanReInit(MCAN_Regs* MCAN,uint16_t speed)
{ IVEC_EcuCommonErr_e l_xFuncStatus = commonECU_SUCCESS;
uint8_t l_i32Ret;
l_i32Ret = xMCAL_MCANDeInit(MCAN);
if(l_i32Ret != IVEC_MCAL_STATUS_SUCCESS)
{
l_xFuncStatus = commonECU_DEINIT_FAIL;
}
//vCanConfigFilter();
l_i32Ret = xMCAL_MCANInit(MCAN,speed);
if(l_i32Ret != IVEC_MCAL_STATUS_SUCCESS)
{
l_xFuncStatus = commonECU_INIT_FAIL;
}
return l_xFuncStatus;
}
IVEC_EcuCommonErr_e xECU_CANInit(MCAN_Regs* MCAN, xCAN_baud_t BAUD)
{
IVEC_EcuCommonErr_e l_xFuncStatus = commonECU_SUCCESS;
uint8_t l_i32Ret;
l_i32Ret = xMCAL_MCANInit(MCAN,BAUD);
if(l_i32Ret != IVEC_MCAL_STATUS_SUCCESS)
{
l_xFuncStatus = commonECU_INIT_FAIL;
}
return l_xFuncStatus;
}
IVEC_EcuCommonErr_e xECU_CANDeInit(MCAN_Regs* MCAN)
{
IVEC_EcuCommonErr_e l_xFuncStatus = commonECU_SUCCESS;
uint8_t l_i32Ret;
l_i32Ret = xMCAL_MCANDeInit(MCAN);
if(l_i32Ret != IVEC_MCAL_STATUS_SUCCESS)
{
l_xFuncStatus = commonECU_INIT_FAIL;
}
return l_xFuncStatus;
}

9
ivec_ECU/ivec_ecu_uart/inc/ivec_ecu_uart.h
View File

@ -1,5 +1,6 @@
#ifndef IVEC_ECU_UART_H #ifndef IVEC_ECU_UART_H
#define IVEC_ECU_UART_H #define IVEC_ECU_UART_H
//#include "ivec_mcal_uart.h" //#include "ivec_mcal_uart.h"
#include "../Core/Include/ivec_mcal_uart.h" #include "../Core/Include/ivec_mcal_uart.h"
#include "../ivec_ECU/ivec_ecu_common/inc/ivec_ecu_common.h" #include "../ivec_ECU/ivec_ecu_common/inc/ivec_ecu_common.h"
@ -30,7 +31,7 @@ typedef int PacketRetCode_t;/*SERVICE_SUCESS or SERVICE_FAIL*/
/*=========================================================================== /*===========================================================================
* Functions declaration * Functions declaration
===========================================================================*/ ===========================================================================*/
IVEC_EcuCommonErr_e xECU_UARTInit(); IVEC_EcuCommonErr_e xECU_UARTInit(McalUartHandle_s* prvUartHandle);
IVEC_EcuCommonErr_e xECU_UARTDeInit(McalUartHandle_s *prvUartHandle); IVEC_EcuCommonErr_e xECU_UARTDeInit(McalUartHandle_s *prvUartHandle);
IVEC_EcuCommonErr_e xECU_UARTTransmit(McalUartHandle_s *prvUartHandle, uint8_t* pucBuffer, uint16_t len); IVEC_EcuCommonErr_e xECU_UARTTransmit(McalUartHandle_s *prvUartHandle, uint8_t* pucBuffer, uint16_t len);
//Uart_Typedef_e xUartWrite(Uart_PortHandle_s *xportHandle, uint8_t* pucBuffer, uint16_t len, uint16_t timeout); //Uart_Typedef_e xUartWrite(Uart_PortHandle_s *xportHandle, uint8_t* pucBuffer, uint16_t len, uint16_t timeout);
@ -38,7 +39,7 @@ IVEC_EcuCommonErr_e xECU_UARTGetData(McalUartHandle_s *prvUartHandle, uint8_t* p
//Uart_Typedef_e xUartReceive(Uart_PortHandle_s *xportHandle, uint8_t* pucBuffer, uint16_t len, uint16_t timeout); //Uart_Typedef_e xUartReceive(Uart_PortHandle_s *xportHandle, uint8_t* pucBuffer, uint16_t len, uint16_t timeout);
PacketRetCode_t xECU_FormatUartPacket(McalUartHandle_s *prvUartHandle, uint8_t* pucData, uint8_t ucDlc, uint32_t ulId); PacketRetCode_t xECU_FormatUartPacket(McalUartHandle_s *prvUartHandle, uint8_t* pucData, uint8_t ucDlc, uint32_t ulId);
PacketRetCode_t xECU_ReadCANDataOverUART(McalUartHandle_s *prvUartHandle, uint8_t* pucBuf, uint32_t *ulId); PacketRetCode_t xECU_ReadCANDataLenOverUART(McalUartHandle_s *prvUartHandle, uint8_t* pucBuf, uint32_t *ulId);
void vPacketRun(void); PacketRetCode_t xECU_ReadCANDataOverUART(McalUartHandle_s* prvUartHandle, uint8_t* pucBuf, uint32_t *ulId);
int vECU_InitiateUartToCanTransmit(uint32_t id, uint8_t *pucData, uint8_t ucLen); int vECU_InitiateUartToCanTransmit(McalUartHandle_s* prvUartHandle, uint32_t id, uint8_t *pucData, uint8_t ucLen);

182
ivec_ECU/ivec_ecu_uart/src/ivec_ecu_uart.c
View File

@ -20,10 +20,11 @@ uint8_t QueueBuffer[100];
#define DATA_PACKET_TIMEOUT 300 #define DATA_PACKET_TIMEOUT 300
McalUartHandle_s prvUartHandle; //McalUartHandle_s prvUartHandle;
#define SIZE 12U //#define SIZE 12U
uint8_t u8txdata[SIZE]="Hello World"; //uint8_t u8txdata[SIZE]="Hello World";
uint32_t u32data_size=sizeof(u8txdata); //uint32_t u32data_size=sizeof(u8txdata);
uint8_t u8rxdata;
// Get the UART instance based on the enum // Get the UART instance based on the enum
static UART_Regs* GetUartInstance(McalUartPortNumber_e eUartPortNumber) static UART_Regs* GetUartInstance(McalUartPortNumber_e eUartPortNumber)
@ -68,18 +69,11 @@ static void prvChecksumCalculate(uint8_t* pkt, int len, uint8_t *ck) {
} }
IVEC_EcuCommonErr_e xECU_UARTInit(void) IVEC_EcuCommonErr_e xECU_UARTInit(McalUartHandle_s* prvUartHandle)
{ {
IVEC_ECU_FUNC_ENTRY(LOG_STRING); IVEC_ECU_FUNC_ENTRY(LOG_STRING);
IVEC_EcuCommonErr_e l_xFuncStatus = commonECU_SUCCESS; IVEC_EcuCommonErr_e l_xFuncStatus = commonECU_SUCCESS;
uint8_t l_i32Ret; uint8_t l_i32Ret;
// s
xMCAL_McuInit();
xMCAL_SYSCTL_INIT(SYSOSC,STANDBY0);
xMCAL_SYSTICK_INIT(Period_1ms);
// Initialize the timer with the desired timeout value
xMCAL_TimerInit(TIMG0); // Initialize your timer instance (e.g., TIMG0)
IVEC_ECU_LOG(LOG_STRING, "UART Initilising Queue"); IVEC_ECU_LOG(LOG_STRING, "UART Initilising Queue");
__gprv_MyEcuUARTResponseQueue.i32ElementSize = sizeof(uint8_t); __gprv_MyEcuUARTResponseQueue.i32ElementSize = sizeof(uint8_t);
@ -106,15 +100,15 @@ IVEC_EcuCommonErr_e xECU_UARTInit(void)
} }
IVEC_ECU_LOG(LOG_STRING, "Initilising UART"); IVEC_ECU_LOG(LOG_STRING, "Initilising UART");
prvUartHandle.eUartPortNumber = mcalUART_PORT2; prvUartHandle->eUartPortNumber = mcalUART_PORT3;
prvUartHandle.pvUartRecvCallback = __prv_vEcu_CANOverUartMsgCallback; prvUartHandle->pvUartRecvCallback = __prv_vEcu_CANOverUartMsgCallback;
prvUartHandle.xUartConfig.eUartBaudrate = mcalUART_BAUD_115200; prvUartHandle->xUartConfig.eUartBaudrate = mcalUART_BAUD_115200;
prvUartHandle.xUartConfig.eUartFlowCtrl = mcalUART_FC_NONE; prvUartHandle->xUartConfig.eUartFlowCtrl = mcalUART_FC_NONE;
prvUartHandle.xUartConfig.eUartDataBit = mcalUART_DATABIT_8; prvUartHandle->xUartConfig.eUartDataBit = mcalUART_DATABIT_8;
prvUartHandle.xUartConfig.eUartStopBit = mcalUART_STOP_1; prvUartHandle->xUartConfig.eUartStopBit = mcalUART_STOP_1;
prvUartHandle.xUartConfig.eUartParityBit = mcalUART_PARITY_NONE; prvUartHandle->xUartConfig.eUartParityBit = mcalUART_PARITY_NONE;
l_i32Ret = xMCAL_UartInit(&prvUartHandle); l_i32Ret = xMCAL_UartInit(prvUartHandle);
if (l_i32Ret != 0) if (l_i32Ret != 0)
{ {
l_xFuncStatus = commonECU_INIT_FAIL; l_xFuncStatus = commonECU_INIT_FAIL;
@ -128,10 +122,12 @@ IVEC_EcuCommonErr_e xECU_UARTInit(void)
// while(1) // while(1)
// { // {
//xMCAL_UartWrite(&prvUartHandle,u8txdata,u32data_size); //// uint8_t SIZE = 12;
//// uint8_t u8txdata[SIZE]="Hello World";
// xMCAL_UartWrite(&prvUartHandle,u8txdata,SIZE);
// delay(10000000); //1 sec delay // delay(10000000); //1 sec delay
//// //IVEC_McalCommonErr_e status; //// //IVEC_McalCommonErr_e status;
//// // status = xMCAL_UartRead(&prvUartHandle, u8rxdata,1); // xMCAL_UartRead(&prvUartHandle, &u8rxdata,1);
//// // delay(1000000); // delay //// // delay(1000000); // delay
//// // if(status == commonMCAL_SUCCESS){ //// // if(status == commonMCAL_SUCCESS){
//// // xMCAL_UartWrite(&prvUartHandle,&pucData,1); //// // xMCAL_UartWrite(&prvUartHandle,&pucData,1);
@ -225,27 +221,8 @@ IVEC_EcuCommonErr_e xECU_UARTGetData(McalUartHandle_s *prvUartHandle, uint8_t* p
return l_xFuncStatus; return l_xFuncStatus;
} }
//Uart_Typedef_e xUartReceive(Uart_PortHandle_s *xportHandle, uint8_t* pucBuffer, uint16_t len, uint16_t timeout)
//{
// (void) xportHandle;
// uint16_t ijk = 0;
// gpTimer_t xTimer = {0};
// GPT_timerSet(&xTimer, timeout+1);
// while( !GPT_timerExpired(&xTimer) && ( ijk < len ) )
// {
// if( g_xQueue.size > 0 )
// {
// if( Q_dequeue((QueueHandleTypeDef_t*)&g_xQueue, &pucBuffer[ijk]) == 0 )
// ijk++;
// }
// }
// if (ijk == len)
// return UART_OK;
// return UART_TIMEOUT;
//}
PacketRetCode_t xECU_ReadCANDataLenOverUART(McalUartHandle_s *prvUartHandle, uint8_t* pucBuf, uint32_t *ulId)
PacketRetCode_t xECU_ReadCANDataOverUART(McalUartHandle_s *prvUartHandle, uint8_t* pucBuf, uint32_t *ulId)
{ {
int PktLen = PACKET_FAIL; int PktLen = PACKET_FAIL;
if ((xECU_UARTGetData(prvUartHandle, (uint8_t*) &pucBuf[0], 1, 0) == commonECU_SUCCESS)) if ((xECU_UARTGetData(prvUartHandle, (uint8_t*) &pucBuf[0], 1, 0) == commonECU_SUCCESS))
@ -254,21 +231,28 @@ PacketRetCode_t xECU_ReadCANDataOverUART(McalUartHandle_s *prvUartHandle, uint8_
{ {
if (xECU_UARTGetData(prvUartHandle, (uint8_t*) &pucBuf[1], 1, 5) == commonECU_SUCCESS){ if (xECU_UARTGetData(prvUartHandle, (uint8_t*) &pucBuf[1], 1, 5) == commonECU_SUCCESS){
if (pucBuf[1] != 0x62){ if (pucBuf[1] != 0x62){
PktLen = PACKET_FAIL;
goto EXIT; //0x62 not found [OUT OF SYNC] goto EXIT; //0x62 not found [OUT OF SYNC]
} }
} }
else else
{ {
PktLen = PACKET_FAIL;
goto EXIT; goto EXIT;
} }
if (xECU_UARTGetData(prvUartHandle, (uint8_t*) &pucBuf[2], 5, DATA_PACKET_TIMEOUT) != commonECU_SUCCESS) if (xECU_UARTGetData(prvUartHandle, (uint8_t*) &pucBuf[2], 5, DATA_PACKET_TIMEOUT) != commonECU_SUCCESS){
PktLen = PACKET_FAIL;
goto EXIT; goto EXIT;
}
*(ulId) = (uint32_t)((pucBuf[6] << 24) | (pucBuf[5] << 16) | (pucBuf[4] << 8) | (pucBuf[3] << 0)); *(ulId) = (uint32_t)((pucBuf[6] << 24) | (pucBuf[5] << 16) | (pucBuf[4] << 8) | (pucBuf[3] << 0));
uint8_t l_ucTempLen = pucBuf[2]; uint8_t l_ucTempLen = pucBuf[2];
PktLen = PKT_HEADER_FOOTER + l_ucTempLen; PktLen = PKT_HEADER_FOOTER + l_ucTempLen;
if (xECU_UARTGetData(prvUartHandle, (uint8_t*) &pucBuf[PKT_HEADER], (uint32_t)(PktLen - PKT_HEADER), DATA_PACKET_TIMEOUT) != commonECU_SUCCESS) if (xECU_UARTGetData(prvUartHandle, (uint8_t*) &pucBuf[PKT_HEADER], (uint32_t)(PktLen - PKT_HEADER), DATA_PACKET_TIMEOUT) != commonECU_SUCCESS)
{
PktLen = PACKET_FAIL;
goto EXIT; goto EXIT;
}
uint8_t checksum[2]; uint8_t checksum[2];
prvChecksumCalculate(pucBuf, PktLen, checksum); prvChecksumCalculate(pucBuf, PktLen, checksum);
@ -290,39 +274,13 @@ EXIT:
return PktLen; return PktLen;
} }
void vPacketRun(void) PacketRetCode_t xECU_ReadCANDataOverUART(McalUartHandle_s* prvUartHandle ,uint8_t* pucBuf, uint32_t *ulId)
{ {
PacketRetCode_t retCode = PACKET_FAIL; PacketRetCode_t retCode = PACKET_FAIL;
uint8_t pucBuf[MAX_PACKET_LENGTH] = {0}; retCode = xECU_ReadCANDataLenOverUART(prvUartHandle, pucBuf, ulId);
uint32_t ulId = 0xffffffff; return retCode;
retCode = xECU_ReadCANDataOverUART(&prvUartHandle, pucBuf, &ulId);
} }
//
//bool vECU_UartEnqueueForTransmit (McalUartHandle_s* prvUartHandle, uint8_t const * const p_src, uint32_t const bytes)
//{
// UART_Regs* uart_inst = GetUartInstance(prvUartHandle->eUartPortNumber);
//
// DL_UART_Main_disableInterrupt(uart_inst,DL_UART_MAIN_INTERRUPT_EOT_DONE);
// //DL_UART_enableFIFOs(UART_0_INST); //enable uart
//
// //DL_UART_fillTXFIFO(); //Fill the TX FIFO until full using 8 bit access Continuously write
// //data into the queue until it is filled up or count has been reached.
// for (uint32_t i = 0; i < bytes; i++) {
// // Ensure queue is not full
// if(u8CMPLX_FifoQueueEmpty(&__gprv_MyEcuCANResponseQueue))
// {
// u8CMPLX_FifoEnqueue(&__gprv_MyEcuCANResponseQueue, &p_src[i], 1);
// }
// else
// {
// // Handle queue overflow error
// break;
// }
// }
//
// DL_UART_Main_enableInterrupt(uart_inst,DL_UART_MAIN_INTERRUPT_EOT_DONE);
// return 0;
//}
IVEC_EcuCommonErr_e xECU_UartWrite(McalUartHandle_s* prvUartHandle, uint8_t* pucBuffer, uint16_t len) IVEC_EcuCommonErr_e xECU_UartWrite(McalUartHandle_s* prvUartHandle, uint8_t* pucBuffer, uint16_t len)
{ {
@ -363,83 +321,9 @@ PacketRetCode_t xECU_FormatUartPacket(McalUartHandle_s* prvUartHandle, uint8_t*
return PACKET_SUCCESS; return PACKET_SUCCESS;
} }
int vECU_InitiateUartToCanTransmit(uint32_t id, uint8_t *pucData, uint8_t ucLen) int vECU_InitiateUartToCanTransmit(McalUartHandle_s* prvUartHandle, uint32_t id, uint8_t *pucData, uint8_t ucLen)
{ {
uint8_t pucBuf[MAX_PACKET_LENGTH] = {0}; uint8_t pucBuf[MAX_PACKET_LENGTH] = {0};
memcpy(&pucBuf[PKT_HEADER], pucData, ucLen); memcpy(&pucBuf[PKT_HEADER], pucData, ucLen);
return ( xECU_FormatUartPacket(&prvUartHandle, pucBuf, ucLen, id) == PACKET_SUCCESS ) ? 0 : -1; return ( xECU_FormatUartPacket(prvUartHandle, pucBuf, ucLen, id) == PACKET_SUCCESS ) ? 0 : -1;
} }
//Uart_Typedef_e xUartWrite(Uart_PortHandle_s *xportHandle, uint8_t* pucBuffer, uint16_t len, uint16_t timeout)
//{
// (void) xportHandle;
// Uart_Typedef_e retCode = UART_ERROR;
// gpTimer_t xTimer = {0};
// R_SCI_UART_Write(&g_uart3_ctrl, pucBuffer, len);
// GPT_timerSet(&xTimer, timeout);
// g_TxCplt = false;
// while(!GPT_timerExpired(&xTimer))
// {
// if(g_TxCplt == true){
// retCode = UART_OK;
// break;
// }
// }
// return retCode;
//}
//Uart_Typedef_e xUartReceive(Uart_PortHandle_s *xportHandle, uint8_t* pucBuffer, uint16_t len, uint16_t timeout)
//{
// (void) xportHandle;
// uint16_t ijk = 0;
// gpTimer_t xTimer = {0};
// GPT_timerSet(&xTimer, timeout+1);
// while( !GPT_timerExpired(&xTimer) && ( ijk < len ) )
// {
// if( g_xQueue.size > 0 )
// {
// if( Q_dequeue((QueueHandleTypeDef_t*)&g_xQueue, &pucBuffer[ijk]) == 0 )
// ijk++;
// }
// }
// if (ijk == len)
// return UART_OK;
// return UART_TIMEOUT;
//}
//Uart_Typedef_e xUartReceive(Uart_PortHandle_s *xportHandle, uint8_t* pucBuffer, uint16_t len, uint16_t timeout)
//{
// (void)xportHandle; // Ignore unused parameter
// uint16_t ijk = 0;
// uint32_t startCount; // Variable to store the initial timer count
//
// // Initialize the timer with the desired timeout value
// xMCAL_TimerInit(TIMG0); // Initialize your timer instance (e.g., TIMG0)
// xMCAL_TimersetLoadValue(TIMG0, timeout + 1, &startCount); // Set the timeout value
// xMCAL_TimerstartCounter(); // Start the timer
//
// while (!xMCAL_TimergetCount(&startCount) && (ijk < len)) // Check if timer has expired
// {
// if (g_xQueue.size > 0) // If there is data in the queue
// {
// if (Q_dequeue((QueueHandleTypeDef_t*)&g_xQueue, &pucBuffer[ijk]) == 0) // Dequeue data
// ijk++; // Increment the index if data was dequeued successfully
// }
// }
//
// // Stop the timer if required (optional, depending on your implementation)
// xMCAL_TimerstopCounter(); // Stop the timer
//
// if (ijk == len) // If the required length of data was received
// return UART_OK;
//
// return UART_TIMEOUT; // Return timeout if not enough data was received
//}

62
main.c
View File

@ -21,6 +21,7 @@
#include "../ivec_ECU/ivec_ecu_uart/inc/ivec_ecu_uart.h" #include "../ivec_ECU/ivec_ecu_uart/inc/ivec_ecu_uart.h"
#include "../ivec_ECU/ivec_ecu_can/inc/ivec_ecu_can.h"
#define DMA_CHANNEL 1 #define DMA_CHANNEL 1
#define ADC_CHANNEL 2 #define ADC_CHANNEL 2
@ -120,9 +121,9 @@ uint8_t u8SPI_DID[SPI_PKT_SIZE];
uint8_t u8SPI_ID1[SPI_PKT_SIZE]; uint8_t u8SPI_ID1[SPI_PKT_SIZE];
uint16_t u16SPI_ID2[SPI_PKT_SIZE]; uint16_t u16SPI_ID2[SPI_PKT_SIZE];
//uint8_t u8txdata[SIZE]="Hello World"; //uint8_t u8txdata[SIZE]="Hello World";
uint8_t u8rxdata[10]; //uint8_t u8rxdata;
unsigned char pucData; unsigned char pucData;
uint32_t u32rxbuffer_size=sizeof(u8rxdata);; //uint32_t u32rxbuffer_size=sizeof(u8rxdata);;
//uint32_t u32data_size=sizeof(u8txdata); //uint32_t u32data_size=sizeof(u8txdata);
uint8_t u8REG12_CFG_CS[]={0x36,0x92,0xFD}; uint8_t u8REG12_CFG_CS[]={0x36,0x92,0xFD};
@ -130,26 +131,57 @@ xCoreStatus_t xStatus1;
DL_MCAN_RxBufElement RxMsg; DL_MCAN_RxBufElement RxMsg;
flashStatus_t ret_UID,ret_MID; flashStatus_t ret_UID,ret_MID;
uint16_t TxData[8]={'H','e','l','l','o','o','o','o'}; McalUartHandle_s prvUartHandle;
volatile uint8_t gCheckUART=0;
volatile uint16_t idx=0;
void UARTDataProcess()
{
PacketRetCode_t retCode = PACKET_FAIL;
uint8_t pucBuf[MAX_PACKET_LENGTH] = {0};
uint32_t ulId = 0xffffffff;
retCode= xECU_ReadCANDataOverUART(&prvUartHandle,pucBuf,&ulId);
if(retCode > -1)
{
if(ulId == 0x00)
{
vECU_InitiateUartToCanTransmit(&prvUartHandle, ulId, pucBuf, 0);
}
else{
xECU_WriteDataOverCAN(pucBuf, ulId, retCode, 0);
}
}
}
void CANDataProcess()
{
IVEC_EcuCommonErr_e retCode = commonECU_FAIL;
can_buff_t xBuff = { 0x00 };
retCode = xECU_CANGetData(&xBuff);
if(retCode == commonECU_SUCCESS)
{
vECU_InitiateUartToCanTransmit(&prvUartHandle, (uint32_t)xBuff.id, (uint8_t*)&xBuff.data[0], (uint8_t)xBuff.length);
}
//delay(3200000);
}
int main(void) int main(void)
{ {
xECU_UARTInit(); xMCAL_McuInit();
uint32_t id = 0x41; printf("hii\n");
uint8_t ucLen = 8; xMCAL_SYSCTL_INIT(SYSOSC,STANDBY0);
uint8_t pucData[8] = {0x42,0x43,0x44,0x45,0x46,0x47,0x48,0x49}; xMCAL_SYSTICK_INIT(Period_1ms);
// Initialize the timer with the desired timeout value
xMCAL_TimerInit(TIMG0); // Initialize your timer instance (e.g., TIMG0)
xECU_UARTInit(&prvUartHandle);
xECU_CANInit(CANFD0,BAUD_500);
while(1) while(1)
{ {
UARTDataProcess();
vPacketRun(); CANDataProcess();
delay(10000000);
// vECU_InitiateUartToCanTransmit(id, pucData, ucLen);
// delay(10000000);
} }
// //
// //u8SPI_TxDum[]; // //u8SPI_TxDum[];

22
targetConfigs/MSPM0G3507.ccxml
View File

@ -1,23 +1,43 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?> <?xml version="1.0" encoding="UTF-8" standalone="no"?>
<configurations XML_version="1.2" id="configurations_0"> <configurations XML_version="1.2" id="configurations_0">
<configuration XML_version="1.2" id="Texas Instruments XDS110 USB Debug Probe_0"> <configuration XML_version="1.2" id="Texas Instruments XDS110 USB Debug Probe_0">
<instance XML_version="1.2" desc="Texas Instruments XDS110 USB Debug Probe_0" href="connections/TIXDS110_Connection.xml" id="Texas Instruments XDS110 USB Debug Probe_0" xml="TIXDS110_Connection.xml" xmlpath="connections"/> <instance XML_version="1.2" desc="Texas Instruments XDS110 USB Debug Probe_0" href="connections/TIXDS110_Connection.xml" id="Texas Instruments XDS110 USB Debug Probe_0" xml="TIXDS110_Connection.xml" xmlpath="connections"/>
<connection XML_version="1.2" id="Texas Instruments XDS110 USB Debug Probe_0">
<connection XML_version="1.2" desc="Texas Instruments XDS110 USB Debug Probe_0" id="Texas Instruments XDS110 USB Debug Probe_0">
<instance XML_version="1.2" href="drivers/tixds510cs_dap.xml" id="drivers" xml="tixds510cs_dap.xml" xmlpath="drivers"/> <instance XML_version="1.2" href="drivers/tixds510cs_dap.xml" id="drivers" xml="tixds510cs_dap.xml" xmlpath="drivers"/>
<instance XML_version="1.2" href="drivers/tixds510cortexM0.xml" id="drivers" xml="tixds510cortexM0.xml" xmlpath="drivers"/> <instance XML_version="1.2" href="drivers/tixds510cortexM0.xml" id="drivers" xml="tixds510cortexM0.xml" xmlpath="drivers"/>
<instance XML_version="1.2" href="drivers/tixds510sec_ap.xml" id="drivers" xml="tixds510sec_ap.xml" xmlpath="drivers"/> <instance XML_version="1.2" href="drivers/tixds510sec_ap.xml" id="drivers" xml="tixds510sec_ap.xml" xmlpath="drivers"/>
<property Type="choicelist" Value="1" id="The JTAG TCLK Frequency (MHz)"> <property Type="choicelist" Value="1" id="The JTAG TCLK Frequency (MHz)">
<choice Name="Fixed with user specified value" value="SPECIFIC"> <choice Name="Fixed with user specified value" value="SPECIFIC">
<property Type="stringfield" Value="1MHz" id="-- Enter a value from 100.0kHz to 2.5MHz"/> <property Type="stringfield" Value="1MHz" id="-- Enter a value from 100.0kHz to 2.5MHz"/>
</choice> </choice>
</property> </property>
<property Type="choicelist" Value="2" id="SWD Mode Settings"> <property Type="choicelist" Value="2" id="SWD Mode Settings">
<choice Name="SWD Mode - Aux COM port is target TDO pin" value="nothing"/> <choice Name="SWD Mode - Aux COM port is target TDO pin" value="nothing"/>
</property> </property>
<platform XML_version="1.2" id="platform_0"> <platform XML_version="1.2" id="platform_0">
<instance XML_version="1.2" desc="MSPM0G3507_0" href="devices/MSPM0G3507.xml" id="MSPM0G3507_0" xml="MSPM0G3507.xml" xmlpath="devices"/> <instance XML_version="1.2" desc="MSPM0G3507_0" href="devices/MSPM0G3507.xml" id="MSPM0G3507_0" xml="MSPM0G3507.xml" xmlpath="devices"/>
</platform> </platform>
</connection> </connection>
</configuration> </configuration>
</configurations> </configurations>

2
utils/utils.c
View File

@ -185,6 +185,8 @@ void xMCAL_McuInit()
// DL_SYSCTL_init(); // DL_SYSCTL_init();
// xMCAL_VrefInit(); // xMCAL_VrefInit();
SYSCFG_DL_initPower(); SYSCFG_DL_initPower();
DL_UART_Main_reset(UART2);
DL_UART_Main_enablePower(UART2);
SYSCFG_DL_GPIO_init(); SYSCFG_DL_GPIO_init();
} }