feat: Implement 9-bit status word for relay control

- Added functionality to control 9 relays based on a 9-bit status word.
- Each bit in the 9-bit word corresponds to a relay, controlling GPIO pins to turn relays ON/OFF.
- When CAN ID 0x6FF69 is received, the relay control task is triggered.
stable
Rakshita 2024-12-16 14:35:08 +05:30
parent d3412ccb36
commit 9bf10d7bef
5 changed files with 160 additions and 18 deletions

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@ -125,6 +125,43 @@ SYSCONFIG_WEAK void SYSCFG_DL_initPower(void)
DL_UART_Main_reset(UART2); DL_UART_Main_reset(UART2);
DL_UART_Main_enablePower(UART2); DL_UART_Main_enablePower(UART2);
DL_GPIO_initDigitalOutput(IOMUX_PINCM48);
DL_GPIO_initDigitalOutput(IOMUX_PINCM45);
DL_GPIO_initDigitalOutput(IOMUX_PINCM44);
DL_GPIO_initDigitalOutput(IOMUX_PINCM43);
DL_GPIO_initDigitalOutput(IOMUX_PINCM33);
DL_GPIO_initDigitalOutput(IOMUX_PINCM32);
DL_GPIO_initDigitalOutput(IOMUX_PINCM31);
DL_GPIO_initDigitalOutput(IOMUX_PINCM26);
DL_GPIO_initDigitalOutput(IOMUX_PINCM25);
DL_GPIO_clearPins(GPIOB, GPIO_relay_pin_relay_1_PIN |
GPIO_relay_pin_relay_2_PIN |
GPIO_relay_pin_relay_3_PIN |
GPIO_relay_pin_relay_4_PIN |
GPIO_relay_pin_relay_5_PIN |
GPIO_relay_pin_relay_6_PIN |
GPIO_relay_pin_relay_7_PIN |
GPIO_relay_pin_relay_8_PIN |
GPIO_relay_pin_relay_9_PIN);
DL_GPIO_enableOutput(GPIOB, GPIO_relay_pin_relay_1_PIN |
GPIO_relay_pin_relay_2_PIN |
GPIO_relay_pin_relay_3_PIN |
GPIO_relay_pin_relay_4_PIN |
GPIO_relay_pin_relay_5_PIN |
GPIO_relay_pin_relay_6_PIN |
GPIO_relay_pin_relay_7_PIN |
GPIO_relay_pin_relay_8_PIN |
GPIO_relay_pin_relay_9_PIN);
#endif #endif

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@ -67,6 +67,24 @@ extern "C" {
* MSP DL. * MSP DL.
*/ */
/* Defines for relay_1: GPIOB.20 with pinCMx 48 on package pin 19 */
#define GPIO_relay_pin_relay_1_PIN (DL_GPIO_PIN_20)
/* Defines for relay_2: GPIOB.19 with pinCMx 45 on package pin 16 */
#define GPIO_relay_pin_relay_2_PIN (DL_GPIO_PIN_19)
/* Defines for relay_3: GPIOB.18 with pinCMx 44 on package pin 15 */
#define GPIO_relay_pin_relay_3_PIN (DL_GPIO_PIN_18)
/* Defines for relay_4: GPIOB.17 with pinCMx 43 on package pin 14 */
#define GPIO_relay_pin_relay_4_PIN (DL_GPIO_PIN_17)
/* Defines for relay_5: GPIOB.16 with pinCMx 33 on package pin 4 */
#define GPIO_relay_pin_relay_5_PIN (DL_GPIO_PIN_16)
/* Defines for relay_6: GPIOB.15 with pinCMx 32 on package pin 3 */
#define GPIO_relay_pin_relay_6_PIN (DL_GPIO_PIN_15)
/* Defines for relay_7: GPIOB.14 with pinCMx 31 on package pin 2 */
#define GPIO_relay_pin_relay_7_PIN (DL_GPIO_PIN_14)
/* Defines for relay_8: GPIOB.9 with pinCMx 26 on package pin 61 */
#define GPIO_relay_pin_relay_8_PIN (DL_GPIO_PIN_9)
/* Defines for relay_9: GPIOB.8 with pinCMx 25 on package pin 60 */
#define GPIO_relay_pin_relay_9_PIN (DL_GPIO_PIN_8)
/* clang-format off */ /* clang-format off */

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@ -16,23 +16,6 @@ static uint32_t __gprv_u32CanUartDataAvailable = 0;
int uartCount = 1; int uartCount = 1;
// Get the UART instance based on the enum
static UART_Regs* GetUartInstance(McalUartPortNumber_e eUartPortNumber)
{
switch (eUartPortNumber)
{
case mcalUART_PORT1:
return UART0;
case mcalUART_PORT2:
return UART1;
case mcalUART_PORT3:
return UART2;
default:
return NULL; // Invalid UART port
}
}
static void __prv_vEcu_CANOverUartMsgCallback(IVEC_McalUartEvents_e eIndType, char* pucBuffer, uint32_t u32Size) static void __prv_vEcu_CANOverUartMsgCallback(IVEC_McalUartEvents_e eIndType, char* pucBuffer, uint32_t u32Size)
{ {
if(eIndType == IVEC_MCAL_UART_EVENT_RX_ARRIVED){ if(eIndType == IVEC_MCAL_UART_EVENT_RX_ARRIVED){

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@ -441,6 +441,19 @@ void vRTE_CANDataProcess(void)
volatile uint8_t l_u8TxBurstMessages = 0; volatile uint8_t l_u8TxBurstMessages = 0;
while( xECU_CANGetData(&xBuff) == commonECU_SUCCESS ) while( xECU_CANGetData(&xBuff) == commonECU_SUCCESS )
{ {
#if UART_PIN_SELECTION == 3
if(xBuff.id == 0x6ff69)
{
uint16_t relay_status = (xBuff.data[0] << 8) |xBuff.data[1];
control_relays(relay_status); // Control relays based on the relay_status
}
// if(xBuff.id == 0x6ff69)
// {
// control_relays(&xBuff);
// }
#endif
if( (xBuff.id == 0x16) && (xBuff.data[0] = 'V') && \ if( (xBuff.id == 0x16) && (xBuff.data[0] = 'V') && \
(xBuff.data[1] == 'E') && (xBuff.data[2] == 'C')) (xBuff.data[1] == 'E') && (xBuff.data[2] == 'C'))
{ {
@ -458,3 +471,94 @@ void vRTE_CANDataProcess(void)
} }
xECU_GetCanStatus(CANFD0, g_u16CanSpeed); xECU_GetCanStatus(CANFD0, g_u16CanSpeed);
} }
// Function to control individual relays based on relay_status (16 bits)
void control_relays(uint16_t relay_status)
{
//we'll use the 9-bit status to control the relays, where the least significant bit corresponds to Relay 1 and the most significant bit corresponds to Relay 9.
// Clear all relays first (set all relay pins to LOW)
DL_GPIO_clearPins(GPIOB, GPIO_relay_pin_relay_1_PIN |
GPIO_relay_pin_relay_2_PIN |
GPIO_relay_pin_relay_3_PIN |
GPIO_relay_pin_relay_4_PIN |
GPIO_relay_pin_relay_5_PIN |
GPIO_relay_pin_relay_6_PIN |
GPIO_relay_pin_relay_7_PIN |
GPIO_relay_pin_relay_8_PIN |
GPIO_relay_pin_relay_9_PIN);
// Check each bit of relay_status and set the corresponding relay pin
if ((relay_status & 0x01) != 0) { // Bit 0: Relay 1
DL_GPIO_setPins(GPIOB, GPIO_relay_pin_relay_1_PIN);
}
if ((relay_status & 0x02) != 0) { // Bit 1: Relay 2
DL_GPIO_setPins(GPIOB, GPIO_relay_pin_relay_2_PIN);
}
if ((relay_status & 0x04) != 0) { // Bit 2: Relay 3
DL_GPIO_setPins(GPIOB, GPIO_relay_pin_relay_3_PIN);
}
if ((relay_status & 0x08) != 0) { // Bit 3: Relay 4
DL_GPIO_setPins(GPIOB, GPIO_relay_pin_relay_4_PIN);
}
if ((relay_status & 0x10) != 0) { // Bit 4: Relay 5
DL_GPIO_setPins(GPIOB, GPIO_relay_pin_relay_5_PIN);
}
if ((relay_status & 0x20) != 0) { // Bit 5: Relay 6
DL_GPIO_setPins(GPIOB, GPIO_relay_pin_relay_6_PIN);
}
if ((relay_status & 0x40) != 0) { // Bit 6: Relay 7
DL_GPIO_setPins(GPIOB, GPIO_relay_pin_relay_7_PIN);
}
if ((relay_status & 0x80) != 0) { // Bit 7: Relay 8
DL_GPIO_setPins(GPIOB, GPIO_relay_pin_relay_8_PIN);
}
if ((relay_status & 0x100) != 0) { // Bit 8: Relay 9
DL_GPIO_setPins(GPIOB, GPIO_relay_pin_relay_9_PIN);
}
}
//// Function to control relays based on the payload
//void control_relays(const can_buff_t *buffer)
//{
// // Combine the two bytes to form a 16-bit value
// uint16_t relay_status = (buffer->data[0] << 8) | buffer->data[1];
//
// // Relay mask for GPIOB (for relays 1-9)
// uint32_t relay_mask = 0;
//
// //we'll use the 9-bit status to control the relays, where the least significant bit corresponds to Relay 1 and the most significant bit corresponds to Relay 9.
// // Iterate through the 9 bits to determine the status of each relay
// for (int i = 0; i < 9; i++) {
// uint8_t bit_status = (relay_status >> i) & 0x01; // Extract the ith bit
//
// if (bit_status == 1) {
// // Set the corresponding relay pin in the relay mask
// switch (i) {
// case 0: relay_mask |= GPIO_relay_pin_relay_1_PIN; break;
// case 1: relay_mask |= GPIO_relay_pin_relay_2_PIN; break;
// case 2: relay_mask |= GPIO_relay_pin_relay_3_PIN; break;
// case 3: relay_mask |= GPIO_relay_pin_relay_4_PIN; break;
// case 4: relay_mask |= GPIO_relay_pin_relay_5_PIN; break;
// case 5: relay_mask |= GPIO_relay_pin_relay_6_PIN; break;
// case 6: relay_mask |= GPIO_relay_pin_relay_7_PIN; break;
// case 7: relay_mask |= GPIO_relay_pin_relay_8_PIN; break;
// case 8: relay_mask |= GPIO_relay_pin_relay_9_PIN; break;
// }
// }
// }
//
// // First, clear all relays to ensure all relays are off
// DL_GPIO_clearPins(GPIOB, GPIO_relay_pin_relay_1_PIN |
// GPIO_relay_pin_relay_2_PIN |
// GPIO_relay_pin_relay_3_PIN |
// GPIO_relay_pin_relay_4_PIN |
// GPIO_relay_pin_relay_5_PIN |
// GPIO_relay_pin_relay_6_PIN |
// GPIO_relay_pin_relay_7_PIN |
// GPIO_relay_pin_relay_8_PIN |
// GPIO_relay_pin_relay_9_PIN);
//
// // Set the corresponding relays based on the relay_status
// DL_GPIO_setPins(GPIOB, relay_mask); // Turn ON selected relays in GPIOB
//}

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@ -38,7 +38,7 @@ typedef enum
// 1 - Basil Battery Smart // 1 - Basil Battery Smart
// 2 - Basil // 2 - Basil
// 3 - Battery Swapping Station // 3 - Battery Swapping Station
#define UART_PIN_SELECTION 2 // Set the desired UART configuration here #define UART_PIN_SELECTION 3 // Set the desired UART configuration here
volatile int i32TickCnt; volatile int i32TickCnt;