Commit Graph

15 Commits (b1fa1129af52e358906cdaa55aabf2d9012b4921)

Author SHA1 Message Date
Rakshita b1fa1129af refactor: Improve CAN and UART handling, add documentation and checks
- Fixed UART speed inside handle and CAN speed inside handle for runtime configuration.
- Moved CAN filter setup inside the handle for more centralized control.
- Added documentation above functions for better readability.
- Included argument checks at function entry to ensure valid parameters.
- Added runtime checks to prevent memory corruption where values can change dynamically.
- Removed unnecessary `extern` declarations to improve code clarity.
- Fixed `vMCAL_MCAN_Tx()` to return success even if `if (sMcalTxFifoStatus_x.freeLvl)` fails.
- Removed unused functions to clean up the codebase.
- Fixed `xMCAL_VrefInit()` by calling vMCAL_SoftReset.
2025-01-20 15:20:15 +05:30
Rakshita 1c6fff8d24 refactor: Standardized naming conventions and improved CAN functionality
- Updated naming conventions in MCAL, ECU layers for UART and CAN, RTE, utils, and main modules.
- Applied CAN filters directly in the initialization function for better reliability.
- Restricted CAN reinitialization to bus-off errors only.
- Enhanced RX interrupt handling for CAN to improve performance and stability.
- Made updates to the CAN TX function for better data transmission.
- Updated TX functionality to replace buffer usage with queue-based implementation.
2025-01-17 18:00:45 +05:30
Rakshita 49357f5d62 feat: add macros for different PCBs (Basil, Battery Smart Basil, Battery Swapping Station) and update CPU clock frequencies
- Added macros for different PCBs: Basil, Battery Smart Basil, and Battery Swapping Station.
- Increased CPU clock frequency from 48 MHz to 72 MHz.
- Increased UART clock frequency from 24 MHz to 36 MHz.
2024-12-02 14:21:54 +05:30
@rakshita4 03a449ca7f Merge branch 'uart_Pin_Pa8&9' into uart_can_fucntional 2024-11-19 13:33:22 +05:30
@rakshita4 9999b9cfeb Merge branch 'uart_Pin_Pa8&9' into uart_can_fucntional 2024-11-19 09:46:56 +05:30
heezes 51cb91df6c fix: update the CPU clock to 48Mhz
- Update the systick period enum
- Add bootloader jump and check
- Increased the destination buffer size during rx drain
- Increased uart buffer size from 8 to 64
2024-11-07 10:32:26 +05:30
Rakshitavecmocon 56c08e98b8 fix: Correct standard ID handling in CAN RX by applying proper shift 2024-11-05 00:54:43 +05:30
Rakshitavecmocon 3896d66aa0 feat: Configure UART1 to PA8 and PA9, comment vRTE_Matlab functions, and include additional paths 2024-10-30 19:11:49 +05:30
heezes ed765079dd fix: can implementation
- add ping reply
- can mcal implementation from socmeter
- removed the dot buffer usage in TM1650
- removed unsued variables/code
2024-10-29 19:03:30 +05:30
heezes ab99333dad feat: add matlab code to display soc 2024-10-29 14:42:05 +05:30
Rakshitavecmocon 03c4f12a70 fix: command some line 2024-10-24 14:32:21 +05:30
Rakshitavecmocon ce790d74b1 feat:: changed UART pins to PA8 and PA9, switched to UART1 in new branch, removed some comments 2024-10-23 17:34:45 +05:30
Rakshitavecmocon 5b88394f22 fix: Update clock configuration and UART/CAN settings
- Corrected clock configuration according to HFXT
- Set UART baud rate based on HFXT clock
- Configured CAN timing according to DL_MCAN_FCLK_HFCLK
2024-10-10 18:39:44 +05:30
Rakshitavecmocon 85a15dc97f feat: Implement UART to CAN and CAN to UART communication
- Implemented RX and TX functionalities for UART to CAN and CAN to UART
- Updated necessary layers to support seamless communication
2024-10-04 18:51:42 +05:30
Rakshitavecmocon c5e0c06a07 Initial commit 2024-09-26 18:52:04 +05:30