Commit Graph

19 Commits (1c6fff8d24e48d186668aa086ecc0285f2652f10)

Author SHA1 Message Date
Rakshita 1c6fff8d24 refactor: Standardized naming conventions and improved CAN functionality
- Updated naming conventions in MCAL, ECU layers for UART and CAN, RTE, utils, and main modules.
- Applied CAN filters directly in the initialization function for better reliability.
- Restricted CAN reinitialization to bus-off errors only.
- Enhanced RX interrupt handling for CAN to improve performance and stability.
- Made updates to the CAN TX function for better data transmission.
- Updated TX functionality to replace buffer usage with queue-based implementation.
2025-01-17 18:00:45 +05:30
Rakshita a6d7b58f3d refactor: Update MCAL and ECU layers for UART and synchronize RTE layer
- Fixed the MCAL and ECU layers to handle multiple UART configurations.
- Updated the RTE layer to align with changes in UART layers for improved compatibility and functionality.
2025-01-09 17:08:04 +05:30
Rakshita 067c61f9cc feat: Added relays for Fan 1 and Fan 2
- Introduced two new relays for controlling Fan 1 and Fan 2.
- Updated the 9-bit status word to accommodate the new relays, expanding to 11 bits.
- Adjusted GPIO pin mapping to include the new relays in the control logic.
2024-12-18 16:34:53 +05:30
Rakshita ff2fd2288a fix: Corrected relay order for 9-bit status word
- Reversed the relay order to align with the correct mapping.
- Bit 0 now corresponds to `charger1_en` instead of `charger9_en`.
2024-12-16 17:07:07 +05:30
Rakshita 9bf10d7bef feat: Implement 9-bit status word for relay control
- Added functionality to control 9 relays based on a 9-bit status word.
- Each bit in the 9-bit word corresponds to a relay, controlling GPIO pins to turn relays ON/OFF.
- When CAN ID 0x6FF69 is received, the relay control task is triggered.
2024-12-16 14:35:08 +05:30
Rakshita d3412ccb36 fix: Correct MCAL layer issues and increase UART read timeout
- Resolved issues in the MCAL layer introduced during merge.
- Increased UART read timeout from 1ms to 300ms for improved data handling.
2024-12-12 17:39:27 +05:30
Rakshita ec5ae72cab fix: Correct UART ports for Battery Swapping Station 2024-12-02 14:43:35 +05:30
Rakshita 49357f5d62 feat: add macros for different PCBs (Basil, Battery Smart Basil, Battery Swapping Station) and update CPU clock frequencies
- Added macros for different PCBs: Basil, Battery Smart Basil, and Battery Swapping Station.
- Increased CPU clock frequency from 48 MHz to 72 MHz.
- Increased UART clock frequency from 24 MHz to 36 MHz.
2024-12-02 14:21:54 +05:30
@rakshita4 03a449ca7f Merge branch 'uart_Pin_Pa8&9' into uart_can_fucntional 2024-11-19 13:33:22 +05:30
heezes 51cb91df6c fix: update the CPU clock to 48Mhz
- Update the systick period enum
- Add bootloader jump and check
- Increased the destination buffer size during rx drain
- Increased uart buffer size from 8 to 64
2024-11-07 10:32:26 +05:30
heezes 9631a6c398 fix: can transmission over uart 2024-11-03 20:01:20 +05:30
heezes ed765079dd fix: can implementation
- add ping reply
- can mcal implementation from socmeter
- removed the dot buffer usage in TM1650
- removed unsued variables/code
2024-10-29 19:03:30 +05:30
heezes ab99333dad feat: add matlab code to display soc 2024-10-29 14:42:05 +05:30
Rakshitavecmocon ce790d74b1 feat:: changed UART pins to PA8 and PA9, switched to UART1 in new branch, removed some comments 2024-10-23 17:34:45 +05:30
Rakshitavecmocon 9b2c2312cb feat: Add runtime UART baud rate change based on received packet mode
Implemented functionality to change UART baud rate at runtime if the received packet has mode set to zero.
2024-10-17 13:10:51 +05:30
Rakshitavecmocon 9599f1630c feat: Implement SysTick for UART reception and enhance CAN MCAL layer
-Replaced timer-based UART data reception with SysTick timer implementation.
- Modified the UART interrupt handler to manage interrupts effectively.
- Updated MCAL layer for CAN to ensure proper handling of FIFO in RX interrupts.
- Corrected the deinitialization function in the MCAL layer of CAN.
- Implemented a handler for managing lastErrCode in CAN interrupts.
- Removed all debug print statements and unnecessary CAN filters to clean up the code.
2024-10-15 16:10:03 +05:30
Rakshitavecmocon 5b88394f22 fix: Update clock configuration and UART/CAN settings
- Corrected clock configuration according to HFXT
- Set UART baud rate based on HFXT clock
- Configured CAN timing according to DL_MCAN_FCLK_HFCLK
2024-10-10 18:39:44 +05:30
Rakshitavecmocon 85a15dc97f feat: Implement UART to CAN and CAN to UART communication
- Implemented RX and TX functionalities for UART to CAN and CAN to UART
- Updated necessary layers to support seamless communication
2024-10-04 18:51:42 +05:30
Rakshitavecmocon c5e0c06a07 Initial commit 2024-09-26 18:52:04 +05:30