Commit Graph

14 Commits (2e4b44259ad23507596e698e043a246ac5f24acb)

Author SHA1 Message Date
Rakshita dfdb8d0c64 feat: Parse UART data from CC and forward over CAN
- Implemented parsing of incoming UART data from CC and transmitting it over CAN.
- Added functionality to send received CAN data back to CC via UART.
2025-03-10 18:22:39 +05:30
Rakshita 4704529a3b Merge branch 'stable' of https://gitea.vecmocon.com/Vecmocon_Technologies/cantouart_ti into stable 2025-02-20 17:32:01 +05:30
Rakshita aea1dda731 refactor: Improve OTA request handling in bootloader
- Device will now perform a soft reset only when VECIOT is received.
- Prevents TI from booting during BMS FOTA operation.
2025-02-20 17:31:53 +05:30
Altamash 22f3173c41 feat: Add UART flash API and integrate with NFC write function .
-Added UART Flash API for improved NFC functionality.
-Integrated the Flash API into the NFC write function to resolve issues where NFC scans failed after 3-4 attempts.
-Ensured smooth NFC operation by addressing write-related problems.
2025-02-06 12:47:38 +05:30
Gurpal singh 20e27aeed4 fix: temporary merge of nfc with cantouart 2025-01-24 14:44:33 +05:30
Rakshita e513e0fff1 feat: Integrate NFC functionality 2025-01-24 11:39:26 +05:30
Rakshita 071788de56 fix: Address conventions and resolve MATLAB handler default issue
- Corrected naming conventions across modules for consistency.
- Fixed the issue where the MATLAB code was defaulting to the handler by initializing struct variables to zero.
- Improved CAN TX function for more reliable data transmission.
2025-01-23 16:31:22 +05:30
Rakshita 49357f5d62 feat: add macros for different PCBs (Basil, Battery Smart Basil, Battery Swapping Station) and update CPU clock frequencies
- Added macros for different PCBs: Basil, Battery Smart Basil, and Battery Swapping Station.
- Increased CPU clock frequency from 48 MHz to 72 MHz.
- Increased UART clock frequency from 24 MHz to 36 MHz.
2024-12-02 14:21:54 +05:30
@rakshita4 5146999b44 feat(can): add default CAN speed of 500 if an invalid speed is entered 2024-11-18 14:03:45 +05:30
@rakshita4 d722738591 feat: Add mode 3 and mode 4 for runtime CAN filter application with mask-based filtering 2024-11-13 03:53:59 +05:30
Rakshitavecmocon 3896d66aa0 feat: Configure UART1 to PA8 and PA9, comment vRTE_Matlab functions, and include additional paths 2024-10-30 19:11:49 +05:30
heezes ab99333dad feat: add matlab code to display soc 2024-10-29 14:42:05 +05:30
Rakshitavecmocon 5b88394f22 fix: Update clock configuration and UART/CAN settings
- Corrected clock configuration according to HFXT
- Set UART baud rate based on HFXT clock
- Configured CAN timing according to DL_MCAN_FCLK_HFCLK
2024-10-10 18:39:44 +05:30
Rakshitavecmocon c5e0c06a07 Initial commit 2024-09-26 18:52:04 +05:30