Rakshita
d3412ccb36
fix: Correct MCAL layer issues and increase UART read timeout
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- Resolved issues in the MCAL layer introduced during merge.
- Increased UART read timeout from 1ms to 300ms for improved data handling.
2024-12-12 17:39:27 +05:30
Rakshita
ec5ae72cab
fix: Correct UART ports for Battery Swapping Station
2024-12-02 14:43:35 +05:30
Rakshita
49357f5d62
feat: add macros for different PCBs (Basil, Battery Smart Basil, Battery Swapping Station) and update CPU clock frequencies
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- Added macros for different PCBs: Basil, Battery Smart Basil, and Battery Swapping Station.
- Increased CPU clock frequency from 48 MHz to 72 MHz.
- Increased UART clock frequency from 24 MHz to 36 MHz.
2024-12-02 14:21:54 +05:30
@rakshita4
03a449ca7f
Merge branch 'uart_Pin_Pa8&9' into uart_can_fucntional
2024-11-19 13:33:22 +05:30
a3ac0f2a1a
fix: add bus ack error handling
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- Add FC instead of 100% soc
2024-11-18 12:17:23 +05:30
51cb91df6c
fix: update the CPU clock to 48Mhz
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- Update the systick period enum
- Add bootloader jump and check
- Increased the destination buffer size during rx drain
- Increased uart buffer size from 8 to 64
2024-11-07 10:32:26 +05:30
9631a6c398
fix: can transmission over uart
2024-11-03 20:01:20 +05:30
ed765079dd
fix: can implementation
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- add ping reply
- can mcal implementation from socmeter
- removed the dot buffer usage in TM1650
- removed unsued variables/code
2024-10-29 19:03:30 +05:30
ab99333dad
feat: add matlab code to display soc
2024-10-29 14:42:05 +05:30
Rakshitavecmocon
ce790d74b1
feat:: changed UART pins to PA8 and PA9, switched to UART1 in new branch, removed some comments
2024-10-23 17:34:45 +05:30
Rakshitavecmocon
9b2c2312cb
feat: Add runtime UART baud rate change based on received packet mode
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Implemented functionality to change UART baud rate at runtime if the received packet has mode set to zero.
2024-10-17 13:10:51 +05:30
Rakshitavecmocon
01b847661b
fix: Correct CAN RX interrupt to handle extended IDs
2024-10-16 19:04:15 +05:30
Rakshitavecmocon
9599f1630c
feat: Implement SysTick for UART reception and enhance CAN MCAL layer
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-Replaced timer-based UART data reception with SysTick timer implementation.
- Modified the UART interrupt handler to manage interrupts effectively.
- Updated MCAL layer for CAN to ensure proper handling of FIFO in RX interrupts.
- Corrected the deinitialization function in the MCAL layer of CAN.
- Implemented a handler for managing lastErrCode in CAN interrupts.
- Removed all debug print statements and unnecessary CAN filters to clean up the code.
2024-10-15 16:10:03 +05:30
Rakshitavecmocon
5b88394f22
fix: Update clock configuration and UART/CAN settings
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- Corrected clock configuration according to HFXT
- Set UART baud rate based on HFXT clock
- Configured CAN timing according to DL_MCAN_FCLK_HFCLK
2024-10-10 18:39:44 +05:30
Rakshitavecmocon
17131c3a34
fix: Implement error handling for CAN
2024-10-07 18:32:06 +05:30
Rakshitavecmocon
85a15dc97f
feat: Implement UART to CAN and CAN to UART communication
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- Implemented RX and TX functionalities for UART to CAN and CAN to UART
- Updated necessary layers to support seamless communication
2024-10-04 18:51:42 +05:30
Rakshitavecmocon
c5e0c06a07
Initial commit
2024-09-26 18:52:04 +05:30
Rakshita
heezes